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192.168.1.100 / T108 / c2023d5d03be91dbb983606f0ec5e9e4ea36c8c2 / . / marvell / linux / arch / arm / boot / dts / imx6sll-evk.dts
blob: 5ace9e6acf85ca9839d5c15db00d77662288146e [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP.
5 *
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h>
12#include "imx6sll.dtsi"
13
14/ {
15 model = "Freescale i.MX6SLL EVK Board";
16 compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
17
18 chosen {
19 stdout-path = &uart1;
20 };
21
22 memory@80000000 {
23 device_type = "memory";
24 reg = <0x80000000 0x80000000>;
25 };
26
27 backlight_display: backlight-display {
28 compatible = "pwm-backlight";
29 pwms = <&pwm1 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
32 status = "okay";
33 };
34
35 leds {
36 compatible = "gpio-leds";
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_led>;
39
40 user {
41 label = "debug";
42 gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "heartbeat";
44 };
45 };
46
47 reg_usb_otg1_vbus: regulator-otg1-vbus {
48 compatible = "regulator-fixed";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
51 regulator-name = "usb_otg1_vbus";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
54 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
57
58 reg_usb_otg2_vbus: regulator-otg2-vbus {
59 compatible = "regulator-fixed";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
62 regulator-name = "usb_otg2_vbus";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
66 enable-active-high;
67 };
68
69 reg_aud3v: regulator-aud3v {
70 compatible = "regulator-fixed";
71 regulator-name = "wm8962-supply-3v15";
72 regulator-min-microvolt = <3150000>;
73 regulator-max-microvolt = <3150000>;
74 regulator-boot-on;
75 };
76
77 reg_aud4v: regulator-aud4v {
78 compatible = "regulator-fixed";
79 regulator-name = "wm8962-supply-4v2";
80 regulator-min-microvolt = <4325000>;
81 regulator-max-microvolt = <4325000>;
82 regulator-boot-on;
83 };
84
85 reg_lcd_3v3: regulator-lcd-3v3 {
86 compatible = "regulator-fixed";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
89 regulator-name = "lcd-3v3";
90 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
91 enable-active-high;
92 };
93
94 reg_lcd_5v: regulator-lcd-5v {
95 compatible = "regulator-fixed";
96 regulator-name = "lcd-5v0";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 };
100
101 reg_sd1_vmmc: regulator-sd1-vmmc {
102 compatible = "regulator-fixed";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
105 regulator-name = "SD1_SPWR";
106 regulator-min-microvolt = <3000000>;
107 regulator-max-microvolt = <3000000>;
108 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
109 enable-active-high;
110 };
111
112 reg_sd3_vmmc: regulator-sd3-vmmc {
113 compatible = "regulator-fixed";
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_reg_sd3_vmmc>;
116 regulator-name = "SD3_WIFI";
117 regulator-min-microvolt = <3000000>;
118 regulator-max-microvolt = <3000000>;
119 gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
120 enable-active-high;
121 };
122
123 panel {
124 compatible = "sii,43wvf1g";
125 backlight = <&backlight_display>;
126 dvdd-supply = <&reg_lcd_3v3>;
127 avdd-supply = <&reg_lcd_5v>;
128
129 port {
130 panel_in: endpoint {
131 remote-endpoint = <&display_out>;
132 };
133 };
134 };
135};
136
137&cpu0 {
138 arm-supply = <&sw1a_reg>;
139 soc-supply = <&sw1c_reg>;
140};
141
142&i2c1 {
143 clock-frequency = <100000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c1>;
146 status = "okay";
147
148 pfuze100: pmic@8 {
149 compatible = "fsl,pfuze100";
150 reg = <0x08>;
151
152 regulators {
153 sw1a_reg: sw1ab {
154 regulator-min-microvolt = <300000>;
155 regulator-max-microvolt = <1875000>;
156 regulator-boot-on;
157 regulator-always-on;
158 regulator-ramp-delay = <6250>;
159 };
160
161 sw1c_reg: sw1c {
162 regulator-min-microvolt = <300000>;
163 regulator-max-microvolt = <1875000>;
164 regulator-boot-on;
165 regulator-always-on;
166 regulator-ramp-delay = <6250>;
167 };
168
169 sw2_reg: sw2 {
170 regulator-min-microvolt = <800000>;
171 regulator-max-microvolt = <3300000>;
172 regulator-boot-on;
173 regulator-always-on;
174 };
175
176 sw3a_reg: sw3a {
177 regulator-min-microvolt = <400000>;
178 regulator-max-microvolt = <1975000>;
179 regulator-boot-on;
180 regulator-always-on;
181 };
182
183 sw3b_reg: sw3b {
184 regulator-min-microvolt = <400000>;
185 regulator-max-microvolt = <1975000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 sw4_reg: sw4 {
191 regulator-min-microvolt = <800000>;
192 regulator-max-microvolt = <3300000>;
193 regulator-always-on;
194 };
195
196 swbst_reg: swbst {
197 regulator-min-microvolt = <5000000>;
198 regulator-max-microvolt = <5150000>;
199 };
200
201 snvs_reg: vsnvs {
202 regulator-min-microvolt = <1000000>;
203 regulator-max-microvolt = <3000000>;
204 regulator-boot-on;
205 regulator-always-on;
206 };
207
208 vref_reg: vrefddr {
209 regulator-boot-on;
210 regulator-always-on;
211 };
212
213 vgen1_reg: vgen1 {
214 regulator-min-microvolt = <800000>;
215 regulator-max-microvolt = <1550000>;
216 regulator-always-on;
217 };
218
219 vgen2_reg: vgen2 {
220 regulator-min-microvolt = <800000>;
221 regulator-max-microvolt = <1550000>;
222 };
223
224 vgen3_reg: vgen3 {
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <3300000>;
227 };
228
229 vgen4_reg: vgen4 {
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-always-on;
233 };
234
235 vgen5_reg: vgen5 {
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <3300000>;
238 regulator-always-on;
239 };
240
241 vgen6_reg: vgen6 {
242 regulator-min-microvolt = <1800000>;
243 regulator-max-microvolt = <3300000>;
244 regulator-always-on;
245 };
246 };
247 };
248};
249
250&lcdif {
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_lcd>;
253 status = "okay";
254
255 port {
256 display_out: endpoint {
257 remote-endpoint = <&panel_in>;
258 };
259 };
260};
261
262&pwm1 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_pwm1>;
265 status = "okay";
266};
267
268&snvs_poweroff {
269 status = "okay";
270};
271
272&snvs_pwrkey {
273 status = "okay";
274};
275
276&uart1 {
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_uart1>;
279 status = "okay";
280};
281
282&usdhc1 {
283 pinctrl-names = "default", "state_100mhz", "state_200mhz";
284 pinctrl-0 = <&pinctrl_usdhc1>;
285 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
286 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
287 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
288 wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
289 keep-power-in-suspend;
290 wakeup-source;
291 vmmc-supply = <&reg_sd1_vmmc>;
292 status = "okay";
293};
294
295&usbotg1 {
296 vbus-supply = <&reg_usb_otg1_vbus>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_usbotg1>;
299 disable-over-current;
300 srp-disable;
301 hnp-disable;
302 adp-disable;
303 status = "okay";
304};
305
306&usbotg2 {
307 vbus-supply = <&reg_usb_otg2_vbus>;
308 dr_mode = "host";
309 disable-over-current;
310 status = "okay";
311};
312
313&usdhc3 {
314 pinctrl-names = "default", "state_100mhz", "state_200mhz";
315 pinctrl-0 = <&pinctrl_usdhc3>;
316 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
317 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
318 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
319 keep-power-in-suspend;
320 wakeup-source;
321 vmmc-supply = <&reg_sd3_vmmc>;
322 status = "okay";
323};
324
325&wdog1 {
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_wdog1>;
328 fsl,ext-reset-output;
329};
330
331&iomuxc {
332 pinctrl_reg_sd3_vmmc: sd3vmmcgrp {
333 fsl,pins = <
334 MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059
335 >;
336 };
337
338 pinctrl_usb_otg1_vbus: vbus1grp {
339 fsl,pins = <
340 MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
341 >;
342 };
343
344 pinctrl_usb_otg2_vbus: vbus2grp {
345 fsl,pins = <
346 MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
347 >;
348 };
349
350 pinctrl_reg_lcd_3v3: reglcd3v3grp {
351 fsl,pins = <
352 MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
353 >;
354 };
355
356 pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
357 fsl,pins = <
358 MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
359 >;
360 };
361
362 pinctrl_uart1: uart1grp {
363 fsl,pins = <
364 MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
365 MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
366 >;
367 };
368
369 pinctrl_usdhc1: usdhc1grp {
370 fsl,pins = <
371 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059
372 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059
373 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059
374 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059
375 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059
376 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059
377 >;
378 };
379
380 pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
381 fsl,pins = <
382 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9
383 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9
384 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9
385 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9
386 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9
387 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9
388 >;
389 };
390
391 pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
392 fsl,pins = <
393 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9
394 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9
395 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9
396 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9
397 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9
398 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9
399 >;
400 };
401
402 pinctrl_usbotg1: usbotg1grp {
403 fsl,pins = <
404 MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
405 >;
406 };
407
408 pinctrl_usdhc3: usdhc3grp {
409 fsl,pins = <
410 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061
411 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061
412 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061
413 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061
414 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061
415 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061
416 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
417 >;
418 };
419
420 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
421 fsl,pins = <
422 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1
423 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1
424 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1
425 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1
426 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1
427 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1
428 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
429 >;
430 };
431
432 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
433 fsl,pins = <
434 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9
435 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9
436 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9
437 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9
438 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9
439 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9
440 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
441 >;
442 };
443
444 pinctrl_i2c1: i2c1grp {
445 fsl,pins = <
446 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
447 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
448 >;
449 };
450
451 pinctrl_lcd: lcdgrp {
452 fsl,pins = <
453 MX6SLL_PAD_LCD_DATA00__LCD_DATA00 0x79
454 MX6SLL_PAD_LCD_DATA01__LCD_DATA01 0x79
455 MX6SLL_PAD_LCD_DATA02__LCD_DATA02 0x79
456 MX6SLL_PAD_LCD_DATA03__LCD_DATA03 0x79
457 MX6SLL_PAD_LCD_DATA04__LCD_DATA04 0x79
458 MX6SLL_PAD_LCD_DATA05__LCD_DATA05 0x79
459 MX6SLL_PAD_LCD_DATA06__LCD_DATA06 0x79
460 MX6SLL_PAD_LCD_DATA07__LCD_DATA07 0x79
461 MX6SLL_PAD_LCD_DATA08__LCD_DATA08 0x79
462 MX6SLL_PAD_LCD_DATA09__LCD_DATA09 0x79
463 MX6SLL_PAD_LCD_DATA10__LCD_DATA10 0x79
464 MX6SLL_PAD_LCD_DATA11__LCD_DATA11 0x79
465 MX6SLL_PAD_LCD_DATA12__LCD_DATA12 0x79
466 MX6SLL_PAD_LCD_DATA13__LCD_DATA13 0x79
467 MX6SLL_PAD_LCD_DATA14__LCD_DATA14 0x79
468 MX6SLL_PAD_LCD_DATA15__LCD_DATA15 0x79
469 MX6SLL_PAD_LCD_DATA16__LCD_DATA16 0x79
470 MX6SLL_PAD_LCD_DATA17__LCD_DATA17 0x79
471 MX6SLL_PAD_LCD_DATA18__LCD_DATA18 0x79
472 MX6SLL_PAD_LCD_DATA19__LCD_DATA19 0x79
473 MX6SLL_PAD_LCD_DATA20__LCD_DATA20 0x79
474 MX6SLL_PAD_LCD_DATA21__LCD_DATA21 0x79
475 MX6SLL_PAD_LCD_DATA22__LCD_DATA22 0x79
476 MX6SLL_PAD_LCD_DATA23__LCD_DATA23 0x79
477 MX6SLL_PAD_LCD_CLK__LCD_CLK 0x79
478 MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE 0x79
479 MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC 0x79
480 MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC 0x79
481 MX6SLL_PAD_LCD_RESET__LCD_RESET 0x79
482 >;
483 };
484
485 pinctrl_led: ledgrp {
486 fsl,pins = <
487 MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 0x17059
488 >;
489 };
490
491 pinctrl_pwm1: pmw1grp {
492 fsl,pins = <
493 MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0
494 >;
495 };
496
497 pinctrl_wdog1: wdog1grp {
498 fsl,pins = <
499 MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0
500 >;
501 };
502};