| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Device Tree support for Mediatek SoCs |
| 4 | * |
| 5 | * Copyright (c) 2014 MundoReader S.L. |
| 6 | * Author: Matthias Brugger <matthias.bgg@gmail.com> |
| 7 | */ |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/io.h> |
| 10 | #include <asm/mach/arch.h> |
| 11 | #include <linux/of.h> |
| 12 | #include <linux/clk-provider.h> |
| 13 | #include <linux/clocksource.h> |
| 14 | |
| 15 | |
| 16 | #define GPT6_CON_MT65xx 0x10008060 |
| 17 | #define GPT_ENABLE 0x31 |
| 18 | |
| 19 | static void __init mediatek_timer_init(void) |
| 20 | { |
| 21 | void __iomem *gpt_base; |
| 22 | |
| 23 | if (of_machine_is_compatible("mediatek,mt6589") || |
| 24 | of_machine_is_compatible("mediatek,mt7623") || |
| 25 | of_machine_is_compatible("mediatek,mt8135") || |
| 26 | of_machine_is_compatible("mediatek,mt8127")) { |
| 27 | /* turn on GPT6 which ungates arch timer clocks */ |
| 28 | gpt_base = ioremap(GPT6_CON_MT65xx, 0x04); |
| 29 | |
| 30 | /* enable clock and set to free-run */ |
| 31 | writel(GPT_ENABLE, gpt_base); |
| 32 | iounmap(gpt_base); |
| 33 | } |
| 34 | |
| 35 | of_clk_init(NULL); |
| 36 | timer_probe(); |
| 37 | }; |
| 38 | |
| 39 | static const char * const mediatek_board_dt_compat[] = { |
| 40 | "mediatek,mt2701", |
| 41 | "mediatek,mt6589", |
| 42 | "mediatek,mt6592", |
| 43 | "mediatek,mt7623", |
| 44 | "mediatek,mt7629", |
| 45 | "mediatek,mt8127", |
| 46 | "mediatek,mt8135", |
| 47 | NULL, |
| 48 | }; |
| 49 | |
| 50 | DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)") |
| 51 | .dt_compat = mediatek_board_dt_compat, |
| 52 | .init_time = mediatek_timer_init, |
| 53 | MACHINE_END |