blob: 40ca8de21096b35e752a9ac848c9a523a4e6cdd3 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * S3C6400 - DMA support
10 */
11
12#ifndef __ASM_ARCH_DMA_H
13#define __ASM_ARCH_DMA_H __FILE__
14
15#define S3C64XX_DMA_CHAN(name) ((unsigned long)(name))
16
17/* DMA0/SDMA0 */
18#define DMACH_UART0 "uart0_tx"
19#define DMACH_UART0_SRC2 "uart0_rx"
20#define DMACH_UART1 "uart1_tx"
21#define DMACH_UART1_SRC2 "uart1_rx"
22#define DMACH_UART2 "uart2_tx"
23#define DMACH_UART2_SRC2 "uart2_rx"
24#define DMACH_UART3 "uart3_tx"
25#define DMACH_UART3_SRC2 "uart3_rx"
26#define DMACH_PCM0_TX "pcm0_tx"
27#define DMACH_PCM0_RX "pcm0_rx"
28#define DMACH_I2S0_OUT "i2s0_tx"
29#define DMACH_I2S0_IN "i2s0_rx"
30#define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx")
31#define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx")
32#define DMACH_HSI_I2SV40_TX "i2s2_tx"
33#define DMACH_HSI_I2SV40_RX "i2s2_rx"
34
35/* DMA1/SDMA1 */
36#define DMACH_PCM1_TX "pcm1_tx"
37#define DMACH_PCM1_RX "pcm1_rx"
38#define DMACH_I2S1_OUT "i2s1_tx"
39#define DMACH_I2S1_IN "i2s1_rx"
40#define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx")
41#define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx")
42#define DMACH_AC97_PCMOUT "ac97_out"
43#define DMACH_AC97_PCMIN "ac97_in"
44#define DMACH_AC97_MICIN "ac97_mic"
45#define DMACH_PWM "pwm"
46#define DMACH_IRDA "irda"
47#define DMACH_EXTERNAL "external"
48#define DMACH_SECURITY_RX "sec_rx"
49#define DMACH_SECURITY_TX "sec_tx"
50
51enum dma_ch {
52 DMACH_MAX = 32
53};
54
55#include <linux/amba/pl08x.h>
56
57#endif /* __ASM_ARCH_IRQ_H */