Gitiles
Code Review Sign In
192.168.1.100 / T108 / c2023d5d03be91dbb983606f0ec5e9e4ea36c8c2 / . / marvell / linux / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
blob: 95deff66eeb6111e2cdc5de8b957ee586d841b46 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car H3 (R8A77950) SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a7795-sysc.h>
11
12#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
13
14/ {
15 compatible = "renesas,r8a7795";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c_dvfs;
28 };
29
30 /*
31 * The external audio clocks are configured as 0 Hz fixed frequency
32 * clocks by default.
33 * Boards that provide audio clocks should override them.
34 */
35 audio_clk_a: audio_clk_a {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
40
41 audio_clk_b: audio_clk_b {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
45 };
46
47 audio_clk_c: audio_clk_c {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <0>;
51 };
52
53 /* External CAN clock - to be overridden by boards that provide it */
54 can_clk: can {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 cluster0_opp: opp_table0 {
61 compatible = "operating-points-v2";
62 opp-shared;
63
64 opp-500000000 {
65 opp-hz = /bits/ 64 <500000000>;
66 opp-microvolt = <830000>;
67 clock-latency-ns = <300000>;
68 };
69 opp-1000000000 {
70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <830000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <830000>;
77 clock-latency-ns = <300000>;
78 opp-suspend;
79 };
80 opp-1600000000 {
81 opp-hz = /bits/ 64 <1600000000>;
82 opp-microvolt = <900000>;
83 clock-latency-ns = <300000>;
84 turbo-mode;
85 };
86 opp-1700000000 {
87 opp-hz = /bits/ 64 <1700000000>;
88 opp-microvolt = <960000>;
89 clock-latency-ns = <300000>;
90 turbo-mode;
91 };
92 };
93
94 cluster1_opp: opp_table1 {
95 compatible = "operating-points-v2";
96 opp-shared;
97
98 opp-800000000 {
99 opp-hz = /bits/ 64 <800000000>;
100 opp-microvolt = <820000>;
101 clock-latency-ns = <300000>;
102 };
103 opp-1000000000 {
104 opp-hz = /bits/ 64 <1000000000>;
105 opp-microvolt = <820000>;
106 clock-latency-ns = <300000>;
107 };
108 opp-1200000000 {
109 opp-hz = /bits/ 64 <1200000000>;
110 opp-microvolt = <820000>;
111 clock-latency-ns = <300000>;
112 };
113 };
114
115 cpus {
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 cpu-map {
120 cluster0 {
121 core0 {
122 cpu = <&a57_0>;
123 };
124 core1 {
125 cpu = <&a57_1>;
126 };
127 core2 {
128 cpu = <&a57_2>;
129 };
130 core3 {
131 cpu = <&a57_3>;
132 };
133 };
134
135 cluster1 {
136 core0 {
137 cpu = <&a53_0>;
138 };
139 core1 {
140 cpu = <&a53_1>;
141 };
142 core2 {
143 cpu = <&a53_2>;
144 };
145 core3 {
146 cpu = <&a53_3>;
147 };
148 };
149 };
150
151 a57_0: cpu@0 {
152 compatible = "arm,cortex-a57";
153 reg = <0x0>;
154 device_type = "cpu";
155 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
156 next-level-cache = <&L2_CA57>;
157 enable-method = "psci";
158 dynamic-power-coefficient = <854>;
159 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
160 operating-points-v2 = <&cluster0_opp>;
161 capacity-dmips-mhz = <1024>;
162 #cooling-cells = <2>;
163 };
164
165 a57_1: cpu@1 {
166 compatible = "arm,cortex-a57";
167 reg = <0x1>;
168 device_type = "cpu";
169 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
170 next-level-cache = <&L2_CA57>;
171 enable-method = "psci";
172 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
173 operating-points-v2 = <&cluster0_opp>;
174 capacity-dmips-mhz = <1024>;
175 #cooling-cells = <2>;
176 };
177
178 a57_2: cpu@2 {
179 compatible = "arm,cortex-a57";
180 reg = <0x2>;
181 device_type = "cpu";
182 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
183 next-level-cache = <&L2_CA57>;
184 enable-method = "psci";
185 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
186 operating-points-v2 = <&cluster0_opp>;
187 capacity-dmips-mhz = <1024>;
188 #cooling-cells = <2>;
189 };
190
191 a57_3: cpu@3 {
192 compatible = "arm,cortex-a57";
193 reg = <0x3>;
194 device_type = "cpu";
195 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
196 next-level-cache = <&L2_CA57>;
197 enable-method = "psci";
198 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
199 operating-points-v2 = <&cluster0_opp>;
200 capacity-dmips-mhz = <1024>;
201 #cooling-cells = <2>;
202 };
203
204 a53_0: cpu@100 {
205 compatible = "arm,cortex-a53";
206 reg = <0x100>;
207 device_type = "cpu";
208 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
209 next-level-cache = <&L2_CA53>;
210 enable-method = "psci";
211 #cooling-cells = <2>;
212 dynamic-power-coefficient = <277>;
213 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
214 operating-points-v2 = <&cluster1_opp>;
215 capacity-dmips-mhz = <535>;
216 };
217
218 a53_1: cpu@101 {
219 compatible = "arm,cortex-a53";
220 reg = <0x101>;
221 device_type = "cpu";
222 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
223 next-level-cache = <&L2_CA53>;
224 enable-method = "psci";
225 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
226 operating-points-v2 = <&cluster1_opp>;
227 capacity-dmips-mhz = <535>;
228 };
229
230 a53_2: cpu@102 {
231 compatible = "arm,cortex-a53";
232 reg = <0x102>;
233 device_type = "cpu";
234 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
235 next-level-cache = <&L2_CA53>;
236 enable-method = "psci";
237 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
238 operating-points-v2 = <&cluster1_opp>;
239 capacity-dmips-mhz = <535>;
240 };
241
242 a53_3: cpu@103 {
243 compatible = "arm,cortex-a53";
244 reg = <0x103>;
245 device_type = "cpu";
246 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
247 next-level-cache = <&L2_CA53>;
248 enable-method = "psci";
249 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
250 operating-points-v2 = <&cluster1_opp>;
251 capacity-dmips-mhz = <535>;
252 };
253
254 L2_CA57: cache-controller-0 {
255 compatible = "cache";
256 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
257 cache-unified;
258 cache-level = <2>;
259 };
260
261 L2_CA53: cache-controller-1 {
262 compatible = "cache";
263 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
264 cache-unified;
265 cache-level = <2>;
266 };
267 };
268
269 extal_clk: extal {
270 compatible = "fixed-clock";
271 #clock-cells = <0>;
272 /* This value must be overridden by the board */
273 clock-frequency = <0>;
274 };
275
276 extalr_clk: extalr {
277 compatible = "fixed-clock";
278 #clock-cells = <0>;
279 /* This value must be overridden by the board */
280 clock-frequency = <0>;
281 };
282
283 /* External PCIe clock - can be overridden by the board */
284 pcie_bus_clk: pcie_bus {
285 compatible = "fixed-clock";
286 #clock-cells = <0>;
287 clock-frequency = <0>;
288 };
289
290 pmu_a53 {
291 compatible = "arm,cortex-a53-pmu";
292 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
293 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
294 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
295 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
296 interrupt-affinity = <&a53_0>,
297 <&a53_1>,
298 <&a53_2>,
299 <&a53_3>;
300 };
301
302 pmu_a57 {
303 compatible = "arm,cortex-a57-pmu";
304 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
305 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
306 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
307 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
308 interrupt-affinity = <&a57_0>,
309 <&a57_1>,
310 <&a57_2>,
311 <&a57_3>;
312 };
313
314 psci {
315 compatible = "arm,psci-1.0", "arm,psci-0.2";
316 method = "smc";
317 };
318
319 /* External SCIF clock - to be overridden by boards that provide it */
320 scif_clk: scif {
321 compatible = "fixed-clock";
322 #clock-cells = <0>;
323 clock-frequency = <0>;
324 };
325
326 soc: soc {
327 compatible = "simple-bus";
328 interrupt-parent = <&gic>;
329
330 #address-cells = <2>;
331 #size-cells = <2>;
332 ranges;
333
334 rwdt: watchdog@e6020000 {
335 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
336 reg = <0 0xe6020000 0 0x0c>;
337 clocks = <&cpg CPG_MOD 402>;
338 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
339 resets = <&cpg 402>;
340 status = "disabled";
341 };
342
343 gpio0: gpio@e6050000 {
344 compatible = "renesas,gpio-r8a7795",
345 "renesas,rcar-gen3-gpio";
346 reg = <0 0xe6050000 0 0x50>;
347 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
348 #gpio-cells = <2>;
349 gpio-controller;
350 gpio-ranges = <&pfc 0 0 16>;
351 #interrupt-cells = <2>;
352 interrupt-controller;
353 clocks = <&cpg CPG_MOD 912>;
354 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
355 resets = <&cpg 912>;
356 };
357
358 gpio1: gpio@e6051000 {
359 compatible = "renesas,gpio-r8a7795",
360 "renesas,rcar-gen3-gpio";
361 reg = <0 0xe6051000 0 0x50>;
362 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
363 #gpio-cells = <2>;
364 gpio-controller;
365 gpio-ranges = <&pfc 0 32 29>;
366 #interrupt-cells = <2>;
367 interrupt-controller;
368 clocks = <&cpg CPG_MOD 911>;
369 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
370 resets = <&cpg 911>;
371 };
372
373 gpio2: gpio@e6052000 {
374 compatible = "renesas,gpio-r8a7795",
375 "renesas,rcar-gen3-gpio";
376 reg = <0 0xe6052000 0 0x50>;
377 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
378 #gpio-cells = <2>;
379 gpio-controller;
380 gpio-ranges = <&pfc 0 64 15>;
381 #interrupt-cells = <2>;
382 interrupt-controller;
383 clocks = <&cpg CPG_MOD 910>;
384 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
385 resets = <&cpg 910>;
386 };
387
388 gpio3: gpio@e6053000 {
389 compatible = "renesas,gpio-r8a7795",
390 "renesas,rcar-gen3-gpio";
391 reg = <0 0xe6053000 0 0x50>;
392 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
393 #gpio-cells = <2>;
394 gpio-controller;
395 gpio-ranges = <&pfc 0 96 16>;
396 #interrupt-cells = <2>;
397 interrupt-controller;
398 clocks = <&cpg CPG_MOD 909>;
399 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
400 resets = <&cpg 909>;
401 };
402
403 gpio4: gpio@e6054000 {
404 compatible = "renesas,gpio-r8a7795",
405 "renesas,rcar-gen3-gpio";
406 reg = <0 0xe6054000 0 0x50>;
407 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
408 #gpio-cells = <2>;
409 gpio-controller;
410 gpio-ranges = <&pfc 0 128 18>;
411 #interrupt-cells = <2>;
412 interrupt-controller;
413 clocks = <&cpg CPG_MOD 908>;
414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
415 resets = <&cpg 908>;
416 };
417
418 gpio5: gpio@e6055000 {
419 compatible = "renesas,gpio-r8a7795",
420 "renesas,rcar-gen3-gpio";
421 reg = <0 0xe6055000 0 0x50>;
422 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
423 #gpio-cells = <2>;
424 gpio-controller;
425 gpio-ranges = <&pfc 0 160 26>;
426 #interrupt-cells = <2>;
427 interrupt-controller;
428 clocks = <&cpg CPG_MOD 907>;
429 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
430 resets = <&cpg 907>;
431 };
432
433 gpio6: gpio@e6055400 {
434 compatible = "renesas,gpio-r8a7795",
435 "renesas,rcar-gen3-gpio";
436 reg = <0 0xe6055400 0 0x50>;
437 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
438 #gpio-cells = <2>;
439 gpio-controller;
440 gpio-ranges = <&pfc 0 192 32>;
441 #interrupt-cells = <2>;
442 interrupt-controller;
443 clocks = <&cpg CPG_MOD 906>;
444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
445 resets = <&cpg 906>;
446 };
447
448 gpio7: gpio@e6055800 {
449 compatible = "renesas,gpio-r8a7795",
450 "renesas,rcar-gen3-gpio";
451 reg = <0 0xe6055800 0 0x50>;
452 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
453 #gpio-cells = <2>;
454 gpio-controller;
455 gpio-ranges = <&pfc 0 224 4>;
456 #interrupt-cells = <2>;
457 interrupt-controller;
458 clocks = <&cpg CPG_MOD 905>;
459 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
460 resets = <&cpg 905>;
461 };
462
463 pfc: pin-controller@e6060000 {
464 compatible = "renesas,pfc-r8a7795";
465 reg = <0 0xe6060000 0 0x50c>;
466 };
467
468 cmt0: timer@e60f0000 {
469 compatible = "renesas,r8a7795-cmt0",
470 "renesas,rcar-gen3-cmt0";
471 reg = <0 0xe60f0000 0 0x1004>;
472 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&cpg CPG_MOD 303>;
475 clock-names = "fck";
476 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
477 resets = <&cpg 303>;
478 status = "disabled";
479 };
480
481 cmt1: timer@e6130000 {
482 compatible = "renesas,r8a7795-cmt1",
483 "renesas,rcar-gen3-cmt1";
484 reg = <0 0xe6130000 0 0x1004>;
485 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
488 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
490 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
491 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
492 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
493 clocks = <&cpg CPG_MOD 302>;
494 clock-names = "fck";
495 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
496 resets = <&cpg 302>;
497 status = "disabled";
498 };
499
500 cmt2: timer@e6140000 {
501 compatible = "renesas,r8a7795-cmt1",
502 "renesas,rcar-gen3-cmt1";
503 reg = <0 0xe6140000 0 0x1004>;
504 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
505 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
506 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
507 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
511 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
512 clocks = <&cpg CPG_MOD 301>;
513 clock-names = "fck";
514 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
515 resets = <&cpg 301>;
516 status = "disabled";
517 };
518
519 cmt3: timer@e6148000 {
520 compatible = "renesas,r8a7795-cmt1",
521 "renesas,rcar-gen3-cmt1";
522 reg = <0 0xe6148000 0 0x1004>;
523 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
531 clocks = <&cpg CPG_MOD 300>;
532 clock-names = "fck";
533 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
534 resets = <&cpg 300>;
535 status = "disabled";
536 };
537
538 cpg: clock-controller@e6150000 {
539 compatible = "renesas,r8a7795-cpg-mssr";
540 reg = <0 0xe6150000 0 0x1000>;
541 clocks = <&extal_clk>, <&extalr_clk>;
542 clock-names = "extal", "extalr";
543 #clock-cells = <2>;
544 #power-domain-cells = <0>;
545 #reset-cells = <1>;
546 };
547
548 rst: reset-controller@e6160000 {
549 compatible = "renesas,r8a7795-rst";
550 reg = <0 0xe6160000 0 0x0200>;
551 };
552
553 sysc: system-controller@e6180000 {
554 compatible = "renesas,r8a7795-sysc";
555 reg = <0 0xe6180000 0 0x0400>;
556 #power-domain-cells = <1>;
557 };
558
559 tsc: thermal@e6198000 {
560 compatible = "renesas,r8a7795-thermal";
561 reg = <0 0xe6198000 0 0x100>,
562 <0 0xe61a0000 0 0x100>,
563 <0 0xe61a8000 0 0x100>;
564 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
565 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
566 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
567 clocks = <&cpg CPG_MOD 522>;
568 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
569 resets = <&cpg 522>;
570 #thermal-sensor-cells = <1>;
571 };
572
573 intc_ex: interrupt-controller@e61c0000 {
574 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
575 #interrupt-cells = <2>;
576 interrupt-controller;
577 reg = <0 0xe61c0000 0 0x200>;
578 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
579 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
580 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
581 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
582 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
583 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
584 clocks = <&cpg CPG_MOD 407>;
585 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
586 resets = <&cpg 407>;
587 };
588
589 i2c0: i2c@e6500000 {
590 #address-cells = <1>;
591 #size-cells = <0>;
592 compatible = "renesas,i2c-r8a7795",
593 "renesas,rcar-gen3-i2c";
594 reg = <0 0xe6500000 0 0x40>;
595 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
596 clocks = <&cpg CPG_MOD 931>;
597 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
598 resets = <&cpg 931>;
599 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
600 <&dmac2 0x91>, <&dmac2 0x90>;
601 dma-names = "tx", "rx", "tx", "rx";
602 i2c-scl-internal-delay-ns = <110>;
603 status = "disabled";
604 };
605
606 i2c1: i2c@e6508000 {
607 #address-cells = <1>;
608 #size-cells = <0>;
609 compatible = "renesas,i2c-r8a7795",
610 "renesas,rcar-gen3-i2c";
611 reg = <0 0xe6508000 0 0x40>;
612 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&cpg CPG_MOD 930>;
614 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
615 resets = <&cpg 930>;
616 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
617 <&dmac2 0x93>, <&dmac2 0x92>;
618 dma-names = "tx", "rx", "tx", "rx";
619 i2c-scl-internal-delay-ns = <6>;
620 status = "disabled";
621 };
622
623 i2c2: i2c@e6510000 {
624 #address-cells = <1>;
625 #size-cells = <0>;
626 compatible = "renesas,i2c-r8a7795",
627 "renesas,rcar-gen3-i2c";
628 reg = <0 0xe6510000 0 0x40>;
629 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
630 clocks = <&cpg CPG_MOD 929>;
631 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
632 resets = <&cpg 929>;
633 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
634 <&dmac2 0x95>, <&dmac2 0x94>;
635 dma-names = "tx", "rx", "tx", "rx";
636 i2c-scl-internal-delay-ns = <6>;
637 status = "disabled";
638 };
639
640 i2c3: i2c@e66d0000 {
641 #address-cells = <1>;
642 #size-cells = <0>;
643 compatible = "renesas,i2c-r8a7795",
644 "renesas,rcar-gen3-i2c";
645 reg = <0 0xe66d0000 0 0x40>;
646 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
647 clocks = <&cpg CPG_MOD 928>;
648 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
649 resets = <&cpg 928>;
650 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
651 dma-names = "tx", "rx";
652 i2c-scl-internal-delay-ns = <110>;
653 status = "disabled";
654 };
655
656 i2c4: i2c@e66d8000 {
657 #address-cells = <1>;
658 #size-cells = <0>;
659 compatible = "renesas,i2c-r8a7795",
660 "renesas,rcar-gen3-i2c";
661 reg = <0 0xe66d8000 0 0x40>;
662 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
663 clocks = <&cpg CPG_MOD 927>;
664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
665 resets = <&cpg 927>;
666 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
667 dma-names = "tx", "rx";
668 i2c-scl-internal-delay-ns = <110>;
669 status = "disabled";
670 };
671
672 i2c5: i2c@e66e0000 {
673 #address-cells = <1>;
674 #size-cells = <0>;
675 compatible = "renesas,i2c-r8a7795",
676 "renesas,rcar-gen3-i2c";
677 reg = <0 0xe66e0000 0 0x40>;
678 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&cpg CPG_MOD 919>;
680 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
681 resets = <&cpg 919>;
682 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
683 dma-names = "tx", "rx";
684 i2c-scl-internal-delay-ns = <110>;
685 status = "disabled";
686 };
687
688 i2c6: i2c@e66e8000 {
689 #address-cells = <1>;
690 #size-cells = <0>;
691 compatible = "renesas,i2c-r8a7795",
692 "renesas,rcar-gen3-i2c";
693 reg = <0 0xe66e8000 0 0x40>;
694 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
695 clocks = <&cpg CPG_MOD 918>;
696 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
697 resets = <&cpg 918>;
698 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
699 dma-names = "tx", "rx";
700 i2c-scl-internal-delay-ns = <6>;
701 status = "disabled";
702 };
703
704 i2c_dvfs: i2c@e60b0000 {
705 #address-cells = <1>;
706 #size-cells = <0>;
707 compatible = "renesas,iic-r8a7795",
708 "renesas,rcar-gen3-iic",
709 "renesas,rmobile-iic";
710 reg = <0 0xe60b0000 0 0x425>;
711 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&cpg CPG_MOD 926>;
713 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
714 resets = <&cpg 926>;
715 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
716 dma-names = "tx", "rx";
717 status = "disabled";
718 };
719
720 hscif0: serial@e6540000 {
721 compatible = "renesas,hscif-r8a7795",
722 "renesas,rcar-gen3-hscif",
723 "renesas,hscif";
724 reg = <0 0xe6540000 0 96>;
725 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&cpg CPG_MOD 520>,
727 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
728 <&scif_clk>;
729 clock-names = "fck", "brg_int", "scif_clk";
730 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
731 <&dmac2 0x31>, <&dmac2 0x30>;
732 dma-names = "tx", "rx", "tx", "rx";
733 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
734 resets = <&cpg 520>;
735 status = "disabled";
736 };
737
738 hscif1: serial@e6550000 {
739 compatible = "renesas,hscif-r8a7795",
740 "renesas,rcar-gen3-hscif",
741 "renesas,hscif";
742 reg = <0 0xe6550000 0 96>;
743 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
744 clocks = <&cpg CPG_MOD 519>,
745 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
746 <&scif_clk>;
747 clock-names = "fck", "brg_int", "scif_clk";
748 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
749 <&dmac2 0x33>, <&dmac2 0x32>;
750 dma-names = "tx", "rx", "tx", "rx";
751 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
752 resets = <&cpg 519>;
753 status = "disabled";
754 };
755
756 hscif2: serial@e6560000 {
757 compatible = "renesas,hscif-r8a7795",
758 "renesas,rcar-gen3-hscif",
759 "renesas,hscif";
760 reg = <0 0xe6560000 0 96>;
761 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
762 clocks = <&cpg CPG_MOD 518>,
763 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
764 <&scif_clk>;
765 clock-names = "fck", "brg_int", "scif_clk";
766 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
767 <&dmac2 0x35>, <&dmac2 0x34>;
768 dma-names = "tx", "rx", "tx", "rx";
769 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
770 resets = <&cpg 518>;
771 status = "disabled";
772 };
773
774 hscif3: serial@e66a0000 {
775 compatible = "renesas,hscif-r8a7795",
776 "renesas,rcar-gen3-hscif",
777 "renesas,hscif";
778 reg = <0 0xe66a0000 0 96>;
779 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
780 clocks = <&cpg CPG_MOD 517>,
781 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
782 <&scif_clk>;
783 clock-names = "fck", "brg_int", "scif_clk";
784 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
785 dma-names = "tx", "rx";
786 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
787 resets = <&cpg 517>;
788 status = "disabled";
789 };
790
791 hscif4: serial@e66b0000 {
792 compatible = "renesas,hscif-r8a7795",
793 "renesas,rcar-gen3-hscif",
794 "renesas,hscif";
795 reg = <0 0xe66b0000 0 96>;
796 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
797 clocks = <&cpg CPG_MOD 516>,
798 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
799 <&scif_clk>;
800 clock-names = "fck", "brg_int", "scif_clk";
801 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
802 dma-names = "tx", "rx";
803 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
804 resets = <&cpg 516>;
805 status = "disabled";
806 };
807
808 hsusb: usb@e6590000 {
809 compatible = "renesas,usbhs-r8a7795",
810 "renesas,rcar-gen3-usbhs";
811 reg = <0 0xe6590000 0 0x200>;
812 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
814 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
815 <&usb_dmac1 0>, <&usb_dmac1 1>;
816 dma-names = "ch0", "ch1", "ch2", "ch3";
817 renesas,buswait = <11>;
818 phys = <&usb2_phy0 3>;
819 phy-names = "usb";
820 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
821 resets = <&cpg 704>, <&cpg 703>;
822 status = "disabled";
823 };
824
825 hsusb3: usb@e659c000 {
826 compatible = "renesas,usbhs-r8a7795",
827 "renesas,rcar-gen3-usbhs";
828 reg = <0 0xe659c000 0 0x200>;
829 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
830 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
831 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
832 <&usb_dmac3 0>, <&usb_dmac3 1>;
833 dma-names = "ch0", "ch1", "ch2", "ch3";
834 renesas,buswait = <11>;
835 phys = <&usb2_phy3 3>;
836 phy-names = "usb";
837 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
838 resets = <&cpg 705>, <&cpg 700>;
839 status = "disabled";
840 };
841
842 usb_dmac0: dma-controller@e65a0000 {
843 compatible = "renesas,r8a7795-usb-dmac",
844 "renesas,usb-dmac";
845 reg = <0 0xe65a0000 0 0x100>;
846 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
847 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
848 interrupt-names = "ch0", "ch1";
849 clocks = <&cpg CPG_MOD 330>;
850 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
851 resets = <&cpg 330>;
852 #dma-cells = <1>;
853 dma-channels = <2>;
854 };
855
856 usb_dmac1: dma-controller@e65b0000 {
857 compatible = "renesas,r8a7795-usb-dmac",
858 "renesas,usb-dmac";
859 reg = <0 0xe65b0000 0 0x100>;
860 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
861 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
862 interrupt-names = "ch0", "ch1";
863 clocks = <&cpg CPG_MOD 331>;
864 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
865 resets = <&cpg 331>;
866 #dma-cells = <1>;
867 dma-channels = <2>;
868 };
869
870 usb_dmac2: dma-controller@e6460000 {
871 compatible = "renesas,r8a7795-usb-dmac",
872 "renesas,usb-dmac";
873 reg = <0 0xe6460000 0 0x100>;
874 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
875 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
876 interrupt-names = "ch0", "ch1";
877 clocks = <&cpg CPG_MOD 326>;
878 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
879 resets = <&cpg 326>;
880 #dma-cells = <1>;
881 dma-channels = <2>;
882 };
883
884 usb_dmac3: dma-controller@e6470000 {
885 compatible = "renesas,r8a7795-usb-dmac",
886 "renesas,usb-dmac";
887 reg = <0 0xe6470000 0 0x100>;
888 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
889 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
890 interrupt-names = "ch0", "ch1";
891 clocks = <&cpg CPG_MOD 329>;
892 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
893 resets = <&cpg 329>;
894 #dma-cells = <1>;
895 dma-channels = <2>;
896 };
897
898 usb3_phy0: usb-phy@e65ee000 {
899 compatible = "renesas,r8a7795-usb3-phy",
900 "renesas,rcar-gen3-usb3-phy";
901 reg = <0 0xe65ee000 0 0x90>;
902 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
903 <&usb_extal_clk>;
904 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
905 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
906 resets = <&cpg 328>;
907 #phy-cells = <0>;
908 status = "disabled";
909 };
910
911 arm_cc630p: crypto@e6601000 {
912 compatible = "arm,cryptocell-630p-ree";
913 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
914 reg = <0x0 0xe6601000 0 0x1000>;
915 clocks = <&cpg CPG_MOD 229>;
916 resets = <&cpg 229>;
917 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
918 };
919
920 dmac0: dma-controller@e6700000 {
921 compatible = "renesas,dmac-r8a7795",
922 "renesas,rcar-dmac";
923 reg = <0 0xe6700000 0 0x10000>;
924 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
925 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
926 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
927 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
928 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
929 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
930 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
931 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
932 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
933 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
934 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
935 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
936 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
937 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
938 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
939 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
940 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
941 interrupt-names = "error",
942 "ch0", "ch1", "ch2", "ch3",
943 "ch4", "ch5", "ch6", "ch7",
944 "ch8", "ch9", "ch10", "ch11",
945 "ch12", "ch13", "ch14", "ch15";
946 clocks = <&cpg CPG_MOD 219>;
947 clock-names = "fck";
948 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
949 resets = <&cpg 219>;
950 #dma-cells = <1>;
951 dma-channels = <16>;
952 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
953 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
954 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
955 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
956 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
957 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
958 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
959 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
960 };
961
962 dmac1: dma-controller@e7300000 {
963 compatible = "renesas,dmac-r8a7795",
964 "renesas,rcar-dmac";
965 reg = <0 0xe7300000 0 0x10000>;
966 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
967 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
968 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
969 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
970 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
971 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
972 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
973 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
974 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
975 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
976 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
977 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
978 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
979 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
980 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
981 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
982 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
983 interrupt-names = "error",
984 "ch0", "ch1", "ch2", "ch3",
985 "ch4", "ch5", "ch6", "ch7",
986 "ch8", "ch9", "ch10", "ch11",
987 "ch12", "ch13", "ch14", "ch15";
988 clocks = <&cpg CPG_MOD 218>;
989 clock-names = "fck";
990 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
991 resets = <&cpg 218>;
992 #dma-cells = <1>;
993 dma-channels = <16>;
994 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
995 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
996 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
997 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
998 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
999 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1000 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1001 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1002 };
1003
1004 dmac2: dma-controller@e7310000 {
1005 compatible = "renesas,dmac-r8a7795",
1006 "renesas,rcar-dmac";
1007 reg = <0 0xe7310000 0 0x10000>;
1008 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
1009 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
1010 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
1011 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
1012 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
1013 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
1014 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
1015 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
1016 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
1017 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
1018 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
1019 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
1020 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
1021 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
1022 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
1023 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
1024 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1025 interrupt-names = "error",
1026 "ch0", "ch1", "ch2", "ch3",
1027 "ch4", "ch5", "ch6", "ch7",
1028 "ch8", "ch9", "ch10", "ch11",
1029 "ch12", "ch13", "ch14", "ch15";
1030 clocks = <&cpg CPG_MOD 217>;
1031 clock-names = "fck";
1032 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1033 resets = <&cpg 217>;
1034 #dma-cells = <1>;
1035 dma-channels = <16>;
1036 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1037 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1038 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1039 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1040 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1041 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1042 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1043 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1044 };
1045
1046 ipmmu_ds0: mmu@e6740000 {
1047 compatible = "renesas,ipmmu-r8a7795";
1048 reg = <0 0xe6740000 0 0x1000>;
1049 renesas,ipmmu-main = <&ipmmu_mm 0>;
1050 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1051 #iommu-cells = <1>;
1052 };
1053
1054 ipmmu_ds1: mmu@e7740000 {
1055 compatible = "renesas,ipmmu-r8a7795";
1056 reg = <0 0xe7740000 0 0x1000>;
1057 renesas,ipmmu-main = <&ipmmu_mm 1>;
1058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1059 #iommu-cells = <1>;
1060 };
1061
1062 ipmmu_hc: mmu@e6570000 {
1063 compatible = "renesas,ipmmu-r8a7795";
1064 reg = <0 0xe6570000 0 0x1000>;
1065 renesas,ipmmu-main = <&ipmmu_mm 2>;
1066 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1067 #iommu-cells = <1>;
1068 };
1069
1070 ipmmu_ir: mmu@ff8b0000 {
1071 compatible = "renesas,ipmmu-r8a7795";
1072 reg = <0 0xff8b0000 0 0x1000>;
1073 renesas,ipmmu-main = <&ipmmu_mm 3>;
1074 power-domains = <&sysc R8A7795_PD_A3IR>;
1075 #iommu-cells = <1>;
1076 };
1077
1078 ipmmu_mm: mmu@e67b0000 {
1079 compatible = "renesas,ipmmu-r8a7795";
1080 reg = <0 0xe67b0000 0 0x1000>;
1081 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1082 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1083 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1084 #iommu-cells = <1>;
1085 };
1086
1087 ipmmu_mp0: mmu@ec670000 {
1088 compatible = "renesas,ipmmu-r8a7795";
1089 reg = <0 0xec670000 0 0x1000>;
1090 renesas,ipmmu-main = <&ipmmu_mm 4>;
1091 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1092 #iommu-cells = <1>;
1093 };
1094
1095 ipmmu_pv0: mmu@fd800000 {
1096 compatible = "renesas,ipmmu-r8a7795";
1097 reg = <0 0xfd800000 0 0x1000>;
1098 renesas,ipmmu-main = <&ipmmu_mm 6>;
1099 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1100 #iommu-cells = <1>;
1101 };
1102
1103 ipmmu_pv1: mmu@fd950000 {
1104 compatible = "renesas,ipmmu-r8a7795";
1105 reg = <0 0xfd950000 0 0x1000>;
1106 renesas,ipmmu-main = <&ipmmu_mm 7>;
1107 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1108 #iommu-cells = <1>;
1109 };
1110
1111 ipmmu_pv2: mmu@fd960000 {
1112 compatible = "renesas,ipmmu-r8a7795";
1113 reg = <0 0xfd960000 0 0x1000>;
1114 renesas,ipmmu-main = <&ipmmu_mm 8>;
1115 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1116 #iommu-cells = <1>;
1117 };
1118
1119 ipmmu_pv3: mmu@fd970000 {
1120 compatible = "renesas,ipmmu-r8a7795";
1121 reg = <0 0xfd970000 0 0x1000>;
1122 renesas,ipmmu-main = <&ipmmu_mm 9>;
1123 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1124 #iommu-cells = <1>;
1125 };
1126
1127 ipmmu_rt: mmu@ffc80000 {
1128 compatible = "renesas,ipmmu-r8a7795";
1129 reg = <0 0xffc80000 0 0x1000>;
1130 renesas,ipmmu-main = <&ipmmu_mm 10>;
1131 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1132 #iommu-cells = <1>;
1133 };
1134
1135 ipmmu_vc0: mmu@fe6b0000 {
1136 compatible = "renesas,ipmmu-r8a7795";
1137 reg = <0 0xfe6b0000 0 0x1000>;
1138 renesas,ipmmu-main = <&ipmmu_mm 12>;
1139 power-domains = <&sysc R8A7795_PD_A3VC>;
1140 #iommu-cells = <1>;
1141 };
1142
1143 ipmmu_vc1: mmu@fe6f0000 {
1144 compatible = "renesas,ipmmu-r8a7795";
1145 reg = <0 0xfe6f0000 0 0x1000>;
1146 renesas,ipmmu-main = <&ipmmu_mm 13>;
1147 power-domains = <&sysc R8A7795_PD_A3VC>;
1148 #iommu-cells = <1>;
1149 };
1150
1151 ipmmu_vi0: mmu@febd0000 {
1152 compatible = "renesas,ipmmu-r8a7795";
1153 reg = <0 0xfebd0000 0 0x1000>;
1154 renesas,ipmmu-main = <&ipmmu_mm 14>;
1155 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1156 #iommu-cells = <1>;
1157 };
1158
1159 ipmmu_vi1: mmu@febe0000 {
1160 compatible = "renesas,ipmmu-r8a7795";
1161 reg = <0 0xfebe0000 0 0x1000>;
1162 renesas,ipmmu-main = <&ipmmu_mm 15>;
1163 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1164 #iommu-cells = <1>;
1165 };
1166
1167 ipmmu_vp0: mmu@fe990000 {
1168 compatible = "renesas,ipmmu-r8a7795";
1169 reg = <0 0xfe990000 0 0x1000>;
1170 renesas,ipmmu-main = <&ipmmu_mm 16>;
1171 power-domains = <&sysc R8A7795_PD_A3VP>;
1172 #iommu-cells = <1>;
1173 };
1174
1175 ipmmu_vp1: mmu@fe980000 {
1176 compatible = "renesas,ipmmu-r8a7795";
1177 reg = <0 0xfe980000 0 0x1000>;
1178 renesas,ipmmu-main = <&ipmmu_mm 17>;
1179 power-domains = <&sysc R8A7795_PD_A3VP>;
1180 #iommu-cells = <1>;
1181 };
1182
1183 avb: ethernet@e6800000 {
1184 compatible = "renesas,etheravb-r8a7795",
1185 "renesas,etheravb-rcar-gen3";
1186 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1187 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1188 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1189 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1190 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1191 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1192 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1193 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1194 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1195 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1196 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1197 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1198 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1199 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1200 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1201 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1202 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1203 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1204 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1205 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1206 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1207 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1208 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1209 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1210 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1211 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1212 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1213 "ch4", "ch5", "ch6", "ch7",
1214 "ch8", "ch9", "ch10", "ch11",
1215 "ch12", "ch13", "ch14", "ch15",
1216 "ch16", "ch17", "ch18", "ch19",
1217 "ch20", "ch21", "ch22", "ch23",
1218 "ch24";
1219 clocks = <&cpg CPG_MOD 812>;
1220 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1221 resets = <&cpg 812>;
1222 phy-mode = "rgmii";
1223 iommus = <&ipmmu_ds0 16>;
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1226 status = "disabled";
1227 };
1228
1229 can0: can@e6c30000 {
1230 compatible = "renesas,can-r8a7795",
1231 "renesas,rcar-gen3-can";
1232 reg = <0 0xe6c30000 0 0x1000>;
1233 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1234 clocks = <&cpg CPG_MOD 916>,
1235 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1236 <&can_clk>;
1237 clock-names = "clkp1", "clkp2", "can_clk";
1238 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1239 assigned-clock-rates = <40000000>;
1240 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1241 resets = <&cpg 916>;
1242 status = "disabled";
1243 };
1244
1245 can1: can@e6c38000 {
1246 compatible = "renesas,can-r8a7795",
1247 "renesas,rcar-gen3-can";
1248 reg = <0 0xe6c38000 0 0x1000>;
1249 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 915>,
1251 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1252 <&can_clk>;
1253 clock-names = "clkp1", "clkp2", "can_clk";
1254 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1255 assigned-clock-rates = <40000000>;
1256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1257 resets = <&cpg 915>;
1258 status = "disabled";
1259 };
1260
1261 canfd: can@e66c0000 {
1262 compatible = "renesas,r8a7795-canfd",
1263 "renesas,rcar-gen3-canfd";
1264 reg = <0 0xe66c0000 0 0x8000>;
1265 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1266 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 914>,
1268 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1269 <&can_clk>;
1270 clock-names = "fck", "canfd", "can_clk";
1271 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1272 assigned-clock-rates = <40000000>;
1273 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1274 resets = <&cpg 914>;
1275 status = "disabled";
1276
1277 channel0 {
1278 status = "disabled";
1279 };
1280
1281 channel1 {
1282 status = "disabled";
1283 };
1284 };
1285
1286 pwm0: pwm@e6e30000 {
1287 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1288 reg = <0 0xe6e30000 0 0x8>;
1289 clocks = <&cpg CPG_MOD 523>;
1290 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1291 resets = <&cpg 523>;
1292 #pwm-cells = <2>;
1293 status = "disabled";
1294 };
1295
1296 pwm1: pwm@e6e31000 {
1297 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1298 reg = <0 0xe6e31000 0 0x8>;
1299 clocks = <&cpg CPG_MOD 523>;
1300 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1301 resets = <&cpg 523>;
1302 #pwm-cells = <2>;
1303 status = "disabled";
1304 };
1305
1306 pwm2: pwm@e6e32000 {
1307 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1308 reg = <0 0xe6e32000 0 0x8>;
1309 clocks = <&cpg CPG_MOD 523>;
1310 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1311 resets = <&cpg 523>;
1312 #pwm-cells = <2>;
1313 status = "disabled";
1314 };
1315
1316 pwm3: pwm@e6e33000 {
1317 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1318 reg = <0 0xe6e33000 0 0x8>;
1319 clocks = <&cpg CPG_MOD 523>;
1320 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1321 resets = <&cpg 523>;
1322 #pwm-cells = <2>;
1323 status = "disabled";
1324 };
1325
1326 pwm4: pwm@e6e34000 {
1327 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1328 reg = <0 0xe6e34000 0 0x8>;
1329 clocks = <&cpg CPG_MOD 523>;
1330 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1331 resets = <&cpg 523>;
1332 #pwm-cells = <2>;
1333 status = "disabled";
1334 };
1335
1336 pwm5: pwm@e6e35000 {
1337 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1338 reg = <0 0xe6e35000 0 0x8>;
1339 clocks = <&cpg CPG_MOD 523>;
1340 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1341 resets = <&cpg 523>;
1342 #pwm-cells = <2>;
1343 status = "disabled";
1344 };
1345
1346 pwm6: pwm@e6e36000 {
1347 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1348 reg = <0 0xe6e36000 0 0x8>;
1349 clocks = <&cpg CPG_MOD 523>;
1350 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1351 resets = <&cpg 523>;
1352 #pwm-cells = <2>;
1353 status = "disabled";
1354 };
1355
1356 scif0: serial@e6e60000 {
1357 compatible = "renesas,scif-r8a7795",
1358 "renesas,rcar-gen3-scif", "renesas,scif";
1359 reg = <0 0xe6e60000 0 64>;
1360 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1361 clocks = <&cpg CPG_MOD 207>,
1362 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1363 <&scif_clk>;
1364 clock-names = "fck", "brg_int", "scif_clk";
1365 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1366 <&dmac2 0x51>, <&dmac2 0x50>;
1367 dma-names = "tx", "rx", "tx", "rx";
1368 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1369 resets = <&cpg 207>;
1370 status = "disabled";
1371 };
1372
1373 scif1: serial@e6e68000 {
1374 compatible = "renesas,scif-r8a7795",
1375 "renesas,rcar-gen3-scif", "renesas,scif";
1376 reg = <0 0xe6e68000 0 64>;
1377 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1378 clocks = <&cpg CPG_MOD 206>,
1379 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1380 <&scif_clk>;
1381 clock-names = "fck", "brg_int", "scif_clk";
1382 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1383 <&dmac2 0x53>, <&dmac2 0x52>;
1384 dma-names = "tx", "rx", "tx", "rx";
1385 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1386 resets = <&cpg 206>;
1387 status = "disabled";
1388 };
1389
1390 scif2: serial@e6e88000 {
1391 compatible = "renesas,scif-r8a7795",
1392 "renesas,rcar-gen3-scif", "renesas,scif";
1393 reg = <0 0xe6e88000 0 64>;
1394 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1395 clocks = <&cpg CPG_MOD 310>,
1396 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1397 <&scif_clk>;
1398 clock-names = "fck", "brg_int", "scif_clk";
1399 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1400 <&dmac2 0x13>, <&dmac2 0x12>;
1401 dma-names = "tx", "rx", "tx", "rx";
1402 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1403 resets = <&cpg 310>;
1404 status = "disabled";
1405 };
1406
1407 scif3: serial@e6c50000 {
1408 compatible = "renesas,scif-r8a7795",
1409 "renesas,rcar-gen3-scif", "renesas,scif";
1410 reg = <0 0xe6c50000 0 64>;
1411 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1412 clocks = <&cpg CPG_MOD 204>,
1413 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1414 <&scif_clk>;
1415 clock-names = "fck", "brg_int", "scif_clk";
1416 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1417 dma-names = "tx", "rx";
1418 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1419 resets = <&cpg 204>;
1420 status = "disabled";
1421 };
1422
1423 scif4: serial@e6c40000 {
1424 compatible = "renesas,scif-r8a7795",
1425 "renesas,rcar-gen3-scif", "renesas,scif";
1426 reg = <0 0xe6c40000 0 64>;
1427 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1428 clocks = <&cpg CPG_MOD 203>,
1429 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1430 <&scif_clk>;
1431 clock-names = "fck", "brg_int", "scif_clk";
1432 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1433 dma-names = "tx", "rx";
1434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1435 resets = <&cpg 203>;
1436 status = "disabled";
1437 };
1438
1439 scif5: serial@e6f30000 {
1440 compatible = "renesas,scif-r8a7795",
1441 "renesas,rcar-gen3-scif", "renesas,scif";
1442 reg = <0 0xe6f30000 0 64>;
1443 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1444 clocks = <&cpg CPG_MOD 202>,
1445 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1446 <&scif_clk>;
1447 clock-names = "fck", "brg_int", "scif_clk";
1448 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1449 <&dmac2 0x5b>, <&dmac2 0x5a>;
1450 dma-names = "tx", "rx", "tx", "rx";
1451 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1452 resets = <&cpg 202>;
1453 status = "disabled";
1454 };
1455
1456 tpu: pwm@e6e80000 {
1457 compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1458 reg = <0 0xe6e80000 0 0x148>;
1459 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1460 clocks = <&cpg CPG_MOD 304>;
1461 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1462 resets = <&cpg 304>;
1463 #pwm-cells = <3>;
1464 status = "disabled";
1465 };
1466
1467 msiof0: spi@e6e90000 {
1468 compatible = "renesas,msiof-r8a7795",
1469 "renesas,rcar-gen3-msiof";
1470 reg = <0 0xe6e90000 0 0x0064>;
1471 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&cpg CPG_MOD 211>;
1473 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1474 <&dmac2 0x41>, <&dmac2 0x40>;
1475 dma-names = "tx", "rx", "tx", "rx";
1476 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1477 resets = <&cpg 211>;
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1480 status = "disabled";
1481 };
1482
1483 msiof1: spi@e6ea0000 {
1484 compatible = "renesas,msiof-r8a7795",
1485 "renesas,rcar-gen3-msiof";
1486 reg = <0 0xe6ea0000 0 0x0064>;
1487 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1488 clocks = <&cpg CPG_MOD 210>;
1489 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1490 <&dmac2 0x43>, <&dmac2 0x42>;
1491 dma-names = "tx", "rx", "tx", "rx";
1492 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1493 resets = <&cpg 210>;
1494 #address-cells = <1>;
1495 #size-cells = <0>;
1496 status = "disabled";
1497 };
1498
1499 msiof2: spi@e6c00000 {
1500 compatible = "renesas,msiof-r8a7795",
1501 "renesas,rcar-gen3-msiof";
1502 reg = <0 0xe6c00000 0 0x0064>;
1503 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1504 clocks = <&cpg CPG_MOD 209>;
1505 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1506 dma-names = "tx", "rx";
1507 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1508 resets = <&cpg 209>;
1509 #address-cells = <1>;
1510 #size-cells = <0>;
1511 status = "disabled";
1512 };
1513
1514 msiof3: spi@e6c10000 {
1515 compatible = "renesas,msiof-r8a7795",
1516 "renesas,rcar-gen3-msiof";
1517 reg = <0 0xe6c10000 0 0x0064>;
1518 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1519 clocks = <&cpg CPG_MOD 208>;
1520 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1521 dma-names = "tx", "rx";
1522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1523 resets = <&cpg 208>;
1524 #address-cells = <1>;
1525 #size-cells = <0>;
1526 status = "disabled";
1527 };
1528
1529 vin0: video@e6ef0000 {
1530 compatible = "renesas,vin-r8a7795";
1531 reg = <0 0xe6ef0000 0 0x1000>;
1532 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1533 clocks = <&cpg CPG_MOD 811>;
1534 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1535 resets = <&cpg 811>;
1536 renesas,id = <0>;
1537 status = "disabled";
1538
1539 ports {
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1542
1543 port@1 {
1544 #address-cells = <1>;
1545 #size-cells = <0>;
1546
1547 reg = <1>;
1548
1549 vin0csi20: endpoint@0 {
1550 reg = <0>;
1551 remote-endpoint = <&csi20vin0>;
1552 };
1553 vin0csi40: endpoint@2 {
1554 reg = <2>;
1555 remote-endpoint = <&csi40vin0>;
1556 };
1557 };
1558 };
1559 };
1560
1561 vin1: video@e6ef1000 {
1562 compatible = "renesas,vin-r8a7795";
1563 reg = <0 0xe6ef1000 0 0x1000>;
1564 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1565 clocks = <&cpg CPG_MOD 810>;
1566 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1567 resets = <&cpg 810>;
1568 renesas,id = <1>;
1569 status = "disabled";
1570
1571 ports {
1572 #address-cells = <1>;
1573 #size-cells = <0>;
1574
1575 port@1 {
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1578
1579 reg = <1>;
1580
1581 vin1csi20: endpoint@0 {
1582 reg = <0>;
1583 remote-endpoint = <&csi20vin1>;
1584 };
1585 vin1csi40: endpoint@2 {
1586 reg = <2>;
1587 remote-endpoint = <&csi40vin1>;
1588 };
1589 };
1590 };
1591 };
1592
1593 vin2: video@e6ef2000 {
1594 compatible = "renesas,vin-r8a7795";
1595 reg = <0 0xe6ef2000 0 0x1000>;
1596 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1597 clocks = <&cpg CPG_MOD 809>;
1598 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1599 resets = <&cpg 809>;
1600 renesas,id = <2>;
1601 status = "disabled";
1602
1603 ports {
1604 #address-cells = <1>;
1605 #size-cells = <0>;
1606
1607 port@1 {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1610
1611 reg = <1>;
1612
1613 vin2csi20: endpoint@0 {
1614 reg = <0>;
1615 remote-endpoint = <&csi20vin2>;
1616 };
1617 vin2csi40: endpoint@2 {
1618 reg = <2>;
1619 remote-endpoint = <&csi40vin2>;
1620 };
1621 };
1622 };
1623 };
1624
1625 vin3: video@e6ef3000 {
1626 compatible = "renesas,vin-r8a7795";
1627 reg = <0 0xe6ef3000 0 0x1000>;
1628 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1629 clocks = <&cpg CPG_MOD 808>;
1630 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1631 resets = <&cpg 808>;
1632 renesas,id = <3>;
1633 status = "disabled";
1634
1635 ports {
1636 #address-cells = <1>;
1637 #size-cells = <0>;
1638
1639 port@1 {
1640 #address-cells = <1>;
1641 #size-cells = <0>;
1642
1643 reg = <1>;
1644
1645 vin3csi20: endpoint@0 {
1646 reg = <0>;
1647 remote-endpoint = <&csi20vin3>;
1648 };
1649 vin3csi40: endpoint@2 {
1650 reg = <2>;
1651 remote-endpoint = <&csi40vin3>;
1652 };
1653 };
1654 };
1655 };
1656
1657 vin4: video@e6ef4000 {
1658 compatible = "renesas,vin-r8a7795";
1659 reg = <0 0xe6ef4000 0 0x1000>;
1660 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1661 clocks = <&cpg CPG_MOD 807>;
1662 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1663 resets = <&cpg 807>;
1664 renesas,id = <4>;
1665 status = "disabled";
1666
1667 ports {
1668 #address-cells = <1>;
1669 #size-cells = <0>;
1670
1671 port@1 {
1672 #address-cells = <1>;
1673 #size-cells = <0>;
1674
1675 reg = <1>;
1676
1677 vin4csi20: endpoint@0 {
1678 reg = <0>;
1679 remote-endpoint = <&csi20vin4>;
1680 };
1681 vin4csi41: endpoint@3 {
1682 reg = <3>;
1683 remote-endpoint = <&csi41vin4>;
1684 };
1685 };
1686 };
1687 };
1688
1689 vin5: video@e6ef5000 {
1690 compatible = "renesas,vin-r8a7795";
1691 reg = <0 0xe6ef5000 0 0x1000>;
1692 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1693 clocks = <&cpg CPG_MOD 806>;
1694 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1695 resets = <&cpg 806>;
1696 renesas,id = <5>;
1697 status = "disabled";
1698
1699 ports {
1700 #address-cells = <1>;
1701 #size-cells = <0>;
1702
1703 port@1 {
1704 #address-cells = <1>;
1705 #size-cells = <0>;
1706
1707 reg = <1>;
1708
1709 vin5csi20: endpoint@0 {
1710 reg = <0>;
1711 remote-endpoint = <&csi20vin5>;
1712 };
1713 vin5csi41: endpoint@3 {
1714 reg = <3>;
1715 remote-endpoint = <&csi41vin5>;
1716 };
1717 };
1718 };
1719 };
1720
1721 vin6: video@e6ef6000 {
1722 compatible = "renesas,vin-r8a7795";
1723 reg = <0 0xe6ef6000 0 0x1000>;
1724 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1725 clocks = <&cpg CPG_MOD 805>;
1726 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1727 resets = <&cpg 805>;
1728 renesas,id = <6>;
1729 status = "disabled";
1730
1731 ports {
1732 #address-cells = <1>;
1733 #size-cells = <0>;
1734
1735 port@1 {
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1738
1739 reg = <1>;
1740
1741 vin6csi20: endpoint@0 {
1742 reg = <0>;
1743 remote-endpoint = <&csi20vin6>;
1744 };
1745 vin6csi41: endpoint@3 {
1746 reg = <3>;
1747 remote-endpoint = <&csi41vin6>;
1748 };
1749 };
1750 };
1751 };
1752
1753 vin7: video@e6ef7000 {
1754 compatible = "renesas,vin-r8a7795";
1755 reg = <0 0xe6ef7000 0 0x1000>;
1756 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1757 clocks = <&cpg CPG_MOD 804>;
1758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1759 resets = <&cpg 804>;
1760 renesas,id = <7>;
1761 status = "disabled";
1762
1763 ports {
1764 #address-cells = <1>;
1765 #size-cells = <0>;
1766
1767 port@1 {
1768 #address-cells = <1>;
1769 #size-cells = <0>;
1770
1771 reg = <1>;
1772
1773 vin7csi20: endpoint@0 {
1774 reg = <0>;
1775 remote-endpoint = <&csi20vin7>;
1776 };
1777 vin7csi41: endpoint@3 {
1778 reg = <3>;
1779 remote-endpoint = <&csi41vin7>;
1780 };
1781 };
1782 };
1783 };
1784
1785 drif00: rif@e6f40000 {
1786 compatible = "renesas,r8a7795-drif",
1787 "renesas,rcar-gen3-drif";
1788 reg = <0 0xe6f40000 0 0x64>;
1789 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1790 clocks = <&cpg CPG_MOD 515>;
1791 clock-names = "fck";
1792 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1793 dma-names = "rx", "rx";
1794 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1795 resets = <&cpg 515>;
1796 renesas,bonding = <&drif01>;
1797 status = "disabled";
1798 };
1799
1800 drif01: rif@e6f50000 {
1801 compatible = "renesas,r8a7795-drif",
1802 "renesas,rcar-gen3-drif";
1803 reg = <0 0xe6f50000 0 0x64>;
1804 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1805 clocks = <&cpg CPG_MOD 514>;
1806 clock-names = "fck";
1807 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1808 dma-names = "rx", "rx";
1809 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1810 resets = <&cpg 514>;
1811 renesas,bonding = <&drif00>;
1812 status = "disabled";
1813 };
1814
1815 drif10: rif@e6f60000 {
1816 compatible = "renesas,r8a7795-drif",
1817 "renesas,rcar-gen3-drif";
1818 reg = <0 0xe6f60000 0 0x64>;
1819 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1820 clocks = <&cpg CPG_MOD 513>;
1821 clock-names = "fck";
1822 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1823 dma-names = "rx", "rx";
1824 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1825 resets = <&cpg 513>;
1826 renesas,bonding = <&drif11>;
1827 status = "disabled";
1828 };
1829
1830 drif11: rif@e6f70000 {
1831 compatible = "renesas,r8a7795-drif",
1832 "renesas,rcar-gen3-drif";
1833 reg = <0 0xe6f70000 0 0x64>;
1834 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1835 clocks = <&cpg CPG_MOD 512>;
1836 clock-names = "fck";
1837 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1838 dma-names = "rx", "rx";
1839 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1840 resets = <&cpg 512>;
1841 renesas,bonding = <&drif10>;
1842 status = "disabled";
1843 };
1844
1845 drif20: rif@e6f80000 {
1846 compatible = "renesas,r8a7795-drif",
1847 "renesas,rcar-gen3-drif";
1848 reg = <0 0xe6f80000 0 0x64>;
1849 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1850 clocks = <&cpg CPG_MOD 511>;
1851 clock-names = "fck";
1852 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1853 dma-names = "rx", "rx";
1854 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1855 resets = <&cpg 511>;
1856 renesas,bonding = <&drif21>;
1857 status = "disabled";
1858 };
1859
1860 drif21: rif@e6f90000 {
1861 compatible = "renesas,r8a7795-drif",
1862 "renesas,rcar-gen3-drif";
1863 reg = <0 0xe6f90000 0 0x64>;
1864 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1865 clocks = <&cpg CPG_MOD 510>;
1866 clock-names = "fck";
1867 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1868 dma-names = "rx", "rx";
1869 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1870 resets = <&cpg 510>;
1871 renesas,bonding = <&drif20>;
1872 status = "disabled";
1873 };
1874
1875 drif30: rif@e6fa0000 {
1876 compatible = "renesas,r8a7795-drif",
1877 "renesas,rcar-gen3-drif";
1878 reg = <0 0xe6fa0000 0 0x64>;
1879 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1880 clocks = <&cpg CPG_MOD 509>;
1881 clock-names = "fck";
1882 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1883 dma-names = "rx", "rx";
1884 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1885 resets = <&cpg 509>;
1886 renesas,bonding = <&drif31>;
1887 status = "disabled";
1888 };
1889
1890 drif31: rif@e6fb0000 {
1891 compatible = "renesas,r8a7795-drif",
1892 "renesas,rcar-gen3-drif";
1893 reg = <0 0xe6fb0000 0 0x64>;
1894 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1895 clocks = <&cpg CPG_MOD 508>;
1896 clock-names = "fck";
1897 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1898 dma-names = "rx", "rx";
1899 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1900 resets = <&cpg 508>;
1901 renesas,bonding = <&drif30>;
1902 status = "disabled";
1903 };
1904
1905 rcar_sound: sound@ec500000 {
1906 /*
1907 * #sound-dai-cells is required
1908 *
1909 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1910 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1911 */
1912 /*
1913 * #clock-cells is required for audio_clkout0/1/2/3
1914 *
1915 * clkout : #clock-cells = <0>; <&rcar_sound>;
1916 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1917 */
1918 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1919 reg = <0 0xec500000 0 0x1000>, /* SCU */
1920 <0 0xec5a0000 0 0x100>, /* ADG */
1921 <0 0xec540000 0 0x1000>, /* SSIU */
1922 <0 0xec541000 0 0x280>, /* SSI */
1923 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1924 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1925
1926 clocks = <&cpg CPG_MOD 1005>,
1927 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1928 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1929 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1930 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1931 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1932 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1933 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1934 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1935 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1936 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1937 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1938 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1939 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1940 <&audio_clk_a>, <&audio_clk_b>,
1941 <&audio_clk_c>,
1942 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1943 clock-names = "ssi-all",
1944 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1945 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1946 "ssi.1", "ssi.0",
1947 "src.9", "src.8", "src.7", "src.6",
1948 "src.5", "src.4", "src.3", "src.2",
1949 "src.1", "src.0",
1950 "mix.1", "mix.0",
1951 "ctu.1", "ctu.0",
1952 "dvc.0", "dvc.1",
1953 "clk_a", "clk_b", "clk_c", "clk_i";
1954 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1955 resets = <&cpg 1005>,
1956 <&cpg 1006>, <&cpg 1007>,
1957 <&cpg 1008>, <&cpg 1009>,
1958 <&cpg 1010>, <&cpg 1011>,
1959 <&cpg 1012>, <&cpg 1013>,
1960 <&cpg 1014>, <&cpg 1015>;
1961 reset-names = "ssi-all",
1962 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1963 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1964 "ssi.1", "ssi.0";
1965 status = "disabled";
1966
1967 rcar_sound,dvc {
1968 dvc0: dvc-0 {
1969 dmas = <&audma1 0xbc>;
1970 dma-names = "tx";
1971 };
1972 dvc1: dvc-1 {
1973 dmas = <&audma1 0xbe>;
1974 dma-names = "tx";
1975 };
1976 };
1977
1978 rcar_sound,mix {
1979 mix0: mix-0 { };
1980 mix1: mix-1 { };
1981 };
1982
1983 rcar_sound,ctu {
1984 ctu00: ctu-0 { };
1985 ctu01: ctu-1 { };
1986 ctu02: ctu-2 { };
1987 ctu03: ctu-3 { };
1988 ctu10: ctu-4 { };
1989 ctu11: ctu-5 { };
1990 ctu12: ctu-6 { };
1991 ctu13: ctu-7 { };
1992 };
1993
1994 rcar_sound,src {
1995 src0: src-0 {
1996 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1997 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1998 dma-names = "rx", "tx";
1999 };
2000 src1: src-1 {
2001 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
2002 dmas = <&audma0 0x87>, <&audma1 0x9c>;
2003 dma-names = "rx", "tx";
2004 };
2005 src2: src-2 {
2006 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
2007 dmas = <&audma0 0x89>, <&audma1 0x9e>;
2008 dma-names = "rx", "tx";
2009 };
2010 src3: src-3 {
2011 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
2012 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2013 dma-names = "rx", "tx";
2014 };
2015 src4: src-4 {
2016 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
2017 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2018 dma-names = "rx", "tx";
2019 };
2020 src5: src-5 {
2021 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
2022 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2023 dma-names = "rx", "tx";
2024 };
2025 src6: src-6 {
2026 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2027 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2028 dma-names = "rx", "tx";
2029 };
2030 src7: src-7 {
2031 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2032 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2033 dma-names = "rx", "tx";
2034 };
2035 src8: src-8 {
2036 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2037 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2038 dma-names = "rx", "tx";
2039 };
2040 src9: src-9 {
2041 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2042 dmas = <&audma0 0x97>, <&audma1 0xba>;
2043 dma-names = "rx", "tx";
2044 };
2045 };
2046
2047 rcar_sound,ssiu {
2048 ssiu00: ssiu-0 {
2049 dmas = <&audma0 0x15>, <&audma1 0x16>;
2050 dma-names = "rx", "tx";
2051 };
2052 ssiu01: ssiu-1 {
2053 dmas = <&audma0 0x35>, <&audma1 0x36>;
2054 dma-names = "rx", "tx";
2055 };
2056 ssiu02: ssiu-2 {
2057 dmas = <&audma0 0x37>, <&audma1 0x38>;
2058 dma-names = "rx", "tx";
2059 };
2060 ssiu03: ssiu-3 {
2061 dmas = <&audma0 0x47>, <&audma1 0x48>;
2062 dma-names = "rx", "tx";
2063 };
2064 ssiu04: ssiu-4 {
2065 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2066 dma-names = "rx", "tx";
2067 };
2068 ssiu05: ssiu-5 {
2069 dmas = <&audma0 0x43>, <&audma1 0x44>;
2070 dma-names = "rx", "tx";
2071 };
2072 ssiu06: ssiu-6 {
2073 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2074 dma-names = "rx", "tx";
2075 };
2076 ssiu07: ssiu-7 {
2077 dmas = <&audma0 0x53>, <&audma1 0x54>;
2078 dma-names = "rx", "tx";
2079 };
2080 ssiu10: ssiu-8 {
2081 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2082 dma-names = "rx", "tx";
2083 };
2084 ssiu11: ssiu-9 {
2085 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2086 dma-names = "rx", "tx";
2087 };
2088 ssiu12: ssiu-10 {
2089 dmas = <&audma0 0x57>, <&audma1 0x58>;
2090 dma-names = "rx", "tx";
2091 };
2092 ssiu13: ssiu-11 {
2093 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2094 dma-names = "rx", "tx";
2095 };
2096 ssiu14: ssiu-12 {
2097 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2098 dma-names = "rx", "tx";
2099 };
2100 ssiu15: ssiu-13 {
2101 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2102 dma-names = "rx", "tx";
2103 };
2104 ssiu16: ssiu-14 {
2105 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2106 dma-names = "rx", "tx";
2107 };
2108 ssiu17: ssiu-15 {
2109 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2110 dma-names = "rx", "tx";
2111 };
2112 ssiu20: ssiu-16 {
2113 dmas = <&audma0 0x63>, <&audma1 0x64>;
2114 dma-names = "rx", "tx";
2115 };
2116 ssiu21: ssiu-17 {
2117 dmas = <&audma0 0x67>, <&audma1 0x68>;
2118 dma-names = "rx", "tx";
2119 };
2120 ssiu22: ssiu-18 {
2121 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2122 dma-names = "rx", "tx";
2123 };
2124 ssiu23: ssiu-19 {
2125 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2126 dma-names = "rx", "tx";
2127 };
2128 ssiu24: ssiu-20 {
2129 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2130 dma-names = "rx", "tx";
2131 };
2132 ssiu25: ssiu-21 {
2133 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2134 dma-names = "rx", "tx";
2135 };
2136 ssiu26: ssiu-22 {
2137 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2138 dma-names = "rx", "tx";
2139 };
2140 ssiu27: ssiu-23 {
2141 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2142 dma-names = "rx", "tx";
2143 };
2144 ssiu30: ssiu-24 {
2145 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2146 dma-names = "rx", "tx";
2147 };
2148 ssiu31: ssiu-25 {
2149 dmas = <&audma0 0x21>, <&audma1 0x22>;
2150 dma-names = "rx", "tx";
2151 };
2152 ssiu32: ssiu-26 {
2153 dmas = <&audma0 0x23>, <&audma1 0x24>;
2154 dma-names = "rx", "tx";
2155 };
2156 ssiu33: ssiu-27 {
2157 dmas = <&audma0 0x25>, <&audma1 0x26>;
2158 dma-names = "rx", "tx";
2159 };
2160 ssiu34: ssiu-28 {
2161 dmas = <&audma0 0x27>, <&audma1 0x28>;
2162 dma-names = "rx", "tx";
2163 };
2164 ssiu35: ssiu-29 {
2165 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2166 dma-names = "rx", "tx";
2167 };
2168 ssiu36: ssiu-30 {
2169 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2170 dma-names = "rx", "tx";
2171 };
2172 ssiu37: ssiu-31 {
2173 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2174 dma-names = "rx", "tx";
2175 };
2176 ssiu40: ssiu-32 {
2177 dmas = <&audma0 0x71>, <&audma1 0x72>;
2178 dma-names = "rx", "tx";
2179 };
2180 ssiu41: ssiu-33 {
2181 dmas = <&audma0 0x17>, <&audma1 0x18>;
2182 dma-names = "rx", "tx";
2183 };
2184 ssiu42: ssiu-34 {
2185 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2186 dma-names = "rx", "tx";
2187 };
2188 ssiu43: ssiu-35 {
2189 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2190 dma-names = "rx", "tx";
2191 };
2192 ssiu44: ssiu-36 {
2193 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2194 dma-names = "rx", "tx";
2195 };
2196 ssiu45: ssiu-37 {
2197 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2198 dma-names = "rx", "tx";
2199 };
2200 ssiu46: ssiu-38 {
2201 dmas = <&audma0 0x31>, <&audma1 0x32>;
2202 dma-names = "rx", "tx";
2203 };
2204 ssiu47: ssiu-39 {
2205 dmas = <&audma0 0x33>, <&audma1 0x34>;
2206 dma-names = "rx", "tx";
2207 };
2208 ssiu50: ssiu-40 {
2209 dmas = <&audma0 0x73>, <&audma1 0x74>;
2210 dma-names = "rx", "tx";
2211 };
2212 ssiu60: ssiu-41 {
2213 dmas = <&audma0 0x75>, <&audma1 0x76>;
2214 dma-names = "rx", "tx";
2215 };
2216 ssiu70: ssiu-42 {
2217 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2218 dma-names = "rx", "tx";
2219 };
2220 ssiu80: ssiu-43 {
2221 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2222 dma-names = "rx", "tx";
2223 };
2224 ssiu90: ssiu-44 {
2225 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2226 dma-names = "rx", "tx";
2227 };
2228 ssiu91: ssiu-45 {
2229 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2230 dma-names = "rx", "tx";
2231 };
2232 ssiu92: ssiu-46 {
2233 dmas = <&audma0 0x81>, <&audma1 0x82>;
2234 dma-names = "rx", "tx";
2235 };
2236 ssiu93: ssiu-47 {
2237 dmas = <&audma0 0x83>, <&audma1 0x84>;
2238 dma-names = "rx", "tx";
2239 };
2240 ssiu94: ssiu-48 {
2241 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2242 dma-names = "rx", "tx";
2243 };
2244 ssiu95: ssiu-49 {
2245 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2246 dma-names = "rx", "tx";
2247 };
2248 ssiu96: ssiu-50 {
2249 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2250 dma-names = "rx", "tx";
2251 };
2252 ssiu97: ssiu-51 {
2253 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2254 dma-names = "rx", "tx";
2255 };
2256 };
2257
2258 rcar_sound,ssi {
2259 ssi0: ssi-0 {
2260 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2261 dmas = <&audma0 0x01>, <&audma1 0x02>;
2262 dma-names = "rx", "tx";
2263 };
2264 ssi1: ssi-1 {
2265 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2266 dmas = <&audma0 0x03>, <&audma1 0x04>;
2267 dma-names = "rx", "tx";
2268 };
2269 ssi2: ssi-2 {
2270 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2271 dmas = <&audma0 0x05>, <&audma1 0x06>;
2272 dma-names = "rx", "tx";
2273 };
2274 ssi3: ssi-3 {
2275 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2276 dmas = <&audma0 0x07>, <&audma1 0x08>;
2277 dma-names = "rx", "tx";
2278 };
2279 ssi4: ssi-4 {
2280 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2281 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2282 dma-names = "rx", "tx";
2283 };
2284 ssi5: ssi-5 {
2285 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2286 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2287 dma-names = "rx", "tx";
2288 };
2289 ssi6: ssi-6 {
2290 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2291 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2292 dma-names = "rx", "tx";
2293 };
2294 ssi7: ssi-7 {
2295 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2296 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2297 dma-names = "rx", "tx";
2298 };
2299 ssi8: ssi-8 {
2300 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2301 dmas = <&audma0 0x11>, <&audma1 0x12>;
2302 dma-names = "rx", "tx";
2303 };
2304 ssi9: ssi-9 {
2305 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2306 dmas = <&audma0 0x13>, <&audma1 0x14>;
2307 dma-names = "rx", "tx";
2308 };
2309 };
2310 };
2311
2312 audma0: dma-controller@ec700000 {
2313 compatible = "renesas,dmac-r8a7795",
2314 "renesas,rcar-dmac";
2315 reg = <0 0xec700000 0 0x10000>;
2316 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2317 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
2318 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
2319 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
2320 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2321 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2322 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2323 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2324 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2325 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2326 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2327 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2328 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2329 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2330 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2331 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2332 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2333 interrupt-names = "error",
2334 "ch0", "ch1", "ch2", "ch3",
2335 "ch4", "ch5", "ch6", "ch7",
2336 "ch8", "ch9", "ch10", "ch11",
2337 "ch12", "ch13", "ch14", "ch15";
2338 clocks = <&cpg CPG_MOD 502>;
2339 clock-names = "fck";
2340 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2341 resets = <&cpg 502>;
2342 #dma-cells = <1>;
2343 dma-channels = <16>;
2344 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2345 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2346 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2347 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2348 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2349 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2350 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2351 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2352 };
2353
2354 audma1: dma-controller@ec720000 {
2355 compatible = "renesas,dmac-r8a7795",
2356 "renesas,rcar-dmac";
2357 reg = <0 0xec720000 0 0x10000>;
2358 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2359 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2360 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2361 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2362 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2363 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2364 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2365 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2366 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2367 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2368 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2369 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2370 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2371 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2372 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2373 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2374 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2375 interrupt-names = "error",
2376 "ch0", "ch1", "ch2", "ch3",
2377 "ch4", "ch5", "ch6", "ch7",
2378 "ch8", "ch9", "ch10", "ch11",
2379 "ch12", "ch13", "ch14", "ch15";
2380 clocks = <&cpg CPG_MOD 501>;
2381 clock-names = "fck";
2382 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2383 resets = <&cpg 501>;
2384 #dma-cells = <1>;
2385 dma-channels = <16>;
2386 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2387 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2388 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2389 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2390 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2391 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2392 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2393 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2394 };
2395
2396 xhci0: usb@ee000000 {
2397 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2398 reg = <0 0xee000000 0 0xc00>;
2399 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2400 clocks = <&cpg CPG_MOD 328>;
2401 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2402 resets = <&cpg 328>;
2403 status = "disabled";
2404 };
2405
2406 usb3_peri0: usb@ee020000 {
2407 compatible = "renesas,r8a7795-usb3-peri",
2408 "renesas,rcar-gen3-usb3-peri";
2409 reg = <0 0xee020000 0 0x400>;
2410 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2411 clocks = <&cpg CPG_MOD 328>;
2412 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2413 resets = <&cpg 328>;
2414 status = "disabled";
2415 };
2416
2417 ohci0: usb@ee080000 {
2418 compatible = "generic-ohci";
2419 reg = <0 0xee080000 0 0x100>;
2420 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2421 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2422 phys = <&usb2_phy0 1>;
2423 phy-names = "usb";
2424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2425 resets = <&cpg 703>, <&cpg 704>;
2426 status = "disabled";
2427 };
2428
2429 ohci1: usb@ee0a0000 {
2430 compatible = "generic-ohci";
2431 reg = <0 0xee0a0000 0 0x100>;
2432 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2433 clocks = <&cpg CPG_MOD 702>;
2434 phys = <&usb2_phy1 1>;
2435 phy-names = "usb";
2436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2437 resets = <&cpg 702>;
2438 status = "disabled";
2439 };
2440
2441 ohci2: usb@ee0c0000 {
2442 compatible = "generic-ohci";
2443 reg = <0 0xee0c0000 0 0x100>;
2444 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2445 clocks = <&cpg CPG_MOD 701>;
2446 phys = <&usb2_phy2 1>;
2447 phy-names = "usb";
2448 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2449 resets = <&cpg 701>;
2450 status = "disabled";
2451 };
2452
2453 ohci3: usb@ee0e0000 {
2454 compatible = "generic-ohci";
2455 reg = <0 0xee0e0000 0 0x100>;
2456 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2457 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2458 phys = <&usb2_phy3 1>;
2459 phy-names = "usb";
2460 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2461 resets = <&cpg 700>, <&cpg 705>;
2462 status = "disabled";
2463 };
2464
2465 ehci0: usb@ee080100 {
2466 compatible = "generic-ehci";
2467 reg = <0 0xee080100 0 0x100>;
2468 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2469 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2470 phys = <&usb2_phy0 2>;
2471 phy-names = "usb";
2472 companion = <&ohci0>;
2473 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2474 resets = <&cpg 703>, <&cpg 704>;
2475 status = "disabled";
2476 };
2477
2478 ehci1: usb@ee0a0100 {
2479 compatible = "generic-ehci";
2480 reg = <0 0xee0a0100 0 0x100>;
2481 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2482 clocks = <&cpg CPG_MOD 702>;
2483 phys = <&usb2_phy1 2>;
2484 phy-names = "usb";
2485 companion = <&ohci1>;
2486 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2487 resets = <&cpg 702>;
2488 status = "disabled";
2489 };
2490
2491 ehci2: usb@ee0c0100 {
2492 compatible = "generic-ehci";
2493 reg = <0 0xee0c0100 0 0x100>;
2494 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2495 clocks = <&cpg CPG_MOD 701>;
2496 phys = <&usb2_phy2 2>;
2497 phy-names = "usb";
2498 companion = <&ohci2>;
2499 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2500 resets = <&cpg 701>;
2501 status = "disabled";
2502 };
2503
2504 ehci3: usb@ee0e0100 {
2505 compatible = "generic-ehci";
2506 reg = <0 0xee0e0100 0 0x100>;
2507 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2508 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2509 phys = <&usb2_phy3 2>;
2510 phy-names = "usb";
2511 companion = <&ohci3>;
2512 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2513 resets = <&cpg 700>, <&cpg 705>;
2514 status = "disabled";
2515 };
2516
2517 usb2_phy0: usb-phy@ee080200 {
2518 compatible = "renesas,usb2-phy-r8a7795",
2519 "renesas,rcar-gen3-usb2-phy";
2520 reg = <0 0xee080200 0 0x700>;
2521 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2522 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2523 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2524 resets = <&cpg 703>, <&cpg 704>;
2525 #phy-cells = <1>;
2526 status = "disabled";
2527 };
2528
2529 usb2_phy1: usb-phy@ee0a0200 {
2530 compatible = "renesas,usb2-phy-r8a7795",
2531 "renesas,rcar-gen3-usb2-phy";
2532 reg = <0 0xee0a0200 0 0x700>;
2533 clocks = <&cpg CPG_MOD 702>;
2534 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2535 resets = <&cpg 702>;
2536 #phy-cells = <1>;
2537 status = "disabled";
2538 };
2539
2540 usb2_phy2: usb-phy@ee0c0200 {
2541 compatible = "renesas,usb2-phy-r8a7795",
2542 "renesas,rcar-gen3-usb2-phy";
2543 reg = <0 0xee0c0200 0 0x700>;
2544 clocks = <&cpg CPG_MOD 701>;
2545 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2546 resets = <&cpg 701>;
2547 #phy-cells = <1>;
2548 status = "disabled";
2549 };
2550
2551 usb2_phy3: usb-phy@ee0e0200 {
2552 compatible = "renesas,usb2-phy-r8a7795",
2553 "renesas,rcar-gen3-usb2-phy";
2554 reg = <0 0xee0e0200 0 0x700>;
2555 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2556 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2557 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2558 resets = <&cpg 700>, <&cpg 705>;
2559 #phy-cells = <1>;
2560 status = "disabled";
2561 };
2562
2563 sdhi0: sd@ee100000 {
2564 compatible = "renesas,sdhi-r8a7795",
2565 "renesas,rcar-gen3-sdhi";
2566 reg = <0 0xee100000 0 0x2000>;
2567 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2568 clocks = <&cpg CPG_MOD 314>;
2569 max-frequency = <200000000>;
2570 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2571 resets = <&cpg 314>;
2572 status = "disabled";
2573 };
2574
2575 sdhi1: sd@ee120000 {
2576 compatible = "renesas,sdhi-r8a7795",
2577 "renesas,rcar-gen3-sdhi";
2578 reg = <0 0xee120000 0 0x2000>;
2579 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2580 clocks = <&cpg CPG_MOD 313>;
2581 max-frequency = <200000000>;
2582 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2583 resets = <&cpg 313>;
2584 status = "disabled";
2585 };
2586
2587 sdhi2: sd@ee140000 {
2588 compatible = "renesas,sdhi-r8a7795",
2589 "renesas,rcar-gen3-sdhi";
2590 reg = <0 0xee140000 0 0x2000>;
2591 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2592 clocks = <&cpg CPG_MOD 312>;
2593 max-frequency = <200000000>;
2594 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2595 resets = <&cpg 312>;
2596 status = "disabled";
2597 };
2598
2599 sdhi3: sd@ee160000 {
2600 compatible = "renesas,sdhi-r8a7795",
2601 "renesas,rcar-gen3-sdhi";
2602 reg = <0 0xee160000 0 0x2000>;
2603 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2604 clocks = <&cpg CPG_MOD 311>;
2605 max-frequency = <200000000>;
2606 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2607 resets = <&cpg 311>;
2608 status = "disabled";
2609 };
2610
2611 sata: sata@ee300000 {
2612 compatible = "renesas,sata-r8a7795",
2613 "renesas,rcar-gen3-sata";
2614 reg = <0 0xee300000 0 0x200000>;
2615 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2616 clocks = <&cpg CPG_MOD 815>;
2617 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2618 resets = <&cpg 815>;
2619 status = "disabled";
2620 iommus = <&ipmmu_hc 2>;
2621 };
2622
2623 gic: interrupt-controller@f1010000 {
2624 compatible = "arm,gic-400";
2625 #interrupt-cells = <3>;
2626 #address-cells = <0>;
2627 interrupt-controller;
2628 reg = <0x0 0xf1010000 0 0x1000>,
2629 <0x0 0xf1020000 0 0x20000>,
2630 <0x0 0xf1040000 0 0x20000>,
2631 <0x0 0xf1060000 0 0x20000>;
2632 interrupts = <GIC_PPI 9
2633 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2634 clocks = <&cpg CPG_MOD 408>;
2635 clock-names = "clk";
2636 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2637 resets = <&cpg 408>;
2638 };
2639
2640 pciec0: pcie@fe000000 {
2641 compatible = "renesas,pcie-r8a7795",
2642 "renesas,pcie-rcar-gen3";
2643 reg = <0 0xfe000000 0 0x80000>;
2644 #address-cells = <3>;
2645 #size-cells = <2>;
2646 bus-range = <0x00 0xff>;
2647 device_type = "pci";
2648 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2649 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2650 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2651 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2652 /* Map all possible DDR as inbound ranges */
2653 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2654 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2655 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2656 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2657 #interrupt-cells = <1>;
2658 interrupt-map-mask = <0 0 0 0>;
2659 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2660 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2661 clock-names = "pcie", "pcie_bus";
2662 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2663 resets = <&cpg 319>;
2664 status = "disabled";
2665 };
2666
2667 pciec1: pcie@ee800000 {
2668 compatible = "renesas,pcie-r8a7795",
2669 "renesas,pcie-rcar-gen3";
2670 reg = <0 0xee800000 0 0x80000>;
2671 #address-cells = <3>;
2672 #size-cells = <2>;
2673 bus-range = <0x00 0xff>;
2674 device_type = "pci";
2675 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2676 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2677 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2678 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2679 /* Map all possible DDR as inbound ranges */
2680 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2681 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2682 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2683 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2684 #interrupt-cells = <1>;
2685 interrupt-map-mask = <0 0 0 0>;
2686 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2687 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2688 clock-names = "pcie", "pcie_bus";
2689 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2690 resets = <&cpg 318>;
2691 status = "disabled";
2692 };
2693
2694 imr-lx4@fe860000 {
2695 compatible = "renesas,r8a7795-imr-lx4",
2696 "renesas,imr-lx4";
2697 reg = <0 0xfe860000 0 0x2000>;
2698 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2699 clocks = <&cpg CPG_MOD 823>;
2700 power-domains = <&sysc R8A7795_PD_A3VC>;
2701 resets = <&cpg 823>;
2702 };
2703
2704 imr-lx4@fe870000 {
2705 compatible = "renesas,r8a7795-imr-lx4",
2706 "renesas,imr-lx4";
2707 reg = <0 0xfe870000 0 0x2000>;
2708 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2709 clocks = <&cpg CPG_MOD 822>;
2710 power-domains = <&sysc R8A7795_PD_A3VC>;
2711 resets = <&cpg 822>;
2712 };
2713
2714 imr-lx4@fe880000 {
2715 compatible = "renesas,r8a7795-imr-lx4",
2716 "renesas,imr-lx4";
2717 reg = <0 0xfe880000 0 0x2000>;
2718 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2719 clocks = <&cpg CPG_MOD 821>;
2720 power-domains = <&sysc R8A7795_PD_A3VC>;
2721 resets = <&cpg 821>;
2722 };
2723
2724 imr-lx4@fe890000 {
2725 compatible = "renesas,r8a7795-imr-lx4",
2726 "renesas,imr-lx4";
2727 reg = <0 0xfe890000 0 0x2000>;
2728 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2729 clocks = <&cpg CPG_MOD 820>;
2730 power-domains = <&sysc R8A7795_PD_A3VC>;
2731 resets = <&cpg 820>;
2732 };
2733
2734 vspbc: vsp@fe920000 {
2735 compatible = "renesas,vsp2";
2736 reg = <0 0xfe920000 0 0x8000>;
2737 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2738 clocks = <&cpg CPG_MOD 624>;
2739 power-domains = <&sysc R8A7795_PD_A3VP>;
2740 resets = <&cpg 624>;
2741
2742 renesas,fcp = <&fcpvb1>;
2743 };
2744
2745 vspbd: vsp@fe960000 {
2746 compatible = "renesas,vsp2";
2747 reg = <0 0xfe960000 0 0x8000>;
2748 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2749 clocks = <&cpg CPG_MOD 626>;
2750 power-domains = <&sysc R8A7795_PD_A3VP>;
2751 resets = <&cpg 626>;
2752
2753 renesas,fcp = <&fcpvb0>;
2754 };
2755
2756 vspd0: vsp@fea20000 {
2757 compatible = "renesas,vsp2";
2758 reg = <0 0xfea20000 0 0x5000>;
2759 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2760 clocks = <&cpg CPG_MOD 623>;
2761 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2762 resets = <&cpg 623>;
2763
2764 renesas,fcp = <&fcpvd0>;
2765 };
2766
2767 vspd1: vsp@fea28000 {
2768 compatible = "renesas,vsp2";
2769 reg = <0 0xfea28000 0 0x5000>;
2770 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2771 clocks = <&cpg CPG_MOD 622>;
2772 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2773 resets = <&cpg 622>;
2774
2775 renesas,fcp = <&fcpvd1>;
2776 };
2777
2778 vspd2: vsp@fea30000 {
2779 compatible = "renesas,vsp2";
2780 reg = <0 0xfea30000 0 0x5000>;
2781 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2782 clocks = <&cpg CPG_MOD 621>;
2783 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2784 resets = <&cpg 621>;
2785
2786 renesas,fcp = <&fcpvd2>;
2787 };
2788
2789 vspi0: vsp@fe9a0000 {
2790 compatible = "renesas,vsp2";
2791 reg = <0 0xfe9a0000 0 0x8000>;
2792 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2793 clocks = <&cpg CPG_MOD 631>;
2794 power-domains = <&sysc R8A7795_PD_A3VP>;
2795 resets = <&cpg 631>;
2796
2797 renesas,fcp = <&fcpvi0>;
2798 };
2799
2800 vspi1: vsp@fe9b0000 {
2801 compatible = "renesas,vsp2";
2802 reg = <0 0xfe9b0000 0 0x8000>;
2803 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2804 clocks = <&cpg CPG_MOD 630>;
2805 power-domains = <&sysc R8A7795_PD_A3VP>;
2806 resets = <&cpg 630>;
2807
2808 renesas,fcp = <&fcpvi1>;
2809 };
2810
2811 fdp1@fe940000 {
2812 compatible = "renesas,fdp1";
2813 reg = <0 0xfe940000 0 0x2400>;
2814 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2815 clocks = <&cpg CPG_MOD 119>;
2816 power-domains = <&sysc R8A7795_PD_A3VP>;
2817 resets = <&cpg 119>;
2818 renesas,fcp = <&fcpf0>;
2819 };
2820
2821 fdp1@fe944000 {
2822 compatible = "renesas,fdp1";
2823 reg = <0 0xfe944000 0 0x2400>;
2824 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2825 clocks = <&cpg CPG_MOD 118>;
2826 power-domains = <&sysc R8A7795_PD_A3VP>;
2827 resets = <&cpg 118>;
2828 renesas,fcp = <&fcpf1>;
2829 };
2830
2831 fcpf0: fcp@fe950000 {
2832 compatible = "renesas,fcpf";
2833 reg = <0 0xfe950000 0 0x200>;
2834 clocks = <&cpg CPG_MOD 615>;
2835 power-domains = <&sysc R8A7795_PD_A3VP>;
2836 resets = <&cpg 615>;
2837 iommus = <&ipmmu_vp0 0>;
2838 };
2839
2840 fcpf1: fcp@fe951000 {
2841 compatible = "renesas,fcpf";
2842 reg = <0 0xfe951000 0 0x200>;
2843 clocks = <&cpg CPG_MOD 614>;
2844 power-domains = <&sysc R8A7795_PD_A3VP>;
2845 resets = <&cpg 614>;
2846 iommus = <&ipmmu_vp1 1>;
2847 };
2848
2849 fcpvb0: fcp@fe96f000 {
2850 compatible = "renesas,fcpv";
2851 reg = <0 0xfe96f000 0 0x200>;
2852 clocks = <&cpg CPG_MOD 607>;
2853 power-domains = <&sysc R8A7795_PD_A3VP>;
2854 resets = <&cpg 607>;
2855 iommus = <&ipmmu_vp0 5>;
2856 };
2857
2858 fcpvb1: fcp@fe92f000 {
2859 compatible = "renesas,fcpv";
2860 reg = <0 0xfe92f000 0 0x200>;
2861 clocks = <&cpg CPG_MOD 606>;
2862 power-domains = <&sysc R8A7795_PD_A3VP>;
2863 resets = <&cpg 606>;
2864 iommus = <&ipmmu_vp1 7>;
2865 };
2866
2867 fcpvi0: fcp@fe9af000 {
2868 compatible = "renesas,fcpv";
2869 reg = <0 0xfe9af000 0 0x200>;
2870 clocks = <&cpg CPG_MOD 611>;
2871 power-domains = <&sysc R8A7795_PD_A3VP>;
2872 resets = <&cpg 611>;
2873 iommus = <&ipmmu_vp0 8>;
2874 };
2875
2876 fcpvi1: fcp@fe9bf000 {
2877 compatible = "renesas,fcpv";
2878 reg = <0 0xfe9bf000 0 0x200>;
2879 clocks = <&cpg CPG_MOD 610>;
2880 power-domains = <&sysc R8A7795_PD_A3VP>;
2881 resets = <&cpg 610>;
2882 iommus = <&ipmmu_vp1 9>;
2883 };
2884
2885 fcpvd0: fcp@fea27000 {
2886 compatible = "renesas,fcpv";
2887 reg = <0 0xfea27000 0 0x200>;
2888 clocks = <&cpg CPG_MOD 603>;
2889 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2890 resets = <&cpg 603>;
2891 iommus = <&ipmmu_vi0 8>;
2892 };
2893
2894 fcpvd1: fcp@fea2f000 {
2895 compatible = "renesas,fcpv";
2896 reg = <0 0xfea2f000 0 0x200>;
2897 clocks = <&cpg CPG_MOD 602>;
2898 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2899 resets = <&cpg 602>;
2900 iommus = <&ipmmu_vi0 9>;
2901 };
2902
2903 fcpvd2: fcp@fea37000 {
2904 compatible = "renesas,fcpv";
2905 reg = <0 0xfea37000 0 0x200>;
2906 clocks = <&cpg CPG_MOD 601>;
2907 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2908 resets = <&cpg 601>;
2909 iommus = <&ipmmu_vi1 10>;
2910 };
2911
2912 csi20: csi2@fea80000 {
2913 compatible = "renesas,r8a7795-csi2";
2914 reg = <0 0xfea80000 0 0x10000>;
2915 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2916 clocks = <&cpg CPG_MOD 714>;
2917 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2918 resets = <&cpg 714>;
2919 status = "disabled";
2920
2921 ports {
2922 #address-cells = <1>;
2923 #size-cells = <0>;
2924
2925 port@1 {
2926 #address-cells = <1>;
2927 #size-cells = <0>;
2928
2929 reg = <1>;
2930
2931 csi20vin0: endpoint@0 {
2932 reg = <0>;
2933 remote-endpoint = <&vin0csi20>;
2934 };
2935 csi20vin1: endpoint@1 {
2936 reg = <1>;
2937 remote-endpoint = <&vin1csi20>;
2938 };
2939 csi20vin2: endpoint@2 {
2940 reg = <2>;
2941 remote-endpoint = <&vin2csi20>;
2942 };
2943 csi20vin3: endpoint@3 {
2944 reg = <3>;
2945 remote-endpoint = <&vin3csi20>;
2946 };
2947 csi20vin4: endpoint@4 {
2948 reg = <4>;
2949 remote-endpoint = <&vin4csi20>;
2950 };
2951 csi20vin5: endpoint@5 {
2952 reg = <5>;
2953 remote-endpoint = <&vin5csi20>;
2954 };
2955 csi20vin6: endpoint@6 {
2956 reg = <6>;
2957 remote-endpoint = <&vin6csi20>;
2958 };
2959 csi20vin7: endpoint@7 {
2960 reg = <7>;
2961 remote-endpoint = <&vin7csi20>;
2962 };
2963 };
2964 };
2965 };
2966
2967 csi40: csi2@feaa0000 {
2968 compatible = "renesas,r8a7795-csi2";
2969 reg = <0 0xfeaa0000 0 0x10000>;
2970 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2971 clocks = <&cpg CPG_MOD 716>;
2972 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2973 resets = <&cpg 716>;
2974 status = "disabled";
2975
2976 ports {
2977 #address-cells = <1>;
2978 #size-cells = <0>;
2979
2980 port@1 {
2981 #address-cells = <1>;
2982 #size-cells = <0>;
2983
2984 reg = <1>;
2985
2986 csi40vin0: endpoint@0 {
2987 reg = <0>;
2988 remote-endpoint = <&vin0csi40>;
2989 };
2990 csi40vin1: endpoint@1 {
2991 reg = <1>;
2992 remote-endpoint = <&vin1csi40>;
2993 };
2994 csi40vin2: endpoint@2 {
2995 reg = <2>;
2996 remote-endpoint = <&vin2csi40>;
2997 };
2998 csi40vin3: endpoint@3 {
2999 reg = <3>;
3000 remote-endpoint = <&vin3csi40>;
3001 };
3002 };
3003 };
3004 };
3005
3006 csi41: csi2@feab0000 {
3007 compatible = "renesas,r8a7795-csi2";
3008 reg = <0 0xfeab0000 0 0x10000>;
3009 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3010 clocks = <&cpg CPG_MOD 715>;
3011 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3012 resets = <&cpg 715>;
3013 status = "disabled";
3014
3015 ports {
3016 #address-cells = <1>;
3017 #size-cells = <0>;
3018
3019 port@1 {
3020 #address-cells = <1>;
3021 #size-cells = <0>;
3022
3023 reg = <1>;
3024
3025 csi41vin4: endpoint@0 {
3026 reg = <0>;
3027 remote-endpoint = <&vin4csi41>;
3028 };
3029 csi41vin5: endpoint@1 {
3030 reg = <1>;
3031 remote-endpoint = <&vin5csi41>;
3032 };
3033 csi41vin6: endpoint@2 {
3034 reg = <2>;
3035 remote-endpoint = <&vin6csi41>;
3036 };
3037 csi41vin7: endpoint@3 {
3038 reg = <3>;
3039 remote-endpoint = <&vin7csi41>;
3040 };
3041 };
3042 };
3043 };
3044
3045 hdmi0: hdmi@fead0000 {
3046 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3047 reg = <0 0xfead0000 0 0x10000>;
3048 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3049 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3050 clock-names = "iahb", "isfr";
3051 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3052 resets = <&cpg 729>;
3053 status = "disabled";
3054
3055 ports {
3056 #address-cells = <1>;
3057 #size-cells = <0>;
3058 port@0 {
3059 reg = <0>;
3060 dw_hdmi0_in: endpoint {
3061 remote-endpoint = <&du_out_hdmi0>;
3062 };
3063 };
3064 port@1 {
3065 reg = <1>;
3066 };
3067 port@2 {
3068 /* HDMI sound */
3069 reg = <2>;
3070 };
3071 };
3072 };
3073
3074 hdmi1: hdmi@feae0000 {
3075 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3076 reg = <0 0xfeae0000 0 0x10000>;
3077 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3078 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3079 clock-names = "iahb", "isfr";
3080 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3081 resets = <&cpg 728>;
3082 status = "disabled";
3083
3084 ports {
3085 #address-cells = <1>;
3086 #size-cells = <0>;
3087 port@0 {
3088 reg = <0>;
3089 dw_hdmi1_in: endpoint {
3090 remote-endpoint = <&du_out_hdmi1>;
3091 };
3092 };
3093 port@1 {
3094 reg = <1>;
3095 };
3096 port@2 {
3097 /* HDMI sound */
3098 reg = <2>;
3099 };
3100 };
3101 };
3102
3103 du: display@feb00000 {
3104 compatible = "renesas,du-r8a7795";
3105 reg = <0 0xfeb00000 0 0x80000>;
3106 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3107 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3108 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3109 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3110 clocks = <&cpg CPG_MOD 724>,
3111 <&cpg CPG_MOD 723>,
3112 <&cpg CPG_MOD 722>,
3113 <&cpg CPG_MOD 721>;
3114 clock-names = "du.0", "du.1", "du.2", "du.3";
3115 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
3116 status = "disabled";
3117
3118 ports {
3119 #address-cells = <1>;
3120 #size-cells = <0>;
3121
3122 port@0 {
3123 reg = <0>;
3124 du_out_rgb: endpoint {
3125 };
3126 };
3127 port@1 {
3128 reg = <1>;
3129 du_out_hdmi0: endpoint {
3130 remote-endpoint = <&dw_hdmi0_in>;
3131 };
3132 };
3133 port@2 {
3134 reg = <2>;
3135 du_out_hdmi1: endpoint {
3136 remote-endpoint = <&dw_hdmi1_in>;
3137 };
3138 };
3139 port@3 {
3140 reg = <3>;
3141 du_out_lvds0: endpoint {
3142 remote-endpoint = <&lvds0_in>;
3143 };
3144 };
3145 };
3146 };
3147
3148 lvds0: lvds@feb90000 {
3149 compatible = "renesas,r8a7795-lvds";
3150 reg = <0 0xfeb90000 0 0x14>;
3151 clocks = <&cpg CPG_MOD 727>;
3152 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3153 resets = <&cpg 727>;
3154 status = "disabled";
3155
3156 ports {
3157 #address-cells = <1>;
3158 #size-cells = <0>;
3159
3160 port@0 {
3161 reg = <0>;
3162 lvds0_in: endpoint {
3163 remote-endpoint = <&du_out_lvds0>;
3164 };
3165 };
3166 port@1 {
3167 reg = <1>;
3168 lvds0_out: endpoint {
3169 };
3170 };
3171 };
3172 };
3173
3174 prr: chipid@fff00044 {
3175 compatible = "renesas,prr";
3176 reg = <0 0xfff00044 0 4>;
3177 };
3178 };
3179
3180 thermal-zones {
3181 sensor_thermal1: sensor-thermal1 {
3182 polling-delay-passive = <250>;
3183 polling-delay = <1000>;
3184 thermal-sensors = <&tsc 0>;
3185 sustainable-power = <6313>;
3186
3187 trips {
3188 sensor1_crit: sensor1-crit {
3189 temperature = <120000>;
3190 hysteresis = <1000>;
3191 type = "critical";
3192 };
3193 };
3194 };
3195
3196 sensor_thermal2: sensor-thermal2 {
3197 polling-delay-passive = <250>;
3198 polling-delay = <1000>;
3199 thermal-sensors = <&tsc 1>;
3200 sustainable-power = <6313>;
3201
3202 trips {
3203 sensor2_crit: sensor2-crit {
3204 temperature = <120000>;
3205 hysteresis = <1000>;
3206 type = "critical";
3207 };
3208 };
3209 };
3210
3211 sensor_thermal3: sensor-thermal3 {
3212 polling-delay-passive = <250>;
3213 polling-delay = <1000>;
3214 thermal-sensors = <&tsc 2>;
3215
3216 trips {
3217 target: trip-point1 {
3218 temperature = <100000>;
3219 hysteresis = <1000>;
3220 type = "passive";
3221 };
3222
3223 sensor3_crit: sensor3-crit {
3224 temperature = <120000>;
3225 hysteresis = <1000>;
3226 type = "critical";
3227 };
3228 };
3229
3230 cooling-maps {
3231 map0 {
3232 trip = <&target>;
3233 cooling-device = <&a57_0 2 4>;
3234 contribution = <1024>;
3235 };
3236
3237 map1 {
3238 trip = <&target>;
3239 cooling-device = <&a53_0 0 2>;
3240 contribution = <1024>;
3241 };
3242 };
3243 };
3244 };
3245
3246 timer {
3247 compatible = "arm,armv8-timer";
3248 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3249 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3250 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3251 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3252 };
3253
3254 /* External USB clocks - can be overridden by the board */
3255 usb3s0_clk: usb3s0 {
3256 compatible = "fixed-clock";
3257 #clock-cells = <0>;
3258 clock-frequency = <0>;
3259 };
3260
3261 usb_extal_clk: usb_extal {
3262 compatible = "fixed-clock";
3263 #clock-cells = <0>;
3264 clock-frequency = <0>;
3265 };
3266};