| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Spreadtrum Sharkl64 platform DTS file |
| 3 | * |
| 4 | * Copyright (C) 2014, Spreadtrum Communications Inc. |
| 5 | * |
| 6 | * This file is licensed under a dual GPLv2 or X11 license. |
| 7 | */ |
| 8 | |
| 9 | / { |
| 10 | interrupt-parent = <&gic>; |
| 11 | #address-cells = <2>; |
| 12 | #size-cells = <2>; |
| 13 | |
| 14 | soc { |
| 15 | compatible = "simple-bus"; |
| 16 | #address-cells = <2>; |
| 17 | #size-cells = <2>; |
| 18 | ranges; |
| 19 | |
| 20 | ap-apb { |
| 21 | compatible = "simple-bus"; |
| 22 | #address-cells = <2>; |
| 23 | #size-cells = <2>; |
| 24 | ranges; |
| 25 | |
| 26 | uart0: serial@70000000 { |
| 27 | compatible = "sprd,sc9836-uart"; |
| 28 | reg = <0 0x70000000 0 0x100>; |
| 29 | interrupts = <0 2 0xf04>; |
| 30 | clocks = <&clk26mhz>; |
| 31 | status = "disabled"; |
| 32 | }; |
| 33 | |
| 34 | uart1: serial@70100000 { |
| 35 | compatible = "sprd,sc9836-uart"; |
| 36 | reg = <0 0x70100000 0 0x100>; |
| 37 | interrupts = <0 3 0xf04>; |
| 38 | clocks = <&clk26mhz>; |
| 39 | status = "disabled"; |
| 40 | }; |
| 41 | |
| 42 | uart2: serial@70200000 { |
| 43 | compatible = "sprd,sc9836-uart"; |
| 44 | reg = <0 0x70200000 0 0x100>; |
| 45 | interrupts = <0 4 0xf04>; |
| 46 | clocks = <&clk26mhz>; |
| 47 | status = "disabled"; |
| 48 | }; |
| 49 | |
| 50 | uart3: serial@70300000 { |
| 51 | compatible = "sprd,sc9836-uart"; |
| 52 | reg = <0 0x70300000 0 0x100>; |
| 53 | interrupts = <0 5 0xf04>; |
| 54 | clocks = <&clk26mhz>; |
| 55 | status = "disabled"; |
| 56 | }; |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | clk26mhz: clk26mhz { |
| 61 | compatible = "fixed-clock"; |
| 62 | #clock-cells = <0>; |
| 63 | clock-frequency = <26000000>; |
| 64 | }; |
| 65 | }; |