| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/mips/tx4938/common/irq.c |
| 3 | * |
| 4 | * Common tx4938 irq handler |
| 5 | * Copyright (C) 2000-2001 Toshiba Corporation |
| 6 | * |
| 7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the |
| 8 | * terms of the GNU General Public License version 2. This program is |
| 9 | * licensed "as is" without any warranty of any kind, whether express |
| 10 | * or implied. |
| 11 | * |
| 12 | * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) |
| 13 | */ |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <asm/irq_cpu.h> |
| 18 | #include <asm/txx9/tx4938.h> |
| 19 | |
| 20 | void __init tx4938_irq_init(void) |
| 21 | { |
| 22 | int i; |
| 23 | |
| 24 | mips_cpu_irq_init(); |
| 25 | txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); |
| 26 | irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, |
| 27 | handle_simple_irq); |
| 28 | /* raise priority for errors, timers, SIO */ |
| 29 | txx9_irq_set_pri(TX4938_IR_ECCERR, 7); |
| 30 | txx9_irq_set_pri(TX4938_IR_WTOERR, 7); |
| 31 | txx9_irq_set_pri(TX4938_IR_PCIERR, 7); |
| 32 | txx9_irq_set_pri(TX4938_IR_PCIPME, 7); |
| 33 | for (i = 0; i < TX4938_NUM_IR_TMR; i++) |
| 34 | txx9_irq_set_pri(TX4938_IR_TMR(i), 6); |
| 35 | for (i = 0; i < TX4938_NUM_IR_SIO; i++) |
| 36 | txx9_irq_set_pri(TX4938_IR_SIO(i), 5); |
| 37 | } |