blob: 6b9899a4b325ff9f35cb95a5269e40bc8822046f [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*
2 * Base driver for Marvell 88PM805
3 *
4 * Copyright (C) 2013 Marvell International Ltd.
5 * Haojian Zhuang <haojian.zhuang@marvell.com>
6 * Joseph(Yossi) Hanin <yhanin@marvell.com>
7 * Qiao Zhou <zhouqiao@marvell.com>
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/i2c.h>
26#include <linux/irq.h>
27#include <linux/mfd/core.h>
28#include <linux/mfd/88pm80x.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/of_device.h>
32#include <linux/uaccess.h>
33#include <linux/proc_fs.h>
34#include <linux/fs.h>
35#include <linux/debugfs.h>
36
37#define PM80X_AUDIO_REG_NUM 0x9c
38#define PM805_PROC_FILE "driver/pm805_reg"
39static int reg_pm805 = 0xffff;
40
41static const struct i2c_device_id pm80x_id_table[] = {
42 {"88PM805", 0},
43 {} /* NULL terminated */
44};
45MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
46
47static const struct of_device_id pm80x_dt_ids[] = {
48 { .compatible = "marvell,88pm805", },
49 {},
50};
51MODULE_DEVICE_TABLE(of, pm80x_dt_ids);
52
53/* Interrupt Number in 88PM805 */
54enum {
55 PM805_IRQ_HP1_SHRT, /* 0 */
56 PM805_IRQ_HP2_SHRT,
57 PM805_IRQ_MIC_CONFLICT,
58 PM805_IRQ_CLIP_FAULT,
59 PM805_IRQ_SRC_DPLL_LOCK,
60 PM805_IRQ_LDO_OFF, /* 5 */
61
62 PM805_IRQ_MIC_DET, /* 6 */
63 PM805_IRQ_SHRT_BTN_DET,
64 PM805_IRQ_VOLM_BTN_DET,
65 PM805_IRQ_VOLP_BTN_DET,
66 PM805_IRQ_RAW_PLL_FAULT,
67 PM805_IRQ_FINE_PLL_FAULT, /* 11 */
68
69 PM805_MAX_IRQ,
70};
71
72static struct resource codec_resources[] = {
73 {
74 /* Headset microphone insertion or removal */
75 .name = "micin",
76 .start = PM805_IRQ_MIC_DET,
77 .end = PM805_IRQ_MIC_DET,
78 .flags = IORESOURCE_IRQ,
79 },
80 {
81 /* Audio short HP1 */
82 .name = "audio-short1",
83 .start = PM805_IRQ_HP1_SHRT,
84 .end = PM805_IRQ_HP1_SHRT,
85 .flags = IORESOURCE_IRQ,
86 },
87 {
88 /* Audio short HP2 */
89 .name = "audio-short2",
90 .start = PM805_IRQ_HP2_SHRT,
91 .end = PM805_IRQ_HP2_SHRT,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct mfd_cell codec_devs[] = {
97 {
98 .name = "88pm80x-codec",
99 .num_resources = ARRAY_SIZE(codec_resources),
100 .resources = &codec_resources[0],
101 .id = -1,
102 },
103};
104
105static struct regmap_irq pm805_irqs[] = {
106 /* INT0 */
107 [PM805_IRQ_HP1_SHRT] = {
108 .mask = PM805_INT1_HP1_SHRT,
109 },
110 [PM805_IRQ_HP2_SHRT] = {
111 .mask = PM805_INT1_HP2_SHRT,
112 },
113 [PM805_IRQ_MIC_CONFLICT] = {
114 .mask = PM805_INT1_MIC_CONFLICT,
115 },
116 [PM805_IRQ_CLIP_FAULT] = {
117 .mask = PM805_INT1_CLIP_FAULT,
118 },
119 [PM805_IRQ_SRC_DPLL_LOCK] = {
120 .mask = PM805_INT1_SRC_DPLL_LOCK,
121 },
122 [PM805_IRQ_LDO_OFF] = {
123 .mask = PM805_INT1_LDO_OFF,
124 },
125
126 /* INT1 */
127 [PM805_IRQ_MIC_DET] = {
128 .reg_offset = 1,
129 .mask = PM805_INT2_MIC_DET,
130 },
131 [PM805_IRQ_SHRT_BTN_DET] = {
132 .reg_offset = 1,
133 .mask = PM805_INT2_SHRT_BTN_DET,
134 },
135 [PM805_IRQ_VOLM_BTN_DET] = {
136 .reg_offset = 1,
137 .mask = PM805_INT2_VOLM_BTN_DET,
138 },
139 [PM805_IRQ_VOLP_BTN_DET] = {
140 .reg_offset = 1,
141 .mask = PM805_INT2_VOLP_BTN_DET,
142 },
143 [PM805_IRQ_RAW_PLL_FAULT] = {
144 .reg_offset = 1,
145 .mask = PM805_INT2_RAW_PLL_FAULT,
146 },
147 [PM805_IRQ_FINE_PLL_FAULT] = {
148 .reg_offset = 1,
149 .mask = PM805_INT2_FINE_PLL_FAULT,
150 },
151};
152
153static ssize_t pm805_dump_read(struct file *file, char __user *user_buf,
154 size_t count, loff_t *ppos)
155{
156 unsigned int reg_val = 0;
157 struct pm80x_chip *chip = file->private_data;
158 int i;
159 int len = 0;
160 char str[100];
161
162
163 if (reg_pm805 == 0xffff) {
164 len = snprintf(str, sizeof(str) - 1, "%s\n",
165 "pm805: register dump:");
166 for (i = 0; i < PM80X_AUDIO_REG_NUM; i++) {
167 regmap_read(chip->regmap, i, &reg_val);
168 pr_info("[0x%02x]=0x%02x\n", i, reg_val);
169 }
170 } else {
171 regmap_read(chip->regmap, reg_pm805, &reg_val);
172 len = snprintf(str, sizeof(str), "reg_pm805=0x%x, val=0x%x\n",
173 reg_pm805, reg_val);
174 }
175 return simple_read_from_buffer(user_buf, count, ppos, str, len);
176
177}
178
179static ssize_t pm805_dump_write(struct file *file,
180 const char __user *user_buf,
181 size_t count, loff_t *ppos)
182{
183 u8 reg_val;
184 struct pm80x_chip *chip = file->private_data;
185 int i = 0;
186 int ret;
187
188 char messages[20];
189 memset(messages, '\0', 20);
190
191 if (copy_from_user(messages, user_buf, count))
192 return -EFAULT;
193
194 if ('+' == messages[0]) {
195 /* enable to get all the reg value */
196 reg_pm805 = 0xffff;
197 pr_info("read all reg enabled!\n");
198 } else {
199 if (messages[1] != 'x') {
200 pr_err("Right format: 0x[addr]\n");
201 return -EINVAL;
202 }
203
204 if (strlen(messages) > 5) {
205 while (messages[i] != ' ')
206 i++;
207 messages[i] = '\0';
208 if (kstrtouint(messages, 16, &reg_pm805) < 0)
209 return -EINVAL;
210 i++;
211 if (kstrtou8(messages + i, 16, &reg_val) < 0)
212 return -EINVAL;
213 ret = regmap_write(chip->regmap, reg_pm805,
214 reg_val & 0xff);
215 if (ret < 0) {
216 pr_err("write reg error!\n");
217 return -EINVAL;
218 }
219 } else {
220 if (kstrtouint(messages, 16, &reg_pm805) < 0)
221 return -EINVAL;
222 }
223 }
224
225 return count;
226}
227
228static const struct file_operations pm805_dump_ops = {
229 .owner = THIS_MODULE,
230 .open = simple_open,
231 .read = pm805_dump_read,
232 .write = pm805_dump_write,
233};
234
235static inline int pm805_dump_debugfs_init(struct pm80x_chip *chip)
236{
237 struct dentry *pm805_dump_reg;
238
239 pm805_dump_reg = debugfs_create_file("pm805_reg", S_IRUGO | S_IFREG,
240 NULL, (void *)chip, &pm805_dump_ops);
241
242 if (pm805_dump_reg == NULL) {
243 pr_err("create pm805 debugfs error!\n");
244 return -ENOENT;
245 } else if (pm805_dump_reg == ERR_PTR(-ENODEV)) {
246 pr_err("CONFIG_DEBUG_FS is not enabled!\n");
247 return -ENOENT;
248 }
249 return 0;
250}
251
252static void pm805_dump_debugfs_remove(struct pm80x_chip *chip)
253{
254 debugfs_remove_recursive(chip->debugfs);
255}
256
257static int device_irq_init_805(struct pm80x_chip *chip)
258{
259 struct regmap *map = chip->regmap;
260 unsigned long flags = IRQF_ONESHOT;
261 int data, mask, ret = -EINVAL;
262
263 if (!map || !chip->irq) {
264 dev_err(chip->dev, "incorrect parameters\n");
265 return -EINVAL;
266 }
267
268 /*
269 * irq_mode defines the way of clearing interrupt. it's read-clear by
270 * default.
271 */
272 mask =
273 PM805_STATUS0_INT_CLEAR | PM805_STATUS0_INV_INT |
274 PM800_STATUS0_INT_MASK;
275
276 data = (chip->irq_mode) ?
277 PM805_STATUS0_INT_WRITE_CLEAR : PM805_STATUS0_INT_READ_CLEAR;
278 ret = regmap_update_bits(map, PM805_INT_STATUS0, mask, data);
279 /*
280 * PM805_INT_STATUS is under 32K clock domain, so need to
281 * add proper delay before the next I2C register access.
282 */
283 msleep(1);
284
285 if (ret < 0)
286 goto out;
287
288 ret =
289 regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
290 chip->regmap_irq_chip, &chip->irq_data);
291
292out:
293 return ret;
294}
295
296static void device_irq_exit_805(struct pm80x_chip *chip)
297{
298 regmap_del_irq_chip(chip->irq, chip->irq_data);
299}
300
301static struct regmap_irq_chip pm805_irq_chip = {
302 .name = "88pm805",
303 .irqs = pm805_irqs,
304 .num_irqs = ARRAY_SIZE(pm805_irqs),
305
306 .num_regs = 2,
307 .status_base = PM805_INT_STATUS1,
308 .mask_base = PM805_INT_MASK1,
309 .ack_base = PM805_INT_STATUS1,
310 .init_ack_masked = true,
311 .mask_invert = 1,
312};
313
314static int device_805_init(struct pm80x_chip *chip)
315{
316 int ret = 0;
317 struct regmap *map = chip->regmap;
318
319 if (!map) {
320 dev_err(chip->dev, "regmap is invalid\n");
321 return -EINVAL;
322 }
323
324 chip->regmap_irq_chip = &pm805_irq_chip;
325
326 ret = device_irq_init_805(chip);
327 if (ret < 0) {
328 dev_err(chip->dev, "Failed to init pm805 irq!\n");
329 goto out_irq_init;
330 }
331
332 ret = mfd_add_devices(chip->dev, 0, &codec_devs[0],
333 ARRAY_SIZE(codec_devs), &codec_resources[0],
334 regmap_irq_chip_get_base(chip->irq_data),
335 NULL);
336 if (ret < 0) {
337 dev_err(chip->dev, "Failed to add codec subdev\n");
338 goto out_codec;
339 } else
340 dev_info(chip->dev, "[%s]:Added mfd codec_devs\n", __func__);
341
342 return 0;
343
344out_codec:
345 device_irq_exit_805(chip);
346out_irq_init:
347 return ret;
348}
349
350static int pm805_dt_init(struct device_node *np,
351 struct device *dev,
352 struct pm80x_platform_data *pdata)
353{
354 pdata->irq_mode =
355 !of_property_read_bool(np, "marvell,88pm805-irq-write-clear");
356
357 return 0;
358}
359
360static void pm805_register_reset(struct pm80x_chip *chip)
361{
362 int data;
363 if (!chip->regmap) {
364 dev_err(chip->dev, "Failed to reset pm805 register\n");
365 return;
366 }
367
368 /* power up */
369 regmap_read(chip->regmap, 0x01, &data);
370 data |= 0x3;
371 regmap_write(chip->regmap, 0x01, data);
372 msleep(1);
373 /* reset 0x30 to 0x0 */
374 regmap_write(chip->regmap, 0x30, 0x00);
375 /* power off */
376 data &= ~0x3;
377 regmap_write(chip->regmap, 0x01, data);
378 msleep(1);
379 return;
380}
381#ifdef CONFIG_MFD_88PM800
382#ifdef RESET_88PM800
383static int pm805_reconfig(struct pm80x_chip *chip)
384{
385 static char buf[65];
386 int val;
387
388 /* 1 */
389 regmap_write(chip->regmap, 0xfa, 0x0);
390 regmap_write(chip->regmap, 0xfb, 0x0);
391 /* 2 */
392 regmap_read(chip->regmap, 0xd0, &val);
393 buf[0] = val;
394 regmap_write(chip->regmap, 0xd0, buf[0] | 0x80);
395 regmap_write(chip->regmap, 0x0d, 0x80);
396 regmap_write(chip->regmap, 0x1d, 0x01);
397 regmap_write(chip->regmap, 0x21, 0x20);
398 regmap_write(chip->regmap, 0xe2, 0x2a);
399
400 /* 3 */
401 regmap_write(chip->regmap, 0xbd, 0x80);
402 regmap_write(chip->regmap, 0xbd, 0x80);
403 regmap_write(chip->regmap, 0xbd, 0x80);
404 regmap_write(chip->regmap, 0xbd, 0x80);
405 regmap_write(chip->regmap, 0xbd, 0x80);
406 usleep_range(10000, 15000);
407 regmap_write(chip->regmap, 0x01, 0x03);
408 regmap_write(chip->regmap, 0x80, 0xad);
409 usleep_range(20000, 25000);
410
411 /* 4 */
412 regmap_write(chip->regmap, 0xc1, 0xe0);
413 regmap_write(chip->regmap, 0xc1, 0xe0);
414 regmap_write(chip->regmap, 0xc1, 0xe0);
415 regmap_write(chip->regmap, 0xc1, 0xe0);
416 regmap_write(chip->regmap, 0xc1, 0xe0);
417 msleep_interruptible(200);
418 regmap_write(chip->regmap, 0x29, 0x08);
419 regmap_write(chip->regmap, 0x26, 0x0);
420 usleep_range(20000, 25000);
421 regmap_write(chip->regmap, 0x01, 0x02);
422 regmap_write(chip->regmap, 0x80, 0x00);
423 regmap_write(chip->regmap, 0x01, 0x03);
424 usleep_range(20000, 25000);
425
426 /* 5 */
427 regmap_write(chip->regmap, 0x07, 0x00);
428 regmap_write(chip->regmap, 0x08, 0x00);
429 regmap_write(chip->regmap, 0x0a, 0x04);
430 regmap_write(chip->regmap, 0x80, 0x00);
431 regmap_write(chip->regmap, 0x82, 0x10);
432 regmap_write(chip->regmap, 0x95, 0x44);
433 regmap_write(chip->regmap, 0x96, 0x71);
434 regmap_write(chip->regmap, 0x97, 0x12);
435 regmap_write(chip->regmap, 0x99, 0xf0);
436 regmap_write(chip->regmap, 0xbd, 0x00);
437 regmap_write(chip->regmap, 0xbf, 0x00);
438 regmap_write(chip->regmap, 0xcc, 0x00);
439 regmap_write(chip->regmap, 0xcd, 0x00);
440 regmap_write(chip->regmap, 0xce, 0x04);
441 regmap_write(chip->regmap, 0xcf, 0x00);
442 regmap_write(chip->regmap, 0xd0, 0x00);
443 regmap_write(chip->regmap, 0xd1, 0x00);
444 regmap_write(chip->regmap, 0xdc, 0x00);
445 regmap_write(chip->regmap, 0xdd, 0x00);
446 regmap_write(chip->regmap, 0xde, 0x00);
447 regmap_write(chip->regmap, 0xe2, 0x00);
448 regmap_write(chip->regmap, 0xe3, 0x58);
449
450 /* 6 */
451 regmap_write(chip->regmap, 0x02, 0x00);
452 regmap_write(chip->regmap, 0x03, 0x00);
453 regmap_write(chip->regmap, 0x04, 0x00);
454 regmap_write(chip->regmap, 0x05, 0x00);
455 regmap_write(chip->regmap, 0x06, 0x00);
456 regmap_write(chip->regmap, 0x10, 0x14);
457 regmap_write(chip->regmap, 0x11, 0x00);
458 regmap_write(chip->regmap, 0x12, 0x00);
459 regmap_write(chip->regmap, 0x13, 0x00);
460 regmap_write(chip->regmap, 0x14, 0x00);
461 regmap_write(chip->regmap, 0x15, 0x00);
462 regmap_write(chip->regmap, 0x16, 0x00);
463 regmap_write(chip->regmap, 0x20, 0x12);
464 regmap_write(chip->regmap, 0x21, 0x38);
465 regmap_write(chip->regmap, 0x22, 0x00);
466 regmap_write(chip->regmap, 0x23, 0x1b);
467 regmap_write(chip->regmap, 0x24, 0x00);
468 regmap_write(chip->regmap, 0x25, 0x00);
469 regmap_write(chip->regmap, 0x26, 0x00);
470 regmap_write(chip->regmap, 0x27, 0x00);
471 regmap_write(chip->regmap, 0x29, 0x08);
472 regmap_write(chip->regmap, 0x2a, 0x00);
473 regmap_write(chip->regmap, 0x30, 0x1f);
474 regmap_write(chip->regmap, 0x31, 0x4c);
475 regmap_write(chip->regmap, 0x32, 0x04);
476 regmap_write(chip->regmap, 0x33, 0x00);
477 regmap_write(chip->regmap, 0x34, 0x00);
478 regmap_write(chip->regmap, 0x35, 0x14);
479 regmap_write(chip->regmap, 0x36, 0x23);
480 regmap_write(chip->regmap, 0x37, 0x04);
481 regmap_write(chip->regmap, 0x38, 0x00);
482 regmap_write(chip->regmap, 0x39, 0x14);
483 regmap_write(chip->regmap, 0x3b, 0x00);
484 regmap_write(chip->regmap, 0x3c, 0x23);
485 regmap_write(chip->regmap, 0x3d, 0x01);
486 regmap_write(chip->regmap, 0x3e, 0x00);
487 regmap_write(chip->regmap, 0x3f, 0x00);
488 regmap_write(chip->regmap, 0x40, 0x00);
489 regmap_write(chip->regmap, 0x41, 0x00);
490 regmap_write(chip->regmap, 0x42, 0x00);
491 regmap_write(chip->regmap, 0x50, 0x00);
492 regmap_write(chip->regmap, 0x51, 0x00);
493 regmap_write(chip->regmap, 0x52, 0x01);
494 regmap_write(chip->regmap, 0x53, 0x01);
495 regmap_write(chip->regmap, 0x54, 0x55);
496 regmap_write(chip->regmap, 0x55, 0x20);
497 regmap_write(chip->regmap, 0x56, 0x00);
498 regmap_write(chip->regmap, 0x57, 0x00);
499 regmap_write(chip->regmap, 0x58, 0x00);
500 regmap_write(chip->regmap, 0x59, 0x00);
501 regmap_write(chip->regmap, 0x5a, 0x00);
502 regmap_write(chip->regmap, 0x5b, 0x01);
503
504 buf[0] = 0x5c;
505 buf[1] = 0x0;
506 buf[2] = 0x0;
507 buf[3] = 0x0;
508 buf[4] = 0x0;
509 buf[5] = 0x0;
510 buf[6] = 0x0;
511 buf[7] = 0x0;
512 buf[8] = 0x0;
513 buf[9] = 0x0;
514 i2c_master_send(chip->client, &buf[0], 10);
515
516 buf[1] = 0x04;
517 i2c_master_send(chip->client, &buf[0], 10);
518
519 buf[1] = 0x08;
520 i2c_master_send(chip->client, &buf[0], 10);
521
522 buf[1] = 0x0c;
523 i2c_master_send(chip->client, &buf[0], 10);
524
525 buf[1] = 0x10;
526 i2c_master_send(chip->client, &buf[0], 10);
527
528 buf[1] = 0x14;
529 i2c_master_send(chip->client, &buf[0], 10);
530
531 buf[1] = 0x18;
532 i2c_master_send(chip->client, &buf[0], 10);
533
534 buf[1] = 0x1c;
535 i2c_master_send(chip->client, &buf[0], 10);
536 regmap_write(chip->regmap, 0x5b, 0x02);
537
538 buf[0] = 0x5c;
539 buf[1] = 0x0;
540 buf[2] = 0x10;
541 buf[3] = 0x00;
542 buf[4] = 0x00;
543 buf[5] = 0x00;
544 buf[6] = 0x00;
545 buf[7] = 0x00;
546 buf[8] = 0x00;
547 buf[9] = 0x00;
548 buf[10] = 0x00;
549 buf[11] = 0x00;
550 i2c_master_send(chip->client, &buf[0], 12);
551
552 regmap_write(chip->regmap, 0x5d, 0x01);
553 regmap_write(chip->regmap, 0x5b, 0x03);
554 i2c_master_send(chip->client, &buf[0], 12);
555
556 regmap_write(chip->regmap, 0x5d, 0x01);
557 regmap_write(chip->regmap, 0x5b, 0x04);
558 i2c_master_send(chip->client, &buf[0], 12);
559
560 regmap_write(chip->regmap, 0x5d, 0x01);
561 regmap_write(chip->regmap, 0x5b, 0x05);
562 i2c_master_send(chip->client, &buf[0], 12);
563
564 regmap_write(chip->regmap, 0x5d, 0x01);
565 regmap_write(chip->regmap, 0x5b, 0x06);
566 i2c_master_send(chip->client, &buf[0], 12);
567
568 regmap_write(chip->regmap, 0x5d, 0x01);
569 regmap_write(chip->regmap, 0x5b, 0x07);
570 i2c_master_send(chip->client, &buf[0], 12);
571
572 regmap_write(chip->regmap, 0x5d, 0x01);
573 regmap_write(chip->regmap, 0x5b, 0x08);
574 i2c_master_send(chip->client, &buf[0], 12);
575
576 regmap_write(chip->regmap, 0x5d, 0x01);
577 regmap_write(chip->regmap, 0x5b, 0x09);
578 i2c_master_send(chip->client, &buf[0], 12);
579
580 regmap_write(chip->regmap, 0x5d, 0x01);
581 regmap_write(chip->regmap, 0x5b, 0x0a);
582 i2c_master_send(chip->client, &buf[0], 12);
583
584 regmap_write(chip->regmap, 0x5d, 0x01);
585 regmap_write(chip->regmap, 0x5b, 0x0b);
586 i2c_master_send(chip->client, &buf[0], 12);
587
588 regmap_write(chip->regmap, 0x5d, 0x01);
589 regmap_write(chip->regmap, 0x5b, 0x0c);
590 i2c_master_send(chip->client, &buf[0], 12);
591
592 regmap_write(chip->regmap, 0x5d, 0x01);
593 regmap_write(chip->regmap, 0x5b, 0x0d);
594 i2c_master_send(chip->client, &buf[0], 12);
595
596 regmap_write(chip->regmap, 0x5d, 0x01);
597 regmap_write(chip->regmap, 0x5b, 0x0e);
598 i2c_master_send(chip->client, &buf[0], 12);
599
600 regmap_write(chip->regmap, 0x5d, 0x01);
601 regmap_write(chip->regmap, 0x5b, 0x0f);
602 i2c_master_send(chip->client, &buf[0], 12);
603
604 regmap_write(chip->regmap, 0x5d, 0x01);
605 regmap_write(chip->regmap, 0x5b, 0x10);
606 i2c_master_send(chip->client, &buf[0], 12);
607
608 regmap_write(chip->regmap, 0x5d, 0x01);
609 regmap_write(chip->regmap, 0x5b, 0x11);
610 i2c_master_send(chip->client, &buf[0], 12);
611
612 regmap_write(chip->regmap, 0x5d, 0x01);
613 regmap_write(chip->regmap, 0x5b, 0x12);
614 i2c_master_send(chip->client, &buf[0], 12);
615
616 regmap_write(chip->regmap, 0x5d, 0x01);
617 regmap_write(chip->regmap, 0x5b, 0x13);
618 i2c_master_send(chip->client, &buf[0], 12);
619
620 regmap_write(chip->regmap, 0x5d, 0x01);
621 regmap_write(chip->regmap, 0x5b, 0x14);
622 i2c_master_send(chip->client, &buf[0], 12);
623
624 regmap_write(chip->regmap, 0x5d, 0x01);
625 regmap_write(chip->regmap, 0x5b, 0x15);
626 i2c_master_send(chip->client, &buf[0], 12);
627
628 regmap_write(chip->regmap, 0x5d, 0x01);
629 regmap_write(chip->regmap, 0x5d, 0x00);
630 regmap_write(chip->regmap, 0x5b, 0x00);
631 regmap_write(chip->regmap, 0x84, 0x88);
632 regmap_write(chip->regmap, 0x85, 0x16);
633 regmap_write(chip->regmap, 0x86, 0x16);
634 regmap_write(chip->regmap, 0x87, 0x00);
635 regmap_write(chip->regmap, 0x88, 0x40);
636 regmap_write(chip->regmap, 0x8a, 0x08);
637 regmap_write(chip->regmap, 0x8b, 0x05);
638 regmap_write(chip->regmap, 0x8c, 0x00);
639 regmap_write(chip->regmap, 0x8d, 0x00);
640 regmap_write(chip->regmap, 0x8e, 0x09);
641 regmap_write(chip->regmap, 0x8f, 0x00);
642 regmap_write(chip->regmap, 0x90, 0x7e);
643 regmap_write(chip->regmap, 0x91, 0x03);
644 regmap_write(chip->regmap, 0x92, 0x55);
645 regmap_write(chip->regmap, 0x93, 0x04);
646 regmap_write(chip->regmap, 0x94, 0x02);
647 regmap_write(chip->regmap, 0x99, 0xf0);
648 regmap_write(chip->regmap, 0x9a, 0x12);
649
650 regmap_write(chip->regmap, 0xa0, 0x00);
651 regmap_write(chip->regmap, 0xa1, 0x00);
652 regmap_write(chip->regmap, 0xa2, 0x00);
653 regmap_write(chip->regmap, 0xa3, 0x00);
654 regmap_write(chip->regmap, 0xa4, 0x00);
655 regmap_write(chip->regmap, 0xa5, 0x00);
656 regmap_write(chip->regmap, 0xa6, 0x00);
657 regmap_write(chip->regmap, 0xa7, 0x00);
658 regmap_write(chip->regmap, 0xa8, 0x00);
659 regmap_write(chip->regmap, 0xaa, 0x00);
660 regmap_write(chip->regmap, 0xac, 0x00);
661 regmap_write(chip->regmap, 0xae, 0x00);
662
663 regmap_write(chip->regmap, 0xb0, 0x00);
664 regmap_write(chip->regmap, 0xb2, 0x00);
665 regmap_write(chip->regmap, 0xb4, 0x00);
666 regmap_write(chip->regmap, 0xb6, 0x00);
667 regmap_write(chip->regmap, 0xb8, 0x00);
668 regmap_write(chip->regmap, 0xba, 0x00);
669 regmap_write(chip->regmap, 0xbc, 0x00);
670
671 regmap_write(chip->regmap, 0xc1, 0x00);
672 regmap_write(chip->regmap, 0xc2, 0x00);
673 regmap_write(chip->regmap, 0xc3, 0x00);
674 regmap_write(chip->regmap, 0xc4, 0x00);
675 regmap_write(chip->regmap, 0xc9, 0x00);
676 regmap_write(chip->regmap, 0xca, 0x00);
677
678 regmap_write(chip->regmap, 0xd2, 0x00);
679 regmap_write(chip->regmap, 0xd3, 0x00);
680 regmap_write(chip->regmap, 0xd4, 0x00);
681 regmap_write(chip->regmap, 0xd5, 0x00);
682 regmap_write(chip->regmap, 0xd6, 0x00);
683 regmap_write(chip->regmap, 0xd7, 0x00);
684 regmap_write(chip->regmap, 0xd8, 0x00);
685 regmap_write(chip->regmap, 0xd9, 0x00);
686 regmap_write(chip->regmap, 0xda, 0x00);
687 regmap_write(chip->regmap, 0xdb, 0x00);
688 regmap_write(chip->regmap, 0x01, 0x02);
689
690 usleep_range(10000, 15000);
691 regmap_write(chip->regmap, 0xfc, 0x00);
692 regmap_write(chip->regmap, 0xe2, 0x2a);
693 usleep_range(1000, 1500);
694
695 return 0;
696}
697#endif
698#endif
699
700static int pm805_probe(struct i2c_client *client,
701 const struct i2c_device_id *id)
702{
703 int ret = 0;
704 struct pm80x_chip *chip;
705 struct pm80x_platform_data *pdata = client->dev.platform_data;
706 struct device_node *node = client->dev.of_node;
707
708 if (IS_ENABLED(CONFIG_OF)) {
709 if (!pdata) {
710 pdata = devm_kzalloc(&client->dev,
711 sizeof(*pdata), GFP_KERNEL);
712 if (!pdata)
713 return -ENOMEM;
714 }
715 ret = pm805_dt_init(node, &client->dev, pdata);
716 if (ret)
717 return ret;
718 } else if (!pdata)
719 return -EINVAL;
720
721 ret = pm80x_init(client);
722 if (ret) {
723 dev_err(&client->dev, "pm805_init fail!\n");
724 goto out_init;
725 }
726
727 chip = i2c_get_clientdata(client);
728 chip->irq_mode = pdata->irq_mode;
729 ret = device_805_init(chip);
730 if (ret) {
731 dev_err(chip->dev, "Failed to initialize 88pm805 devices\n");
732 goto err_805_init;
733 }
734
735 if (pdata && pdata->plat_config)
736 pdata->plat_config(chip, pdata);
737#ifdef CONFIG_MFD_88PM800
738#ifdef RESET_88PM800
739 /* reconfig */
740 version = regmap_read(chip->regmap, 0x0, &val);
741 version = val & 0xff;
742 if (!(version == 0x06))
743 pm805_reconfig(chip);
744#endif
745#endif
746
747 pm805_register_reset(chip);
748
749 ret = pm805_dump_debugfs_init(chip);
750 if (!ret)
751 dev_info(chip->dev, "88pm805 debugfs created!\n");
752
753 return 0;
754err_805_init:
755 pm80x_deinit();
756out_init:
757 return ret;
758}
759
760static int pm805_remove(struct i2c_client *client)
761{
762 struct pm80x_chip *chip = i2c_get_clientdata(client);
763
764 mfd_remove_devices(chip->dev);
765 device_irq_exit_805(chip);
766
767 if (chip->debugfs)
768 pm805_dump_debugfs_remove(chip);
769
770 pm80x_deinit();
771
772 return 0;
773}
774
775void pm805_shutdown(struct i2c_client *client)
776{
777 unsigned int irq_base;
778 struct pm80x_chip *chip = i2c_get_clientdata(client);
779
780 irq_base = regmap_irq_chip_get_base(chip->irq_data);
781 disable_irq(irq_base);
782}
783
784static struct i2c_driver pm805_driver = {
785 .driver = {
786 .name = "88PM805",
787 .owner = THIS_MODULE,
788 .pm = &pm80x_pm_ops,
789 .of_match_table = of_match_ptr(pm80x_dt_ids),
790 },
791 .probe = pm805_probe,
792 .remove = pm805_remove,
793 .shutdown = pm805_shutdown,
794 .id_table = pm80x_id_table,
795};
796
797static int __init pm805_i2c_init(void)
798{
799 return i2c_add_driver(&pm805_driver);
800}
801subsys_initcall(pm805_i2c_init);
802
803static void __exit pm805_i2c_exit(void)
804{
805 i2c_del_driver(&pm805_driver);
806}
807module_exit(pm805_i2c_exit);
808
809MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM805");
810MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
811MODULE_LICENSE("GPL");