blob: 4d86341fc8b445e6cb5e604dd4086ca7815521f4 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8#include <linux/module.h>
9#include <linux/etherdevice.h>
10#include <linux/mii.h>
11#include <linux/usb.h>
12#include <linux/crc32.h>
13#include <linux/usb/usbnet.h>
14#include <uapi/linux/mdio.h>
15#include <linux/mdio.h>
16
17#define AX88179_PHY_ID 0x03
18#define AX_EEPROM_LEN 0x100
19#define AX88179_EEPROM_MAGIC 0x17900b95
20#define AX_MCAST_FLTSIZE 8
21#define AX_MAX_MCAST 64
22#define AX_INT_PPLS_LINK ((u32)BIT(16))
23#define AX_RXHDR_L4_TYPE_MASK 0x1c
24#define AX_RXHDR_L4_TYPE_UDP 4
25#define AX_RXHDR_L4_TYPE_TCP 16
26#define AX_RXHDR_L3CSUM_ERR 2
27#define AX_RXHDR_L4CSUM_ERR 1
28#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30#define AX_ACCESS_MAC 0x01
31#define AX_ACCESS_PHY 0x02
32#define AX_ACCESS_EEPROM 0x04
33#define AX_ACCESS_EFUS 0x05
34#define AX_PAUSE_WATERLVL_HIGH 0x54
35#define AX_PAUSE_WATERLVL_LOW 0x55
36
37#define PHYSICAL_LINK_STATUS 0x02
38 #define AX_USB_SS 0x04
39 #define AX_USB_HS 0x02
40
41#define GENERAL_STATUS 0x03
42/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
43 #define AX_SECLD 0x04
44
45#define AX_SROM_ADDR 0x07
46#define AX_SROM_CMD 0x0a
47 #define EEP_RD 0x04
48 #define EEP_BUSY 0x10
49
50#define AX_SROM_DATA_LOW 0x08
51#define AX_SROM_DATA_HIGH 0x09
52
53#define AX_RX_CTL 0x0b
54 #define AX_RX_CTL_DROPCRCERR 0x0100
55 #define AX_RX_CTL_IPE 0x0200
56 #define AX_RX_CTL_START 0x0080
57 #define AX_RX_CTL_AP 0x0020
58 #define AX_RX_CTL_AM 0x0010
59 #define AX_RX_CTL_AB 0x0008
60 #define AX_RX_CTL_AMALL 0x0002
61 #define AX_RX_CTL_PRO 0x0001
62 #define AX_RX_CTL_STOP 0x0000
63
64#define AX_NODE_ID 0x10
65#define AX_MULFLTARY 0x16
66
67#define AX_MEDIUM_STATUS_MODE 0x22
68 #define AX_MEDIUM_GIGAMODE 0x01
69 #define AX_MEDIUM_FULL_DUPLEX 0x02
70 #define AX_MEDIUM_EN_125MHZ 0x08
71 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
72 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
73 #define AX_MEDIUM_RECEIVE_EN 0x100
74 #define AX_MEDIUM_PS 0x200
75 #define AX_MEDIUM_JUMBO_EN 0x8040
76
77#define AX_MONITOR_MOD 0x24
78 #define AX_MONITOR_MODE_RWLC 0x02
79 #define AX_MONITOR_MODE_RWMP 0x04
80 #define AX_MONITOR_MODE_PMEPOL 0x20
81 #define AX_MONITOR_MODE_PMETYPE 0x40
82
83#define AX_GPIO_CTRL 0x25
84 #define AX_GPIO_CTRL_GPIO3EN 0x80
85 #define AX_GPIO_CTRL_GPIO2EN 0x40
86 #define AX_GPIO_CTRL_GPIO1EN 0x20
87
88#define AX_PHYPWR_RSTCTL 0x26
89 #define AX_PHYPWR_RSTCTL_BZ 0x0010
90 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
91 #define AX_PHYPWR_RSTCTL_AT 0x1000
92
93#define AX_RX_BULKIN_QCTRL 0x2e
94#define AX_CLK_SELECT 0x33
95 #define AX_CLK_SELECT_BCS 0x01
96 #define AX_CLK_SELECT_ACS 0x02
97 #define AX_CLK_SELECT_ULR 0x08
98
99#define AX_RXCOE_CTL 0x34
100 #define AX_RXCOE_IP 0x01
101 #define AX_RXCOE_TCP 0x02
102 #define AX_RXCOE_UDP 0x04
103 #define AX_RXCOE_TCPV6 0x20
104 #define AX_RXCOE_UDPV6 0x40
105
106#define AX_TXCOE_CTL 0x35
107 #define AX_TXCOE_IP 0x01
108 #define AX_TXCOE_TCP 0x02
109 #define AX_TXCOE_UDP 0x04
110 #define AX_TXCOE_TCPV6 0x20
111 #define AX_TXCOE_UDPV6 0x40
112
113#define AX_LEDCTRL 0x73
114
115#define GMII_PHY_PHYSR 0x11
116 #define GMII_PHY_PHYSR_SMASK 0xc000
117 #define GMII_PHY_PHYSR_GIGA 0x8000
118 #define GMII_PHY_PHYSR_100 0x4000
119 #define GMII_PHY_PHYSR_FULL 0x2000
120 #define GMII_PHY_PHYSR_LINK 0x400
121
122#define GMII_LED_ACT 0x1a
123 #define GMII_LED_ACTIVE_MASK 0xff8f
124 #define GMII_LED0_ACTIVE BIT(4)
125 #define GMII_LED1_ACTIVE BIT(5)
126 #define GMII_LED2_ACTIVE BIT(6)
127
128#define GMII_LED_LINK 0x1c
129 #define GMII_LED_LINK_MASK 0xf888
130 #define GMII_LED0_LINK_10 BIT(0)
131 #define GMII_LED0_LINK_100 BIT(1)
132 #define GMII_LED0_LINK_1000 BIT(2)
133 #define GMII_LED1_LINK_10 BIT(4)
134 #define GMII_LED1_LINK_100 BIT(5)
135 #define GMII_LED1_LINK_1000 BIT(6)
136 #define GMII_LED2_LINK_10 BIT(8)
137 #define GMII_LED2_LINK_100 BIT(9)
138 #define GMII_LED2_LINK_1000 BIT(10)
139 #define LED0_ACTIVE BIT(0)
140 #define LED0_LINK_10 BIT(1)
141 #define LED0_LINK_100 BIT(2)
142 #define LED0_LINK_1000 BIT(3)
143 #define LED0_FD BIT(4)
144 #define LED0_USB3_MASK 0x001f
145 #define LED1_ACTIVE BIT(5)
146 #define LED1_LINK_10 BIT(6)
147 #define LED1_LINK_100 BIT(7)
148 #define LED1_LINK_1000 BIT(8)
149 #define LED1_FD BIT(9)
150 #define LED1_USB3_MASK 0x03e0
151 #define LED2_ACTIVE BIT(10)
152 #define LED2_LINK_1000 BIT(13)
153 #define LED2_LINK_100 BIT(12)
154 #define LED2_LINK_10 BIT(11)
155 #define LED2_FD BIT(14)
156 #define LED_VALID BIT(15)
157 #define LED2_USB3_MASK 0x7c00
158
159#define GMII_PHYPAGE 0x1e
160#define GMII_PHY_PAGE_SELECT 0x1f
161 #define GMII_PHY_PGSEL_EXT 0x0007
162 #define GMII_PHY_PGSEL_PAGE0 0x0000
163 #define GMII_PHY_PGSEL_PAGE3 0x0003
164 #define GMII_PHY_PGSEL_PAGE5 0x0005
165
166struct ax88179_data {
167 u8 eee_enabled;
168 u8 eee_active;
169 u16 rxctl;
170 u16 reserved;
171};
172
173struct ax88179_int_data {
174 __le32 intdata1;
175 __le32 intdata2;
176};
177
178static const struct {
179 unsigned char ctrl, timer_l, timer_h, size, ifg;
180} AX88179_BULKIN_SIZE[] = {
181 {7, 0x4f, 0, 0x12, 0xff},
182 {7, 0x20, 3, 0x16, 0xff},
183 {7, 0xae, 7, 0x18, 0xff},
184 {7, 0xcc, 0x4c, 0x18, 8},
185};
186
187static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
188 u16 size, void *data, int in_pm)
189{
190 int ret;
191 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
192
193 BUG_ON(!dev);
194
195 if (!in_pm)
196 fn = usbnet_read_cmd;
197 else
198 fn = usbnet_read_cmd_nopm;
199
200 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
201 value, index, data, size);
202
203 if (unlikely(ret < 0))
204 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
205 index, ret);
206
207 return ret;
208}
209
210static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
211 u16 size, void *data, int in_pm)
212{
213 int ret;
214 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
215
216 BUG_ON(!dev);
217
218 if (!in_pm)
219 fn = usbnet_write_cmd;
220 else
221 fn = usbnet_write_cmd_nopm;
222
223 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
224 value, index, data, size);
225
226 if (unlikely(ret < 0))
227 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
228 index, ret);
229
230 return ret;
231}
232
233static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
234 u16 index, u16 size, void *data)
235{
236 u16 buf;
237
238 if (2 == size) {
239 buf = *((u16 *)data);
240 cpu_to_le16s(&buf);
241 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
242 USB_RECIP_DEVICE, value, index, &buf,
243 size);
244 } else {
245 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
246 USB_RECIP_DEVICE, value, index, data,
247 size);
248 }
249}
250
251static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
252 u16 index, u16 size, void *data)
253{
254 int ret;
255
256 if (2 == size) {
257 u16 buf;
258 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
259 le16_to_cpus(&buf);
260 *((u16 *)data) = buf;
261 } else if (4 == size) {
262 u32 buf;
263 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
264 le32_to_cpus(&buf);
265 *((u32 *)data) = buf;
266 } else {
267 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
268 }
269
270 return ret;
271}
272
273static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
274 u16 index, u16 size, void *data)
275{
276 int ret;
277
278 if (2 == size) {
279 u16 buf;
280 buf = *((u16 *)data);
281 cpu_to_le16s(&buf);
282 ret = __ax88179_write_cmd(dev, cmd, value, index,
283 size, &buf, 1);
284 } else {
285 ret = __ax88179_write_cmd(dev, cmd, value, index,
286 size, data, 1);
287 }
288
289 return ret;
290}
291
292static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
293 u16 size, void *data)
294{
295 int ret;
296
297 if (2 == size) {
298 u16 buf = 0;
299 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
300 le16_to_cpus(&buf);
301 *((u16 *)data) = buf;
302 } else if (4 == size) {
303 u32 buf = 0;
304 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
305 le32_to_cpus(&buf);
306 *((u32 *)data) = buf;
307 } else {
308 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
309 }
310
311 return ret;
312}
313
314static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
315 u16 size, void *data)
316{
317 int ret;
318
319 if (2 == size) {
320 u16 buf;
321 buf = *((u16 *)data);
322 cpu_to_le16s(&buf);
323 ret = __ax88179_write_cmd(dev, cmd, value, index,
324 size, &buf, 0);
325 } else {
326 ret = __ax88179_write_cmd(dev, cmd, value, index,
327 size, data, 0);
328 }
329
330 return ret;
331}
332
333static void ax88179_status(struct usbnet *dev, struct urb *urb)
334{
335 struct ax88179_int_data *event;
336 u32 link;
337
338 if (urb->actual_length < 8)
339 return;
340
341 event = urb->transfer_buffer;
342 le32_to_cpus((void *)&event->intdata1);
343
344 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
345
346 if (netif_carrier_ok(dev->net) != link) {
347 usbnet_link_change(dev, link, 1);
348 if (!link)
349 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
350 }
351}
352
353static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
354{
355 struct usbnet *dev = netdev_priv(netdev);
356 u16 res;
357
358 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
359 return res;
360}
361
362static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
363 int val)
364{
365 struct usbnet *dev = netdev_priv(netdev);
366 u16 res = (u16) val;
367
368 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
369}
370
371static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
372 u16 devad)
373{
374 u16 tmp16;
375 int ret;
376
377 tmp16 = devad;
378 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
379 MII_MMD_CTRL, 2, &tmp16);
380
381 tmp16 = prtad;
382 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
383 MII_MMD_DATA, 2, &tmp16);
384
385 tmp16 = devad | MII_MMD_CTRL_NOINCR;
386 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
387 MII_MMD_CTRL, 2, &tmp16);
388
389 return ret;
390}
391
392static int
393ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
394{
395 int ret;
396 u16 tmp16;
397
398 ax88179_phy_mmd_indirect(dev, prtad, devad);
399
400 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
401 MII_MMD_DATA, 2, &tmp16);
402 if (ret < 0)
403 return ret;
404
405 return tmp16;
406}
407
408static int
409ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
410 u16 data)
411{
412 int ret;
413
414 ax88179_phy_mmd_indirect(dev, prtad, devad);
415
416 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
417 MII_MMD_DATA, 2, &data);
418
419 if (ret < 0)
420 return ret;
421
422 return 0;
423}
424
425static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
426{
427 struct usbnet *dev = usb_get_intfdata(intf);
428 u16 tmp16;
429 u8 tmp8;
430
431 usbnet_suspend(intf, message);
432
433 /* Disable RX path */
434 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
435 2, 2, &tmp16);
436 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
437 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
438 2, 2, &tmp16);
439
440 /* Force bulk-in zero length */
441 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
442 2, 2, &tmp16);
443
444 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
445 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
446 2, 2, &tmp16);
447
448 /* change clock */
449 tmp8 = 0;
450 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
451
452 /* Configure RX control register => stop operation */
453 tmp16 = AX_RX_CTL_STOP;
454 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
455
456 return 0;
457}
458
459/* This function is used to enable the autodetach function. */
460/* This function is determined by offset 0x43 of EEPROM */
461static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
462{
463 u16 tmp16;
464 u8 tmp8;
465 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
466 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
467
468 if (!in_pm) {
469 fnr = ax88179_read_cmd;
470 fnw = ax88179_write_cmd;
471 } else {
472 fnr = ax88179_read_cmd_nopm;
473 fnw = ax88179_write_cmd_nopm;
474 }
475
476 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
477 return 0;
478
479 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
480 return 0;
481
482 /* Enable Auto Detach bit */
483 tmp8 = 0;
484 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
485 tmp8 |= AX_CLK_SELECT_ULR;
486 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
487
488 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
489 tmp16 |= AX_PHYPWR_RSTCTL_AT;
490 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
491
492 return 0;
493}
494
495static int ax88179_resume(struct usb_interface *intf)
496{
497 struct usbnet *dev = usb_get_intfdata(intf);
498 u16 tmp16;
499 u8 tmp8;
500
501 usbnet_link_change(dev, 0, 0);
502
503 /* Power up ethernet PHY */
504 tmp16 = 0;
505 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
506 2, 2, &tmp16);
507 udelay(1000);
508
509 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
510 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
511 2, 2, &tmp16);
512 msleep(200);
513
514 /* Ethernet PHY Auto Detach*/
515 ax88179_auto_detach(dev, 1);
516
517 /* Enable clock */
518 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
519 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
520 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
521 msleep(100);
522
523 /* Configure RX control register => start operation */
524 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
525 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
526 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
527
528 return usbnet_resume(intf);
529}
530
531static void
532ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
533{
534 struct usbnet *dev = netdev_priv(net);
535 u8 opt;
536
537 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
538 1, 1, &opt) < 0) {
539 wolinfo->supported = 0;
540 wolinfo->wolopts = 0;
541 return;
542 }
543
544 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
545 wolinfo->wolopts = 0;
546 if (opt & AX_MONITOR_MODE_RWLC)
547 wolinfo->wolopts |= WAKE_PHY;
548 if (opt & AX_MONITOR_MODE_RWMP)
549 wolinfo->wolopts |= WAKE_MAGIC;
550}
551
552static int
553ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
554{
555 struct usbnet *dev = netdev_priv(net);
556 u8 opt = 0;
557
558 if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC))
559 return -EINVAL;
560
561 if (wolinfo->wolopts & WAKE_PHY)
562 opt |= AX_MONITOR_MODE_RWLC;
563 if (wolinfo->wolopts & WAKE_MAGIC)
564 opt |= AX_MONITOR_MODE_RWMP;
565
566 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
567 1, 1, &opt) < 0)
568 return -EINVAL;
569
570 return 0;
571}
572
573static int ax88179_get_eeprom_len(struct net_device *net)
574{
575 return AX_EEPROM_LEN;
576}
577
578static int
579ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
580 u8 *data)
581{
582 struct usbnet *dev = netdev_priv(net);
583 u16 *eeprom_buff;
584 int first_word, last_word;
585 int i, ret;
586
587 if (eeprom->len == 0)
588 return -EINVAL;
589
590 eeprom->magic = AX88179_EEPROM_MAGIC;
591
592 first_word = eeprom->offset >> 1;
593 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
594 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
595 GFP_KERNEL);
596 if (!eeprom_buff)
597 return -ENOMEM;
598
599 /* ax88179/178A returns 2 bytes from eeprom on read */
600 for (i = first_word; i <= last_word; i++) {
601 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
602 &eeprom_buff[i - first_word],
603 0);
604 if (ret < 0) {
605 kfree(eeprom_buff);
606 return -EIO;
607 }
608 }
609
610 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
611 kfree(eeprom_buff);
612 return 0;
613}
614
615static int ax88179_get_link_ksettings(struct net_device *net,
616 struct ethtool_link_ksettings *cmd)
617{
618 struct usbnet *dev = netdev_priv(net);
619
620 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
621
622 return 0;
623}
624
625static int ax88179_set_link_ksettings(struct net_device *net,
626 const struct ethtool_link_ksettings *cmd)
627{
628 struct usbnet *dev = netdev_priv(net);
629 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
630}
631
632static int
633ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
634{
635 int val;
636
637 /* Get Supported EEE */
638 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
639 MDIO_MMD_PCS);
640 if (val < 0)
641 return val;
642 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
643
644 /* Get advertisement EEE */
645 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
646 MDIO_MMD_AN);
647 if (val < 0)
648 return val;
649 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
650
651 /* Get LP advertisement EEE */
652 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
653 MDIO_MMD_AN);
654 if (val < 0)
655 return val;
656 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
657
658 return 0;
659}
660
661static int
662ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
663{
664 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
665
666 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
667 MDIO_MMD_AN, tmp16);
668}
669
670static int ax88179_chk_eee(struct usbnet *dev)
671{
672 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
673 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
674
675 mii_ethtool_gset(&dev->mii, &ecmd);
676
677 if (ecmd.duplex & DUPLEX_FULL) {
678 int eee_lp, eee_cap, eee_adv;
679 u32 lp, cap, adv, supported = 0;
680
681 eee_cap = ax88179_phy_read_mmd_indirect(dev,
682 MDIO_PCS_EEE_ABLE,
683 MDIO_MMD_PCS);
684 if (eee_cap < 0) {
685 priv->eee_active = 0;
686 return false;
687 }
688
689 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
690 if (!cap) {
691 priv->eee_active = 0;
692 return false;
693 }
694
695 eee_lp = ax88179_phy_read_mmd_indirect(dev,
696 MDIO_AN_EEE_LPABLE,
697 MDIO_MMD_AN);
698 if (eee_lp < 0) {
699 priv->eee_active = 0;
700 return false;
701 }
702
703 eee_adv = ax88179_phy_read_mmd_indirect(dev,
704 MDIO_AN_EEE_ADV,
705 MDIO_MMD_AN);
706
707 if (eee_adv < 0) {
708 priv->eee_active = 0;
709 return false;
710 }
711
712 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
713 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
714 supported = (ecmd.speed == SPEED_1000) ?
715 SUPPORTED_1000baseT_Full :
716 SUPPORTED_100baseT_Full;
717
718 if (!(lp & adv & supported)) {
719 priv->eee_active = 0;
720 return false;
721 }
722
723 priv->eee_active = 1;
724 return true;
725 }
726
727 priv->eee_active = 0;
728 return false;
729}
730
731static void ax88179_disable_eee(struct usbnet *dev)
732{
733 u16 tmp16;
734
735 tmp16 = GMII_PHY_PGSEL_PAGE3;
736 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
737 GMII_PHY_PAGE_SELECT, 2, &tmp16);
738
739 tmp16 = 0x3246;
740 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
741 MII_PHYADDR, 2, &tmp16);
742
743 tmp16 = GMII_PHY_PGSEL_PAGE0;
744 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
745 GMII_PHY_PAGE_SELECT, 2, &tmp16);
746}
747
748static void ax88179_enable_eee(struct usbnet *dev)
749{
750 u16 tmp16;
751
752 tmp16 = GMII_PHY_PGSEL_PAGE3;
753 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
754 GMII_PHY_PAGE_SELECT, 2, &tmp16);
755
756 tmp16 = 0x3247;
757 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
758 MII_PHYADDR, 2, &tmp16);
759
760 tmp16 = GMII_PHY_PGSEL_PAGE5;
761 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
762 GMII_PHY_PAGE_SELECT, 2, &tmp16);
763
764 tmp16 = 0x0680;
765 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
766 MII_BMSR, 2, &tmp16);
767
768 tmp16 = GMII_PHY_PGSEL_PAGE0;
769 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
770 GMII_PHY_PAGE_SELECT, 2, &tmp16);
771}
772
773static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
774{
775 struct usbnet *dev = netdev_priv(net);
776 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
777
778 edata->eee_enabled = priv->eee_enabled;
779 edata->eee_active = priv->eee_active;
780
781 return ax88179_ethtool_get_eee(dev, edata);
782}
783
784static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
785{
786 struct usbnet *dev = netdev_priv(net);
787 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
788 int ret = -EOPNOTSUPP;
789
790 priv->eee_enabled = edata->eee_enabled;
791 if (!priv->eee_enabled) {
792 ax88179_disable_eee(dev);
793 } else {
794 priv->eee_enabled = ax88179_chk_eee(dev);
795 if (!priv->eee_enabled)
796 return -EOPNOTSUPP;
797
798 ax88179_enable_eee(dev);
799 }
800
801 ret = ax88179_ethtool_set_eee(dev, edata);
802 if (ret)
803 return ret;
804
805 mii_nway_restart(&dev->mii);
806
807 usbnet_link_change(dev, 0, 0);
808
809 return ret;
810}
811
812static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
813{
814 struct usbnet *dev = netdev_priv(net);
815 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
816}
817
818static const struct ethtool_ops ax88179_ethtool_ops = {
819 .get_link = ethtool_op_get_link,
820 .get_msglevel = usbnet_get_msglevel,
821 .set_msglevel = usbnet_set_msglevel,
822 .get_wol = ax88179_get_wol,
823 .set_wol = ax88179_set_wol,
824 .get_eeprom_len = ax88179_get_eeprom_len,
825 .get_eeprom = ax88179_get_eeprom,
826 .get_eee = ax88179_get_eee,
827 .set_eee = ax88179_set_eee,
828 .nway_reset = usbnet_nway_reset,
829 .get_link_ksettings = ax88179_get_link_ksettings,
830 .set_link_ksettings = ax88179_set_link_ksettings,
831};
832
833static void ax88179_set_multicast(struct net_device *net)
834{
835 struct usbnet *dev = netdev_priv(net);
836 struct ax88179_data *data = (struct ax88179_data *)dev->data;
837 u8 *m_filter = ((u8 *)dev->data) + 12;
838
839 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
840
841 if (net->flags & IFF_PROMISC) {
842 data->rxctl |= AX_RX_CTL_PRO;
843 } else if (net->flags & IFF_ALLMULTI ||
844 netdev_mc_count(net) > AX_MAX_MCAST) {
845 data->rxctl |= AX_RX_CTL_AMALL;
846 } else if (netdev_mc_empty(net)) {
847 /* just broadcast and directed */
848 } else {
849 /* We use the 20 byte dev->data for our 8 byte filter buffer
850 * to avoid allocating memory that is tricky to free later
851 */
852 u32 crc_bits;
853 struct netdev_hw_addr *ha;
854
855 memset(m_filter, 0, AX_MCAST_FLTSIZE);
856
857 netdev_for_each_mc_addr(ha, net) {
858 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
859 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
860 }
861
862 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
863 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
864 m_filter);
865
866 data->rxctl |= AX_RX_CTL_AM;
867 }
868
869 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
870 2, 2, &data->rxctl);
871}
872
873static int
874ax88179_set_features(struct net_device *net, netdev_features_t features)
875{
876 u8 tmp;
877 struct usbnet *dev = netdev_priv(net);
878 netdev_features_t changed = net->features ^ features;
879
880 if (changed & NETIF_F_IP_CSUM) {
881 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
882 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
883 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
884 }
885
886 if (changed & NETIF_F_IPV6_CSUM) {
887 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
888 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
889 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
890 }
891
892 if (changed & NETIF_F_RXCSUM) {
893 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
894 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
895 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
896 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
897 }
898
899 return 0;
900}
901
902static int ax88179_change_mtu(struct net_device *net, int new_mtu)
903{
904 struct usbnet *dev = netdev_priv(net);
905 u16 tmp16;
906
907 net->mtu = new_mtu;
908 dev->hard_mtu = net->mtu + net->hard_header_len;
909
910 if (net->mtu > 1500) {
911 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
912 2, 2, &tmp16);
913 tmp16 |= AX_MEDIUM_JUMBO_EN;
914 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
915 2, 2, &tmp16);
916 } else {
917 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
918 2, 2, &tmp16);
919 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
920 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
921 2, 2, &tmp16);
922 }
923
924 /* max qlen depend on hard_mtu and rx_urb_size */
925 usbnet_update_max_qlen(dev);
926
927 return 0;
928}
929
930static int ax88179_set_mac_addr(struct net_device *net, void *p)
931{
932 struct usbnet *dev = netdev_priv(net);
933 struct sockaddr *addr = p;
934 int ret;
935
936 if (netif_running(net))
937 return -EBUSY;
938 if (!is_valid_ether_addr(addr->sa_data))
939 return -EADDRNOTAVAIL;
940
941 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
942
943 /* Set the MAC address */
944 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
945 ETH_ALEN, net->dev_addr);
946 if (ret < 0)
947 return ret;
948
949 return 0;
950}
951
952static const struct net_device_ops ax88179_netdev_ops = {
953 .ndo_open = usbnet_open,
954 .ndo_stop = usbnet_stop,
955 .ndo_start_xmit = usbnet_start_xmit,
956 .ndo_tx_timeout = usbnet_tx_timeout,
957 .ndo_get_stats64 = usbnet_get_stats64,
958 .ndo_change_mtu = ax88179_change_mtu,
959 .ndo_set_mac_address = ax88179_set_mac_addr,
960 .ndo_validate_addr = eth_validate_addr,
961 .ndo_do_ioctl = ax88179_ioctl,
962 .ndo_set_rx_mode = ax88179_set_multicast,
963 .ndo_set_features = ax88179_set_features,
964};
965
966static int ax88179_check_eeprom(struct usbnet *dev)
967{
968 u8 i, buf, eeprom[20];
969 u16 csum, delay = HZ / 10;
970 unsigned long jtimeout;
971
972 /* Read EEPROM content */
973 for (i = 0; i < 6; i++) {
974 buf = i;
975 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
976 1, 1, &buf) < 0)
977 return -EINVAL;
978
979 buf = EEP_RD;
980 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
981 1, 1, &buf) < 0)
982 return -EINVAL;
983
984 jtimeout = jiffies + delay;
985 do {
986 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
987 1, 1, &buf);
988
989 if (time_after(jiffies, jtimeout))
990 return -EINVAL;
991
992 } while (buf & EEP_BUSY);
993
994 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
995 2, 2, &eeprom[i * 2], 0);
996
997 if ((i == 0) && (eeprom[0] == 0xFF))
998 return -EINVAL;
999 }
1000
1001 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1002 csum = (csum >> 8) + (csum & 0xff);
1003 if ((csum + eeprom[10]) != 0xff)
1004 return -EINVAL;
1005
1006 return 0;
1007}
1008
1009static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1010{
1011 u8 i;
1012 u8 efuse[64];
1013 u16 csum = 0;
1014
1015 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1016 return -EINVAL;
1017
1018 if (*efuse == 0xFF)
1019 return -EINVAL;
1020
1021 for (i = 0; i < 64; i++)
1022 csum = csum + efuse[i];
1023
1024 while (csum > 255)
1025 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1026
1027 if (csum != 0xFF)
1028 return -EINVAL;
1029
1030 *ledmode = (efuse[51] << 8) | efuse[52];
1031
1032 return 0;
1033}
1034
1035static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1036{
1037 u16 led;
1038
1039 /* Loaded the old eFuse LED Mode */
1040 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1041 return -EINVAL;
1042
1043 led >>= 8;
1044 switch (led) {
1045 case 0xFF:
1046 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1047 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1048 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1049 break;
1050 case 0xFE:
1051 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1052 break;
1053 case 0xFD:
1054 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1055 LED2_LINK_10 | LED_VALID;
1056 break;
1057 case 0xFC:
1058 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1059 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1060 break;
1061 default:
1062 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1063 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1064 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1065 break;
1066 }
1067
1068 *ledvalue = led;
1069
1070 return 0;
1071}
1072
1073static int ax88179_led_setting(struct usbnet *dev)
1074{
1075 u8 ledfd, value = 0;
1076 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1077 unsigned long jtimeout;
1078
1079 /* Check AX88179 version. UA1 or UA2*/
1080 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1081
1082 if (!(value & AX_SECLD)) { /* UA1 */
1083 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1084 AX_GPIO_CTRL_GPIO1EN;
1085 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1086 1, 1, &value) < 0)
1087 return -EINVAL;
1088 }
1089
1090 /* Check EEPROM */
1091 if (!ax88179_check_eeprom(dev)) {
1092 value = 0x42;
1093 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1094 1, 1, &value) < 0)
1095 return -EINVAL;
1096
1097 value = EEP_RD;
1098 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1099 1, 1, &value) < 0)
1100 return -EINVAL;
1101
1102 jtimeout = jiffies + delay;
1103 do {
1104 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1105 1, 1, &value);
1106
1107 if (time_after(jiffies, jtimeout))
1108 return -EINVAL;
1109
1110 } while (value & EEP_BUSY);
1111
1112 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1113 1, 1, &value);
1114 ledvalue = (value << 8);
1115
1116 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1117 1, 1, &value);
1118 ledvalue |= value;
1119
1120 /* load internal ROM for defaule setting */
1121 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1122 ax88179_convert_old_led(dev, &ledvalue);
1123
1124 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1125 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1126 ax88179_convert_old_led(dev, &ledvalue);
1127 } else {
1128 ax88179_convert_old_led(dev, &ledvalue);
1129 }
1130
1131 tmp = GMII_PHY_PGSEL_EXT;
1132 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1133 GMII_PHY_PAGE_SELECT, 2, &tmp);
1134
1135 tmp = 0x2c;
1136 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1137 GMII_PHYPAGE, 2, &tmp);
1138
1139 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1140 GMII_LED_ACT, 2, &ledact);
1141
1142 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1143 GMII_LED_LINK, 2, &ledlink);
1144
1145 ledact &= GMII_LED_ACTIVE_MASK;
1146 ledlink &= GMII_LED_LINK_MASK;
1147
1148 if (ledvalue & LED0_ACTIVE)
1149 ledact |= GMII_LED0_ACTIVE;
1150
1151 if (ledvalue & LED1_ACTIVE)
1152 ledact |= GMII_LED1_ACTIVE;
1153
1154 if (ledvalue & LED2_ACTIVE)
1155 ledact |= GMII_LED2_ACTIVE;
1156
1157 if (ledvalue & LED0_LINK_10)
1158 ledlink |= GMII_LED0_LINK_10;
1159
1160 if (ledvalue & LED1_LINK_10)
1161 ledlink |= GMII_LED1_LINK_10;
1162
1163 if (ledvalue & LED2_LINK_10)
1164 ledlink |= GMII_LED2_LINK_10;
1165
1166 if (ledvalue & LED0_LINK_100)
1167 ledlink |= GMII_LED0_LINK_100;
1168
1169 if (ledvalue & LED1_LINK_100)
1170 ledlink |= GMII_LED1_LINK_100;
1171
1172 if (ledvalue & LED2_LINK_100)
1173 ledlink |= GMII_LED2_LINK_100;
1174
1175 if (ledvalue & LED0_LINK_1000)
1176 ledlink |= GMII_LED0_LINK_1000;
1177
1178 if (ledvalue & LED1_LINK_1000)
1179 ledlink |= GMII_LED1_LINK_1000;
1180
1181 if (ledvalue & LED2_LINK_1000)
1182 ledlink |= GMII_LED2_LINK_1000;
1183
1184 tmp = ledact;
1185 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1186 GMII_LED_ACT, 2, &tmp);
1187
1188 tmp = ledlink;
1189 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1190 GMII_LED_LINK, 2, &tmp);
1191
1192 tmp = GMII_PHY_PGSEL_PAGE0;
1193 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1194 GMII_PHY_PAGE_SELECT, 2, &tmp);
1195
1196 /* LED full duplex setting */
1197 ledfd = 0;
1198 if (ledvalue & LED0_FD)
1199 ledfd |= 0x01;
1200 else if ((ledvalue & LED0_USB3_MASK) == 0)
1201 ledfd |= 0x02;
1202
1203 if (ledvalue & LED1_FD)
1204 ledfd |= 0x04;
1205 else if ((ledvalue & LED1_USB3_MASK) == 0)
1206 ledfd |= 0x08;
1207
1208 if (ledvalue & LED2_FD)
1209 ledfd |= 0x10;
1210 else if ((ledvalue & LED2_USB3_MASK) == 0)
1211 ledfd |= 0x20;
1212
1213 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1214
1215 return 0;
1216}
1217
1218static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1219{
1220 u8 buf[5];
1221 u16 *tmp16;
1222 u8 *tmp;
1223 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1224 struct ethtool_eee eee_data;
1225
1226 usbnet_get_endpoints(dev, intf);
1227
1228 tmp16 = (u16 *)buf;
1229 tmp = (u8 *)buf;
1230
1231 memset(ax179_data, 0, sizeof(*ax179_data));
1232
1233 /* Power up ethernet PHY */
1234 *tmp16 = 0;
1235 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1236 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1237 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1238 msleep(200);
1239
1240 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1241 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1242 msleep(100);
1243
1244 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1245 ETH_ALEN, dev->net->dev_addr);
1246 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1247
1248 /* RX bulk configuration */
1249 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1250 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1251
1252 dev->rx_urb_size = 1024 * 20;
1253
1254 *tmp = 0x34;
1255 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1256
1257 *tmp = 0x52;
1258 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1259 1, 1, tmp);
1260
1261 dev->net->netdev_ops = &ax88179_netdev_ops;
1262 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1263 dev->net->needed_headroom = 8;
1264 dev->net->max_mtu = 4088;
1265
1266 /* Initialize MII structure */
1267 dev->mii.dev = dev->net;
1268 dev->mii.mdio_read = ax88179_mdio_read;
1269 dev->mii.mdio_write = ax88179_mdio_write;
1270 dev->mii.phy_id_mask = 0xff;
1271 dev->mii.reg_num_mask = 0xff;
1272 dev->mii.phy_id = 0x03;
1273 dev->mii.supports_gmii = 1;
1274
1275 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1276 NETIF_F_RXCSUM;
1277
1278 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1279 NETIF_F_RXCSUM;
1280
1281 /* Enable checksum offload */
1282 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1283 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1284 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1285
1286 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1287 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1288 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1289
1290 /* Configure RX control register => start operation */
1291 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1292 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1293 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1294
1295 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1296 AX_MONITOR_MODE_RWMP;
1297 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1298
1299 /* Configure default medium type => giga */
1300 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1301 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1302 AX_MEDIUM_GIGAMODE;
1303 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1304 2, 2, tmp16);
1305
1306 ax88179_led_setting(dev);
1307
1308 ax179_data->eee_enabled = 0;
1309 ax179_data->eee_active = 0;
1310
1311 ax88179_disable_eee(dev);
1312
1313 ax88179_ethtool_get_eee(dev, &eee_data);
1314 eee_data.advertised = 0;
1315 ax88179_ethtool_set_eee(dev, &eee_data);
1316
1317 /* Restart autoneg */
1318 mii_nway_restart(&dev->mii);
1319
1320 usbnet_link_change(dev, 0, 0);
1321
1322 return 0;
1323}
1324
1325static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1326{
1327 u16 tmp16;
1328
1329 /* Configure RX control register => stop operation */
1330 tmp16 = AX_RX_CTL_STOP;
1331 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1332
1333 tmp16 = 0;
1334 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1335
1336 /* Power down ethernet PHY */
1337 tmp16 = 0;
1338 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1339}
1340
1341static void
1342ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1343{
1344 skb->ip_summed = CHECKSUM_NONE;
1345
1346 /* checksum error bit is set */
1347 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1348 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1349 return;
1350
1351 /* It must be a TCP or UDP packet with a valid checksum */
1352 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1353 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1354 skb->ip_summed = CHECKSUM_UNNECESSARY;
1355}
1356
1357static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1358{
1359 struct sk_buff *ax_skb;
1360 int pkt_cnt;
1361 u32 rx_hdr;
1362 u16 hdr_off;
1363 u32 *pkt_hdr;
1364
1365 /* At the end of the SKB, there's a header telling us how many packets
1366 * are bundled into this buffer and where we can find an array of
1367 * per-packet metadata (which contains elements encoded into u16).
1368 */
1369
1370 /* SKB contents for current firmware:
1371 * <packet 1> <padding>
1372 * ...
1373 * <packet N> <padding>
1374 * <per-packet metadata entry 1> <dummy header>
1375 * ...
1376 * <per-packet metadata entry N> <dummy header>
1377 * <padding2> <rx_hdr>
1378 *
1379 * where:
1380 * <packet N> contains pkt_len bytes:
1381 * 2 bytes of IP alignment pseudo header
1382 * packet received
1383 * <per-packet metadata entry N> contains 4 bytes:
1384 * pkt_len and fields AX_RXHDR_*
1385 * <padding> 0-7 bytes to terminate at
1386 * 8 bytes boundary (64-bit).
1387 * <padding2> 4 bytes to make rx_hdr terminate at
1388 * 8 bytes boundary (64-bit)
1389 * <dummy-header> contains 4 bytes:
1390 * pkt_len=0 and AX_RXHDR_DROP_ERR
1391 * <rx-hdr> contains 4 bytes:
1392 * pkt_cnt and hdr_off (offset of
1393 * <per-packet metadata entry 1>)
1394 *
1395 * pkt_cnt is number of entrys in the per-packet metadata.
1396 * In current firmware there is 2 entrys per packet.
1397 * The first points to the packet and the
1398 * second is a dummy header.
1399 * This was done probably to align fields in 64-bit and
1400 * maintain compatibility with old firmware.
1401 * This code assumes that <dummy header> and <padding2> are
1402 * optional.
1403 */
1404
1405 if (skb->len < 4)
1406 return 0;
1407 skb_trim(skb, skb->len - 4);
1408 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1409 pkt_cnt = (u16)rx_hdr;
1410 hdr_off = (u16)(rx_hdr >> 16);
1411
1412 if (pkt_cnt == 0)
1413 return 0;
1414
1415 /* Make sure that the bounds of the metadata array are inside the SKB
1416 * (and in front of the counter at the end).
1417 */
1418 if (pkt_cnt * 4 + hdr_off > skb->len)
1419 return 0;
1420 pkt_hdr = (u32 *)(skb->data + hdr_off);
1421
1422 /* Packets must not overlap the metadata array */
1423 skb_trim(skb, hdr_off);
1424
1425 for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1426 u16 pkt_len_plus_padd;
1427 u16 pkt_len;
1428
1429 le32_to_cpus(pkt_hdr);
1430 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1431 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1432
1433 /* Skip dummy header used for alignment
1434 */
1435 if (pkt_len == 0)
1436 continue;
1437
1438 if (pkt_len_plus_padd > skb->len)
1439 return 0;
1440
1441 /* Check CRC or runt packet */
1442 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1443 pkt_len < 2 + ETH_HLEN) {
1444 dev->net->stats.rx_errors++;
1445 skb_pull(skb, pkt_len_plus_padd);
1446 continue;
1447 }
1448
1449 /* last packet */
1450 if (pkt_len_plus_padd == skb->len) {
1451 skb_trim(skb, pkt_len);
1452
1453 /* Skip IP alignment pseudo header */
1454 skb_pull(skb, 2);
1455
1456 ax88179_rx_checksum(skb, pkt_hdr);
1457 return 1;
1458 }
1459
1460 ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
1461 if (!ax_skb)
1462 return 0;
1463 skb_put(ax_skb, pkt_len);
1464 memcpy(ax_skb->data, skb->data + 2, pkt_len);
1465
1466 ax88179_rx_checksum(ax_skb, pkt_hdr);
1467 usbnet_skb_return(dev, ax_skb);
1468
1469 skb_pull(skb, pkt_len_plus_padd);
1470 }
1471
1472 return 0;
1473}
1474
1475static struct sk_buff *
1476ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1477{
1478 u32 tx_hdr1, tx_hdr2;
1479 int frame_size = dev->maxpacket;
1480 int mss = skb_shinfo(skb)->gso_size;
1481 int headroom;
1482 void *ptr;
1483
1484 tx_hdr1 = skb->len;
1485 tx_hdr2 = mss;
1486 if (((skb->len + 8) % frame_size) == 0)
1487 tx_hdr2 |= 0x80008000; /* Enable padding */
1488
1489 headroom = skb_headroom(skb) - 8;
1490
1491 if ((skb_header_cloned(skb) || headroom < 0) &&
1492 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1493 dev_kfree_skb_any(skb);
1494 return NULL;
1495 }
1496
1497 ptr = skb_push(skb, 8);
1498 put_unaligned_le32(tx_hdr1, ptr);
1499 put_unaligned_le32(tx_hdr2, ptr + 4);
1500
1501 return skb;
1502}
1503
1504static int ax88179_link_reset(struct usbnet *dev)
1505{
1506 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1507 u8 tmp[5], link_sts;
1508 u16 mode, tmp16, delay = HZ / 10;
1509 u32 tmp32 = 0x40000000;
1510 unsigned long jtimeout;
1511
1512 jtimeout = jiffies + delay;
1513 while (tmp32 & 0x40000000) {
1514 mode = 0;
1515 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1516 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1517 &ax179_data->rxctl);
1518
1519 /*link up, check the usb device control TX FIFO full or empty*/
1520 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1521
1522 if (time_after(jiffies, jtimeout))
1523 return 0;
1524 }
1525
1526 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1527 AX_MEDIUM_RXFLOW_CTRLEN;
1528
1529 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1530 1, 1, &link_sts);
1531
1532 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1533 GMII_PHY_PHYSR, 2, &tmp16);
1534
1535 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1536 netdev_info(dev->net, "ax88179 - Link status is: 0\n");
1537 return 0;
1538 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1539 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1540 if (dev->net->mtu > 1500)
1541 mode |= AX_MEDIUM_JUMBO_EN;
1542
1543 if (link_sts & AX_USB_SS)
1544 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1545 else if (link_sts & AX_USB_HS)
1546 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1547 else
1548 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1549 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1550 mode |= AX_MEDIUM_PS;
1551
1552 if (link_sts & (AX_USB_SS | AX_USB_HS))
1553 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1554 else
1555 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1556 } else {
1557 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1558 }
1559
1560 /* RX bulk configuration */
1561 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1562
1563 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1564
1565 if (tmp16 & GMII_PHY_PHYSR_FULL)
1566 mode |= AX_MEDIUM_FULL_DUPLEX;
1567 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1568 2, 2, &mode);
1569
1570 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1571
1572 netif_carrier_on(dev->net);
1573
1574 netdev_info(dev->net, "ax88179 - Link status is: 1\n");
1575
1576 return 0;
1577}
1578
1579static int ax88179_reset(struct usbnet *dev)
1580{
1581 u8 buf[5];
1582 u16 *tmp16;
1583 u8 *tmp;
1584 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1585 struct ethtool_eee eee_data;
1586
1587 tmp16 = (u16 *)buf;
1588 tmp = (u8 *)buf;
1589
1590 /* Power up ethernet PHY */
1591 *tmp16 = 0;
1592 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1593
1594 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1595 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1596 msleep(500);
1597
1598 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1599 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1600 msleep(200);
1601
1602 /* Ethernet PHY Auto Detach*/
1603 ax88179_auto_detach(dev, 0);
1604
1605 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1606 dev->net->dev_addr);
1607
1608 /* RX bulk configuration */
1609 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1610 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1611
1612 dev->rx_urb_size = 1024 * 20;
1613
1614 *tmp = 0x34;
1615 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1616
1617 *tmp = 0x52;
1618 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1619 1, 1, tmp);
1620
1621 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1622 NETIF_F_RXCSUM;
1623
1624 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1625 NETIF_F_RXCSUM;
1626
1627 /* Enable checksum offload */
1628 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1629 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1630 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1631
1632 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1633 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1634 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1635
1636 /* Configure RX control register => start operation */
1637 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1638 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1639 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1640
1641 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1642 AX_MONITOR_MODE_RWMP;
1643 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1644
1645 /* Configure default medium type => giga */
1646 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1647 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1648 AX_MEDIUM_GIGAMODE;
1649 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1650 2, 2, tmp16);
1651
1652 ax88179_led_setting(dev);
1653
1654 ax179_data->eee_enabled = 0;
1655 ax179_data->eee_active = 0;
1656
1657 ax88179_disable_eee(dev);
1658
1659 ax88179_ethtool_get_eee(dev, &eee_data);
1660 eee_data.advertised = 0;
1661 ax88179_ethtool_set_eee(dev, &eee_data);
1662
1663 /* Restart autoneg */
1664 mii_nway_restart(&dev->mii);
1665
1666 usbnet_link_change(dev, 0, 0);
1667
1668 return 0;
1669}
1670
1671static int ax88179_stop(struct usbnet *dev)
1672{
1673 u16 tmp16;
1674
1675 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1676 2, 2, &tmp16);
1677 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1678 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1679 2, 2, &tmp16);
1680
1681 return 0;
1682}
1683
1684static const struct driver_info ax88179_info = {
1685 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1686 .bind = ax88179_bind,
1687 .unbind = ax88179_unbind,
1688 .status = ax88179_status,
1689 .link_reset = ax88179_link_reset,
1690 .reset = ax88179_reset,
1691 .stop = ax88179_stop,
1692 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1693 .rx_fixup = ax88179_rx_fixup,
1694 .tx_fixup = ax88179_tx_fixup,
1695};
1696
1697static const struct driver_info ax88178a_info = {
1698 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1699 .bind = ax88179_bind,
1700 .unbind = ax88179_unbind,
1701 .status = ax88179_status,
1702 .link_reset = ax88179_link_reset,
1703 .reset = ax88179_reset,
1704 .stop = ax88179_stop,
1705 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1706 .rx_fixup = ax88179_rx_fixup,
1707 .tx_fixup = ax88179_tx_fixup,
1708};
1709
1710static const struct driver_info cypress_GX3_info = {
1711 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1712 .bind = ax88179_bind,
1713 .unbind = ax88179_unbind,
1714 .status = ax88179_status,
1715 .link_reset = ax88179_link_reset,
1716 .reset = ax88179_reset,
1717 .stop = ax88179_stop,
1718 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1719 .rx_fixup = ax88179_rx_fixup,
1720 .tx_fixup = ax88179_tx_fixup,
1721};
1722
1723static const struct driver_info dlink_dub1312_info = {
1724 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1725 .bind = ax88179_bind,
1726 .unbind = ax88179_unbind,
1727 .status = ax88179_status,
1728 .link_reset = ax88179_link_reset,
1729 .reset = ax88179_reset,
1730 .stop = ax88179_stop,
1731 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1732 .rx_fixup = ax88179_rx_fixup,
1733 .tx_fixup = ax88179_tx_fixup,
1734};
1735
1736static const struct driver_info sitecom_info = {
1737 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1738 .bind = ax88179_bind,
1739 .unbind = ax88179_unbind,
1740 .status = ax88179_status,
1741 .link_reset = ax88179_link_reset,
1742 .reset = ax88179_reset,
1743 .stop = ax88179_stop,
1744 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1745 .rx_fixup = ax88179_rx_fixup,
1746 .tx_fixup = ax88179_tx_fixup,
1747};
1748
1749static const struct driver_info samsung_info = {
1750 .description = "Samsung USB Ethernet Adapter",
1751 .bind = ax88179_bind,
1752 .unbind = ax88179_unbind,
1753 .status = ax88179_status,
1754 .link_reset = ax88179_link_reset,
1755 .reset = ax88179_reset,
1756 .stop = ax88179_stop,
1757 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1758 .rx_fixup = ax88179_rx_fixup,
1759 .tx_fixup = ax88179_tx_fixup,
1760};
1761
1762static const struct driver_info lenovo_info = {
1763 .description = "Lenovo OneLinkDock Gigabit LAN",
1764 .bind = ax88179_bind,
1765 .unbind = ax88179_unbind,
1766 .status = ax88179_status,
1767 .link_reset = ax88179_link_reset,
1768 .reset = ax88179_reset,
1769 .stop = ax88179_stop,
1770 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1771 .rx_fixup = ax88179_rx_fixup,
1772 .tx_fixup = ax88179_tx_fixup,
1773};
1774
1775static const struct driver_info belkin_info = {
1776 .description = "Belkin USB Ethernet Adapter",
1777 .bind = ax88179_bind,
1778 .unbind = ax88179_unbind,
1779 .status = ax88179_status,
1780 .link_reset = ax88179_link_reset,
1781 .reset = ax88179_reset,
1782 .stop = ax88179_stop,
1783 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1784 .rx_fixup = ax88179_rx_fixup,
1785 .tx_fixup = ax88179_tx_fixup,
1786};
1787
1788static const struct usb_device_id products[] = {
1789{
1790 /* ASIX AX88179 10/100/1000 */
1791 USB_DEVICE(0x0b95, 0x1790),
1792 .driver_info = (unsigned long)&ax88179_info,
1793}, {
1794 /* ASIX AX88178A 10/100/1000 */
1795 USB_DEVICE(0x0b95, 0x178a),
1796 .driver_info = (unsigned long)&ax88178a_info,
1797}, {
1798 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1799 USB_DEVICE(0x04b4, 0x3610),
1800 .driver_info = (unsigned long)&cypress_GX3_info,
1801}, {
1802 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1803 USB_DEVICE(0x2001, 0x4a00),
1804 .driver_info = (unsigned long)&dlink_dub1312_info,
1805}, {
1806 /* Sitecom USB 3.0 to Gigabit Adapter */
1807 USB_DEVICE(0x0df6, 0x0072),
1808 .driver_info = (unsigned long)&sitecom_info,
1809}, {
1810 /* Samsung USB Ethernet Adapter */
1811 USB_DEVICE(0x04e8, 0xa100),
1812 .driver_info = (unsigned long)&samsung_info,
1813}, {
1814 /* Lenovo OneLinkDock Gigabit LAN */
1815 USB_DEVICE(0x17ef, 0x304b),
1816 .driver_info = (unsigned long)&lenovo_info,
1817}, {
1818 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1819 USB_DEVICE(0x050d, 0x0128),
1820 .driver_info = (unsigned long)&belkin_info,
1821},
1822 { },
1823};
1824MODULE_DEVICE_TABLE(usb, products);
1825
1826static struct usb_driver ax88179_178a_driver = {
1827 .name = "ax88179_178a",
1828 .id_table = products,
1829 .probe = usbnet_probe,
1830 .suspend = ax88179_suspend,
1831 .resume = ax88179_resume,
1832 .reset_resume = ax88179_resume,
1833 .disconnect = usbnet_disconnect,
1834 .supports_autosuspend = 1,
1835 .disable_hub_initiated_lpm = 1,
1836};
1837
1838module_usb_driver(ax88179_178a_driver);
1839
1840MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1841MODULE_LICENSE("GPL");