blob: 17b6f4a872d6a9e4fe61f1c6fba82742f20d7f24 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 *
4 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5 *
6 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
7 * to use polling for flow control. TX empty IRQ is unusable, since
8 * writing conf clears FIFO buffer and we cannot have this interrupt
9 * always asking us for attention.
10 *
11 * Example platform data:
12
13 static struct plat_max3100 max3100_plat_data = {
14 .loopback = 0,
15 .crystal = 0,
16 .poll_time = 100,
17 };
18
19 static struct spi_board_info spi_board_info[] = {
20 {
21 .modalias = "max3100",
22 .platform_data = &max3100_plat_data,
23 .irq = IRQ_EINT12,
24 .max_speed_hz = 5*1000*1000,
25 .chip_select = 0,
26 },
27 };
28
29 * The initial minor number is 209 in the low-density serial port:
30 * mknod /dev/ttyMAX0 c 204 209
31 */
32
33#define MAX3100_MAJOR 204
34#define MAX3100_MINOR 209
35/* 4 MAX3100s should be enough for everyone */
36#define MAX_MAX3100 4
37
38#include <linux/delay.h>
39#include <linux/slab.h>
40#include <linux/device.h>
41#include <linux/module.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
44#include <linux/spi/spi.h>
45#include <linux/freezer.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/types.h>
49
50#include <asm/unaligned.h>
51
52#include <linux/serial_max3100.h>
53
54#define MAX3100_C (1<<14)
55#define MAX3100_D (0<<14)
56#define MAX3100_W (1<<15)
57#define MAX3100_RX (0<<15)
58
59#define MAX3100_WC (MAX3100_W | MAX3100_C)
60#define MAX3100_RC (MAX3100_RX | MAX3100_C)
61#define MAX3100_WD (MAX3100_W | MAX3100_D)
62#define MAX3100_RD (MAX3100_RX | MAX3100_D)
63#define MAX3100_CMD (3 << 14)
64
65#define MAX3100_T (1<<14)
66#define MAX3100_R (1<<15)
67
68#define MAX3100_FEN (1<<13)
69#define MAX3100_SHDN (1<<12)
70#define MAX3100_TM (1<<11)
71#define MAX3100_RM (1<<10)
72#define MAX3100_PM (1<<9)
73#define MAX3100_RAM (1<<8)
74#define MAX3100_IR (1<<7)
75#define MAX3100_ST (1<<6)
76#define MAX3100_PE (1<<5)
77#define MAX3100_L (1<<4)
78#define MAX3100_BAUD (0xf)
79
80#define MAX3100_TE (1<<10)
81#define MAX3100_RAFE (1<<10)
82#define MAX3100_RTS (1<<9)
83#define MAX3100_CTS (1<<9)
84#define MAX3100_PT (1<<8)
85#define MAX3100_DATA (0xff)
86
87#define MAX3100_RT (MAX3100_R | MAX3100_T)
88#define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
89
90/* the following simulate a status reg for ignore_status_mask */
91#define MAX3100_STATUS_PE 1
92#define MAX3100_STATUS_FE 2
93#define MAX3100_STATUS_OE 4
94
95struct max3100_port {
96 struct uart_port port;
97 struct spi_device *spi;
98
99 int cts; /* last CTS received for flow ctrl */
100 int tx_empty; /* last TX empty bit */
101
102 spinlock_t conf_lock; /* shared data */
103 int conf_commit; /* need to make changes */
104 int conf; /* configuration for the MAX31000
105 * (bits 0-7, bits 8-11 are irqs) */
106 int rts_commit; /* need to change rts */
107 int rts; /* rts status */
108 int baud; /* current baud rate */
109
110 int parity; /* keeps track if we should send parity */
111#define MAX3100_PARITY_ON 1
112#define MAX3100_PARITY_ODD 2
113#define MAX3100_7BIT 4
114 int rx_enabled; /* if we should rx chars */
115
116 int irq; /* irq assigned to the max3100 */
117
118 int minor; /* minor number */
119 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
120 int loopback; /* 1 if we are in loopback mode */
121
122 /* for handling irqs: need workqueue since we do spi_sync */
123 struct workqueue_struct *workqueue;
124 struct work_struct work;
125 /* set to 1 to make the workhandler exit as soon as possible */
126 int force_end_work;
127 /* need to know we are suspending to avoid deadlock on workqueue */
128 int suspending;
129
130 /* hook for suspending MAX3100 via dedicated pin */
131 void (*max3100_hw_suspend) (int suspend);
132
133 /* poll time (in ms) for ctrl lines */
134 int poll_time;
135 /* and its timer */
136 struct timer_list timer;
137};
138
139static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
140static DEFINE_MUTEX(max3100s_lock); /* race on probe */
141
142static int max3100_do_parity(struct max3100_port *s, u16 c)
143{
144 int parity;
145
146 if (s->parity & MAX3100_PARITY_ODD)
147 parity = 1;
148 else
149 parity = 0;
150
151 if (s->parity & MAX3100_7BIT)
152 c &= 0x7f;
153 else
154 c &= 0xff;
155
156 parity = parity ^ (hweight8(c) & 1);
157 return parity;
158}
159
160static int max3100_check_parity(struct max3100_port *s, u16 c)
161{
162 return max3100_do_parity(s, c) == ((c >> 8) & 1);
163}
164
165static void max3100_calc_parity(struct max3100_port *s, u16 *c)
166{
167 if (s->parity & MAX3100_7BIT)
168 *c &= 0x7f;
169 else
170 *c &= 0xff;
171
172 if (s->parity & MAX3100_PARITY_ON)
173 *c |= max3100_do_parity(s, *c) << 8;
174}
175
176static void max3100_work(struct work_struct *w);
177
178static void max3100_dowork(struct max3100_port *s)
179{
180 if (!s->force_end_work && !freezing(current) && !s->suspending)
181 queue_work(s->workqueue, &s->work);
182}
183
184static void max3100_timeout(struct timer_list *t)
185{
186 struct max3100_port *s = from_timer(s, t, timer);
187
188 if (s->port.state) {
189 max3100_dowork(s);
190 mod_timer(&s->timer, jiffies + s->poll_time);
191 }
192}
193
194static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
195{
196 struct spi_message message;
197 __be16 etx, erx;
198 int status;
199 struct spi_transfer tran = {
200 .tx_buf = &etx,
201 .rx_buf = &erx,
202 .len = 2,
203 };
204
205 etx = cpu_to_be16(tx);
206 spi_message_init(&message);
207 spi_message_add_tail(&tran, &message);
208 status = spi_sync(s->spi, &message);
209 if (status) {
210 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
211 return -EIO;
212 }
213 *rx = be16_to_cpu(erx);
214 s->tx_empty = (*rx & MAX3100_T) > 0;
215 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
216 return 0;
217}
218
219static int max3100_handlerx_unlocked(struct max3100_port *s, u16 rx)
220{
221 unsigned int ch, flg, status = 0;
222 int ret = 0, cts;
223
224 if (rx & MAX3100_R && s->rx_enabled) {
225 dev_dbg(&s->spi->dev, "%s\n", __func__);
226 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
227 if (rx & MAX3100_RAFE) {
228 s->port.icount.frame++;
229 flg = TTY_FRAME;
230 status |= MAX3100_STATUS_FE;
231 } else {
232 if (s->parity & MAX3100_PARITY_ON) {
233 if (max3100_check_parity(s, rx)) {
234 s->port.icount.rx++;
235 flg = TTY_NORMAL;
236 } else {
237 s->port.icount.parity++;
238 flg = TTY_PARITY;
239 status |= MAX3100_STATUS_PE;
240 }
241 } else {
242 s->port.icount.rx++;
243 flg = TTY_NORMAL;
244 }
245 }
246 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
247 ret = 1;
248 }
249
250 cts = (rx & MAX3100_CTS) > 0;
251 if (s->cts != cts) {
252 s->cts = cts;
253 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
254 }
255
256 return ret;
257}
258
259static int max3100_handlerx(struct max3100_port *s, u16 rx)
260{
261 unsigned long flags;
262 int ret;
263
264 uart_port_lock_irqsave(&s->port, &flags);
265 ret = max3100_handlerx_unlocked(s, rx);
266 uart_port_unlock_irqrestore(&s->port, flags);
267 return ret;
268}
269
270static void max3100_work(struct work_struct *w)
271{
272 struct max3100_port *s = container_of(w, struct max3100_port, work);
273 int rxchars;
274 u16 tx, rx;
275 int conf, cconf, crts;
276 struct circ_buf *xmit = &s->port.state->xmit;
277
278 dev_dbg(&s->spi->dev, "%s\n", __func__);
279
280 rxchars = 0;
281 do {
282 spin_lock(&s->conf_lock);
283 conf = s->conf;
284 cconf = s->conf_commit;
285 s->conf_commit = 0;
286 crts = s->rts_commit;
287 s->rts_commit = 0;
288 spin_unlock(&s->conf_lock);
289 if (cconf)
290 max3100_sr(s, MAX3100_WC | conf, &rx);
291 if (crts) {
292 max3100_sr(s, MAX3100_WD | MAX3100_TE |
293 (s->rts ? MAX3100_RTS : 0), &rx);
294 rxchars += max3100_handlerx(s, rx);
295 }
296
297 max3100_sr(s, MAX3100_RD, &rx);
298 rxchars += max3100_handlerx(s, rx);
299
300 if (rx & MAX3100_T) {
301 tx = 0xffff;
302 if (s->port.x_char) {
303 tx = s->port.x_char;
304 s->port.icount.tx++;
305 s->port.x_char = 0;
306 } else if (!uart_circ_empty(xmit) &&
307 !uart_tx_stopped(&s->port)) {
308 tx = xmit->buf[xmit->tail];
309 xmit->tail = (xmit->tail + 1) &
310 (UART_XMIT_SIZE - 1);
311 s->port.icount.tx++;
312 }
313 if (tx != 0xffff) {
314 max3100_calc_parity(s, &tx);
315 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
316 max3100_sr(s, tx, &rx);
317 rxchars += max3100_handlerx(s, rx);
318 }
319 }
320
321 if (rxchars > 16) {
322 tty_flip_buffer_push(&s->port.state->port);
323 rxchars = 0;
324 }
325 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
326 uart_write_wakeup(&s->port);
327
328 } while (!s->force_end_work &&
329 !freezing(current) &&
330 ((rx & MAX3100_R) ||
331 (!uart_circ_empty(xmit) &&
332 !uart_tx_stopped(&s->port))));
333
334 if (rxchars > 0)
335 tty_flip_buffer_push(&s->port.state->port);
336}
337
338static irqreturn_t max3100_irq(int irqno, void *dev_id)
339{
340 struct max3100_port *s = dev_id;
341
342 dev_dbg(&s->spi->dev, "%s\n", __func__);
343
344 max3100_dowork(s);
345 return IRQ_HANDLED;
346}
347
348static void max3100_enable_ms(struct uart_port *port)
349{
350 struct max3100_port *s = container_of(port,
351 struct max3100_port,
352 port);
353
354 if (s->poll_time > 0)
355 mod_timer(&s->timer, jiffies);
356 dev_dbg(&s->spi->dev, "%s\n", __func__);
357}
358
359static void max3100_start_tx(struct uart_port *port)
360{
361 struct max3100_port *s = container_of(port,
362 struct max3100_port,
363 port);
364
365 dev_dbg(&s->spi->dev, "%s\n", __func__);
366
367 max3100_dowork(s);
368}
369
370static void max3100_stop_rx(struct uart_port *port)
371{
372 struct max3100_port *s = container_of(port,
373 struct max3100_port,
374 port);
375
376 dev_dbg(&s->spi->dev, "%s\n", __func__);
377
378 s->rx_enabled = 0;
379 spin_lock(&s->conf_lock);
380 s->conf &= ~MAX3100_RM;
381 s->conf_commit = 1;
382 spin_unlock(&s->conf_lock);
383 max3100_dowork(s);
384}
385
386static unsigned int max3100_tx_empty(struct uart_port *port)
387{
388 struct max3100_port *s = container_of(port,
389 struct max3100_port,
390 port);
391
392 dev_dbg(&s->spi->dev, "%s\n", __func__);
393
394 /* may not be truly up-to-date */
395 max3100_dowork(s);
396 return s->tx_empty;
397}
398
399static unsigned int max3100_get_mctrl(struct uart_port *port)
400{
401 struct max3100_port *s = container_of(port,
402 struct max3100_port,
403 port);
404
405 dev_dbg(&s->spi->dev, "%s\n", __func__);
406
407 /* may not be truly up-to-date */
408 max3100_dowork(s);
409 /* always assert DCD and DSR since these lines are not wired */
410 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
411}
412
413static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
414{
415 struct max3100_port *s = container_of(port,
416 struct max3100_port,
417 port);
418 int rts;
419
420 dev_dbg(&s->spi->dev, "%s\n", __func__);
421
422 rts = (mctrl & TIOCM_RTS) > 0;
423
424 spin_lock(&s->conf_lock);
425 if (s->rts != rts) {
426 s->rts = rts;
427 s->rts_commit = 1;
428 max3100_dowork(s);
429 }
430 spin_unlock(&s->conf_lock);
431}
432
433static void
434max3100_set_termios(struct uart_port *port, struct ktermios *termios,
435 struct ktermios *old)
436{
437 struct max3100_port *s = container_of(port,
438 struct max3100_port,
439 port);
440 int baud = 0;
441 unsigned cflag;
442 u32 param_new, param_mask, parity = 0;
443
444 dev_dbg(&s->spi->dev, "%s\n", __func__);
445
446 cflag = termios->c_cflag;
447 param_mask = 0;
448
449 baud = tty_termios_baud_rate(termios);
450 param_new = s->conf & MAX3100_BAUD;
451 switch (baud) {
452 case 300:
453 if (s->crystal)
454 baud = s->baud;
455 else
456 param_new = 15;
457 break;
458 case 600:
459 param_new = 14 + s->crystal;
460 break;
461 case 1200:
462 param_new = 13 + s->crystal;
463 break;
464 case 2400:
465 param_new = 12 + s->crystal;
466 break;
467 case 4800:
468 param_new = 11 + s->crystal;
469 break;
470 case 9600:
471 param_new = 10 + s->crystal;
472 break;
473 case 19200:
474 param_new = 9 + s->crystal;
475 break;
476 case 38400:
477 param_new = 8 + s->crystal;
478 break;
479 case 57600:
480 param_new = 1 + s->crystal;
481 break;
482 case 115200:
483 param_new = 0 + s->crystal;
484 break;
485 case 230400:
486 if (s->crystal)
487 param_new = 0;
488 else
489 baud = s->baud;
490 break;
491 default:
492 baud = s->baud;
493 }
494 tty_termios_encode_baud_rate(termios, baud, baud);
495 s->baud = baud;
496 param_mask |= MAX3100_BAUD;
497
498 if ((cflag & CSIZE) == CS8) {
499 param_new &= ~MAX3100_L;
500 parity &= ~MAX3100_7BIT;
501 } else {
502 param_new |= MAX3100_L;
503 parity |= MAX3100_7BIT;
504 cflag = (cflag & ~CSIZE) | CS7;
505 }
506 param_mask |= MAX3100_L;
507
508 if (cflag & CSTOPB)
509 param_new |= MAX3100_ST;
510 else
511 param_new &= ~MAX3100_ST;
512 param_mask |= MAX3100_ST;
513
514 if (cflag & PARENB) {
515 param_new |= MAX3100_PE;
516 parity |= MAX3100_PARITY_ON;
517 } else {
518 param_new &= ~MAX3100_PE;
519 parity &= ~MAX3100_PARITY_ON;
520 }
521 param_mask |= MAX3100_PE;
522
523 if (cflag & PARODD)
524 parity |= MAX3100_PARITY_ODD;
525 else
526 parity &= ~MAX3100_PARITY_ODD;
527
528 /* mask termios capabilities we don't support */
529 cflag &= ~CMSPAR;
530 termios->c_cflag = cflag;
531
532 s->port.ignore_status_mask = 0;
533 if (termios->c_iflag & IGNPAR)
534 s->port.ignore_status_mask |=
535 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
536 MAX3100_STATUS_OE;
537
538 /* we are sending char from a workqueue so enable */
539 s->port.state->port.low_latency = 1;
540
541 if (s->poll_time > 0)
542 del_timer_sync(&s->timer);
543
544 uart_update_timeout(port, termios->c_cflag, baud);
545
546 spin_lock(&s->conf_lock);
547 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
548 s->conf_commit = 1;
549 s->parity = parity;
550 spin_unlock(&s->conf_lock);
551 max3100_dowork(s);
552
553 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
554 max3100_enable_ms(&s->port);
555}
556
557static void max3100_shutdown(struct uart_port *port)
558{
559 struct max3100_port *s = container_of(port,
560 struct max3100_port,
561 port);
562
563 dev_dbg(&s->spi->dev, "%s\n", __func__);
564
565 if (s->suspending)
566 return;
567
568 s->force_end_work = 1;
569
570 if (s->poll_time > 0)
571 del_timer_sync(&s->timer);
572
573 if (s->workqueue) {
574 flush_workqueue(s->workqueue);
575 destroy_workqueue(s->workqueue);
576 s->workqueue = NULL;
577 }
578 if (s->irq)
579 free_irq(s->irq, s);
580
581 /* set shutdown mode to save power */
582 if (s->max3100_hw_suspend)
583 s->max3100_hw_suspend(1);
584 else {
585 u16 tx, rx;
586
587 tx = MAX3100_WC | MAX3100_SHDN;
588 max3100_sr(s, tx, &rx);
589 }
590}
591
592static int max3100_startup(struct uart_port *port)
593{
594 struct max3100_port *s = container_of(port,
595 struct max3100_port,
596 port);
597 char b[12];
598
599 dev_dbg(&s->spi->dev, "%s\n", __func__);
600
601 s->conf = MAX3100_RM;
602 s->baud = s->crystal ? 230400 : 115200;
603 s->rx_enabled = 1;
604
605 if (s->suspending)
606 return 0;
607
608 s->force_end_work = 0;
609 s->parity = 0;
610 s->rts = 0;
611
612 sprintf(b, "max3100-%d", s->minor);
613 s->workqueue = create_freezable_workqueue(b);
614 if (!s->workqueue) {
615 dev_warn(&s->spi->dev, "cannot create workqueue\n");
616 return -EBUSY;
617 }
618 INIT_WORK(&s->work, max3100_work);
619
620 if (request_irq(s->irq, max3100_irq,
621 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
622 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
623 s->irq = 0;
624 destroy_workqueue(s->workqueue);
625 s->workqueue = NULL;
626 return -EBUSY;
627 }
628
629 if (s->loopback) {
630 u16 tx, rx;
631 tx = 0x4001;
632 max3100_sr(s, tx, &rx);
633 }
634
635 if (s->max3100_hw_suspend)
636 s->max3100_hw_suspend(0);
637 s->conf_commit = 1;
638 max3100_dowork(s);
639 /* wait for clock to settle */
640 msleep(50);
641
642 max3100_enable_ms(&s->port);
643
644 return 0;
645}
646
647static const char *max3100_type(struct uart_port *port)
648{
649 struct max3100_port *s = container_of(port,
650 struct max3100_port,
651 port);
652
653 dev_dbg(&s->spi->dev, "%s\n", __func__);
654
655 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
656}
657
658static void max3100_release_port(struct uart_port *port)
659{
660 struct max3100_port *s = container_of(port,
661 struct max3100_port,
662 port);
663
664 dev_dbg(&s->spi->dev, "%s\n", __func__);
665}
666
667static void max3100_config_port(struct uart_port *port, int flags)
668{
669 struct max3100_port *s = container_of(port,
670 struct max3100_port,
671 port);
672
673 dev_dbg(&s->spi->dev, "%s\n", __func__);
674
675 if (flags & UART_CONFIG_TYPE)
676 s->port.type = PORT_MAX3100;
677}
678
679static int max3100_verify_port(struct uart_port *port,
680 struct serial_struct *ser)
681{
682 struct max3100_port *s = container_of(port,
683 struct max3100_port,
684 port);
685 int ret = -EINVAL;
686
687 dev_dbg(&s->spi->dev, "%s\n", __func__);
688
689 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
690 ret = 0;
691 return ret;
692}
693
694static void max3100_stop_tx(struct uart_port *port)
695{
696 struct max3100_port *s = container_of(port,
697 struct max3100_port,
698 port);
699
700 dev_dbg(&s->spi->dev, "%s\n", __func__);
701}
702
703static int max3100_request_port(struct uart_port *port)
704{
705 struct max3100_port *s = container_of(port,
706 struct max3100_port,
707 port);
708
709 dev_dbg(&s->spi->dev, "%s\n", __func__);
710 return 0;
711}
712
713static void max3100_break_ctl(struct uart_port *port, int break_state)
714{
715 struct max3100_port *s = container_of(port,
716 struct max3100_port,
717 port);
718
719 dev_dbg(&s->spi->dev, "%s\n", __func__);
720}
721
722static const struct uart_ops max3100_ops = {
723 .tx_empty = max3100_tx_empty,
724 .set_mctrl = max3100_set_mctrl,
725 .get_mctrl = max3100_get_mctrl,
726 .stop_tx = max3100_stop_tx,
727 .start_tx = max3100_start_tx,
728 .stop_rx = max3100_stop_rx,
729 .enable_ms = max3100_enable_ms,
730 .break_ctl = max3100_break_ctl,
731 .startup = max3100_startup,
732 .shutdown = max3100_shutdown,
733 .set_termios = max3100_set_termios,
734 .type = max3100_type,
735 .release_port = max3100_release_port,
736 .request_port = max3100_request_port,
737 .config_port = max3100_config_port,
738 .verify_port = max3100_verify_port,
739};
740
741static struct uart_driver max3100_uart_driver = {
742 .owner = THIS_MODULE,
743 .driver_name = "ttyMAX",
744 .dev_name = "ttyMAX",
745 .major = MAX3100_MAJOR,
746 .minor = MAX3100_MINOR,
747 .nr = MAX_MAX3100,
748};
749static int uart_driver_registered;
750
751static int max3100_probe(struct spi_device *spi)
752{
753 int i, retval;
754 struct plat_max3100 *pdata;
755 u16 tx, rx;
756
757 mutex_lock(&max3100s_lock);
758
759 if (!uart_driver_registered) {
760 retval = uart_register_driver(&max3100_uart_driver);
761 if (retval) {
762 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
763 mutex_unlock(&max3100s_lock);
764 return retval;
765 }
766
767 uart_driver_registered = 1;
768 }
769
770 for (i = 0; i < MAX_MAX3100; i++)
771 if (!max3100s[i])
772 break;
773 if (i == MAX_MAX3100) {
774 dev_warn(&spi->dev, "too many MAX3100 chips\n");
775 mutex_unlock(&max3100s_lock);
776 return -ENOMEM;
777 }
778
779 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
780 if (!max3100s[i]) {
781 dev_warn(&spi->dev,
782 "kmalloc for max3100 structure %d failed!\n", i);
783 mutex_unlock(&max3100s_lock);
784 return -ENOMEM;
785 }
786 max3100s[i]->spi = spi;
787 max3100s[i]->irq = spi->irq;
788 spin_lock_init(&max3100s[i]->conf_lock);
789 spi_set_drvdata(spi, max3100s[i]);
790 pdata = dev_get_platdata(&spi->dev);
791 max3100s[i]->crystal = pdata->crystal;
792 max3100s[i]->loopback = pdata->loopback;
793 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
794 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
795 max3100s[i]->poll_time = 1;
796 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
797 max3100s[i]->minor = i;
798 timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
799
800 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
801 max3100s[i]->port.irq = max3100s[i]->irq;
802 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
803 max3100s[i]->port.fifosize = 16;
804 max3100s[i]->port.ops = &max3100_ops;
805 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
806 max3100s[i]->port.line = i;
807 max3100s[i]->port.type = PORT_MAX3100;
808 max3100s[i]->port.dev = &spi->dev;
809 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
810 if (retval < 0)
811 dev_warn(&spi->dev,
812 "uart_add_one_port failed for line %d with error %d\n",
813 i, retval);
814
815 /* set shutdown mode to save power. Will be woken-up on open */
816 if (max3100s[i]->max3100_hw_suspend)
817 max3100s[i]->max3100_hw_suspend(1);
818 else {
819 tx = MAX3100_WC | MAX3100_SHDN;
820 max3100_sr(max3100s[i], tx, &rx);
821 }
822 mutex_unlock(&max3100s_lock);
823 return 0;
824}
825
826static int max3100_remove(struct spi_device *spi)
827{
828 struct max3100_port *s = spi_get_drvdata(spi);
829 int i;
830
831 mutex_lock(&max3100s_lock);
832
833 /* find out the index for the chip we are removing */
834 for (i = 0; i < MAX_MAX3100; i++)
835 if (max3100s[i] == s) {
836 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
837 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
838 kfree(max3100s[i]);
839 max3100s[i] = NULL;
840 break;
841 }
842
843 WARN_ON(i == MAX_MAX3100);
844
845 /* check if this is the last chip we have */
846 for (i = 0; i < MAX_MAX3100; i++)
847 if (max3100s[i]) {
848 mutex_unlock(&max3100s_lock);
849 return 0;
850 }
851 pr_debug("removing max3100 driver\n");
852 uart_unregister_driver(&max3100_uart_driver);
853 uart_driver_registered = 0;
854
855 mutex_unlock(&max3100s_lock);
856 return 0;
857}
858
859#ifdef CONFIG_PM_SLEEP
860
861static int max3100_suspend(struct device *dev)
862{
863 struct max3100_port *s = dev_get_drvdata(dev);
864
865 dev_dbg(&s->spi->dev, "%s\n", __func__);
866
867 disable_irq(s->irq);
868
869 s->suspending = 1;
870 uart_suspend_port(&max3100_uart_driver, &s->port);
871
872 if (s->max3100_hw_suspend)
873 s->max3100_hw_suspend(1);
874 else {
875 /* no HW suspend, so do SW one */
876 u16 tx, rx;
877
878 tx = MAX3100_WC | MAX3100_SHDN;
879 max3100_sr(s, tx, &rx);
880 }
881 return 0;
882}
883
884static int max3100_resume(struct device *dev)
885{
886 struct max3100_port *s = dev_get_drvdata(dev);
887
888 dev_dbg(&s->spi->dev, "%s\n", __func__);
889
890 if (s->max3100_hw_suspend)
891 s->max3100_hw_suspend(0);
892 uart_resume_port(&max3100_uart_driver, &s->port);
893 s->suspending = 0;
894
895 enable_irq(s->irq);
896
897 s->conf_commit = 1;
898 if (s->workqueue)
899 max3100_dowork(s);
900
901 return 0;
902}
903
904static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
905#define MAX3100_PM_OPS (&max3100_pm_ops)
906
907#else
908#define MAX3100_PM_OPS NULL
909#endif
910
911static struct spi_driver max3100_driver = {
912 .driver = {
913 .name = "max3100",
914 .pm = MAX3100_PM_OPS,
915 },
916 .probe = max3100_probe,
917 .remove = max3100_remove,
918};
919
920module_spi_driver(max3100_driver);
921
922MODULE_DESCRIPTION("MAX3100 driver");
923MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
924MODULE_LICENSE("GPL");
925MODULE_ALIAS("spi:max3100");