b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| 2 | // |
| 3 | // Copyright (c) 2018 BayLibre, SAS. |
| 4 | // Author: Jerome Brunet <jbrunet@baylibre.com> |
| 5 | |
| 6 | #include <linux/clk.h> |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/of_platform.h> |
| 9 | #include <linux/regmap.h> |
| 10 | #include <linux/reset.h> |
| 11 | #include <sound/soc.h> |
| 12 | |
| 13 | #include "axg-tdm-formatter.h" |
| 14 | |
| 15 | struct axg_tdm_formatter { |
| 16 | struct list_head list; |
| 17 | struct axg_tdm_stream *stream; |
| 18 | const struct axg_tdm_formatter_driver *drv; |
| 19 | struct clk *pclk; |
| 20 | struct clk *sclk; |
| 21 | struct clk *lrclk; |
| 22 | struct clk *sclk_sel; |
| 23 | struct clk *lrclk_sel; |
| 24 | struct reset_control *reset; |
| 25 | bool enabled; |
| 26 | struct regmap *map; |
| 27 | }; |
| 28 | |
| 29 | int axg_tdm_formatter_set_channel_masks(struct regmap *map, |
| 30 | struct axg_tdm_stream *ts, |
| 31 | unsigned int offset) |
| 32 | { |
| 33 | unsigned int ch = ts->channels; |
| 34 | u32 val[AXG_TDM_NUM_LANES]; |
| 35 | int i, j, k; |
| 36 | |
| 37 | /* |
| 38 | * We need to mimick the slot distribution used by the HW to keep the |
| 39 | * channel placement consistent regardless of the number of channel |
| 40 | * in the stream. This is why the odd algorithm below is used. |
| 41 | */ |
| 42 | memset(val, 0, sizeof(*val) * AXG_TDM_NUM_LANES); |
| 43 | |
| 44 | /* |
| 45 | * Distribute the channels of the stream over the available slots |
| 46 | * of each TDM lane. We need to go over the 32 slots ... |
| 47 | */ |
| 48 | for (i = 0; (i < 32) && ch; i += 2) { |
| 49 | /* ... of all the lanes ... */ |
| 50 | for (j = 0; j < AXG_TDM_NUM_LANES; j++) { |
| 51 | /* ... then distribute the channels in pairs */ |
| 52 | for (k = 0; k < 2; k++) { |
| 53 | if ((BIT(i + k) & ts->mask[j]) && ch) { |
| 54 | val[j] |= BIT(i + k); |
| 55 | ch -= 1; |
| 56 | } |
| 57 | } |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | /* |
| 62 | * If we still have channel left at the end of the process, it means |
| 63 | * the stream has more channels than we can accommodate and we should |
| 64 | * have caught this earlier. |
| 65 | */ |
| 66 | if (WARN_ON(ch != 0)) { |
| 67 | pr_err("channel mask error\n"); |
| 68 | return -EINVAL; |
| 69 | } |
| 70 | |
| 71 | for (i = 0; i < AXG_TDM_NUM_LANES; i++) { |
| 72 | regmap_write(map, offset, val[i]); |
| 73 | offset += regmap_get_reg_stride(map); |
| 74 | } |
| 75 | |
| 76 | return 0; |
| 77 | } |
| 78 | EXPORT_SYMBOL_GPL(axg_tdm_formatter_set_channel_masks); |
| 79 | |
| 80 | static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter) |
| 81 | { |
| 82 | struct axg_tdm_stream *ts = formatter->stream; |
| 83 | bool invert; |
| 84 | int ret; |
| 85 | |
| 86 | /* Do nothing if the formatter is already enabled */ |
| 87 | if (formatter->enabled) |
| 88 | return 0; |
| 89 | |
| 90 | /* |
| 91 | * On the g12a (and possibly other SoCs), when a stream using |
| 92 | * multiple lanes is restarted, it will sometimes not start |
| 93 | * from the first lane, but randomly from another used one. |
| 94 | * The result is an unexpected and random channel shift. |
| 95 | * |
| 96 | * The hypothesis is that an HW counter is not properly reset |
| 97 | * and the formatter simply starts on the lane it stopped |
| 98 | * before. Unfortunately, there does not seems to be a way to |
| 99 | * reset this through the registers of the block. |
| 100 | * |
| 101 | * However, the g12a has indenpendent reset lines for each audio |
| 102 | * devices. Using this reset before each start solves the issue. |
| 103 | */ |
| 104 | ret = reset_control_reset(formatter->reset); |
| 105 | if (ret) |
| 106 | return ret; |
| 107 | |
| 108 | /* |
| 109 | * If sclk is inverted, it means the bit should latched on the |
| 110 | * rising edge which is what our HW expects. If not, we need to |
| 111 | * invert it before the formatter. |
| 112 | */ |
| 113 | invert = axg_tdm_sclk_invert(ts->iface->fmt); |
| 114 | ret = clk_set_phase(formatter->sclk, invert ? 0 : 180); |
| 115 | if (ret) |
| 116 | return ret; |
| 117 | |
| 118 | /* Setup the stream parameter in the formatter */ |
| 119 | ret = formatter->drv->ops->prepare(formatter->map, |
| 120 | formatter->drv->quirks, |
| 121 | formatter->stream); |
| 122 | if (ret) |
| 123 | return ret; |
| 124 | |
| 125 | /* Enable the signal clocks feeding the formatter */ |
| 126 | ret = clk_prepare_enable(formatter->sclk); |
| 127 | if (ret) |
| 128 | return ret; |
| 129 | |
| 130 | ret = clk_prepare_enable(formatter->lrclk); |
| 131 | if (ret) { |
| 132 | clk_disable_unprepare(formatter->sclk); |
| 133 | return ret; |
| 134 | } |
| 135 | |
| 136 | /* Finally, actually enable the formatter */ |
| 137 | formatter->drv->ops->enable(formatter->map); |
| 138 | formatter->enabled = true; |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static void axg_tdm_formatter_disable(struct axg_tdm_formatter *formatter) |
| 144 | { |
| 145 | /* Do nothing if the formatter is already disabled */ |
| 146 | if (!formatter->enabled) |
| 147 | return; |
| 148 | |
| 149 | formatter->drv->ops->disable(formatter->map); |
| 150 | clk_disable_unprepare(formatter->lrclk); |
| 151 | clk_disable_unprepare(formatter->sclk); |
| 152 | formatter->enabled = false; |
| 153 | } |
| 154 | |
| 155 | static int axg_tdm_formatter_attach(struct axg_tdm_formatter *formatter) |
| 156 | { |
| 157 | struct axg_tdm_stream *ts = formatter->stream; |
| 158 | int ret = 0; |
| 159 | |
| 160 | mutex_lock(&ts->lock); |
| 161 | |
| 162 | /* Catch up if the stream is already running when we attach */ |
| 163 | if (ts->ready) { |
| 164 | ret = axg_tdm_formatter_enable(formatter); |
| 165 | if (ret) { |
| 166 | pr_err("failed to enable formatter\n"); |
| 167 | goto out; |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | list_add_tail(&formatter->list, &ts->formatter_list); |
| 172 | out: |
| 173 | mutex_unlock(&ts->lock); |
| 174 | return ret; |
| 175 | } |
| 176 | |
| 177 | static void axg_tdm_formatter_dettach(struct axg_tdm_formatter *formatter) |
| 178 | { |
| 179 | struct axg_tdm_stream *ts = formatter->stream; |
| 180 | |
| 181 | mutex_lock(&ts->lock); |
| 182 | list_del(&formatter->list); |
| 183 | mutex_unlock(&ts->lock); |
| 184 | |
| 185 | axg_tdm_formatter_disable(formatter); |
| 186 | } |
| 187 | |
| 188 | static int axg_tdm_formatter_power_up(struct axg_tdm_formatter *formatter, |
| 189 | struct snd_soc_dapm_widget *w) |
| 190 | { |
| 191 | struct axg_tdm_stream *ts = formatter->drv->ops->get_stream(w); |
| 192 | int ret; |
| 193 | |
| 194 | /* |
| 195 | * If we don't get a stream at this stage, it would mean that the |
| 196 | * widget is powering up but is not attached to any backend DAI. |
| 197 | * It should not happen, ever ! |
| 198 | */ |
| 199 | if (WARN_ON(!ts)) |
| 200 | return -ENODEV; |
| 201 | |
| 202 | /* Clock our device */ |
| 203 | ret = clk_prepare_enable(formatter->pclk); |
| 204 | if (ret) |
| 205 | return ret; |
| 206 | |
| 207 | /* Reparent the bit clock to the TDM interface */ |
| 208 | ret = clk_set_parent(formatter->sclk_sel, ts->iface->sclk); |
| 209 | if (ret) |
| 210 | goto disable_pclk; |
| 211 | |
| 212 | /* Reparent the sample clock to the TDM interface */ |
| 213 | ret = clk_set_parent(formatter->lrclk_sel, ts->iface->lrclk); |
| 214 | if (ret) |
| 215 | goto disable_pclk; |
| 216 | |
| 217 | formatter->stream = ts; |
| 218 | ret = axg_tdm_formatter_attach(formatter); |
| 219 | if (ret) |
| 220 | goto disable_pclk; |
| 221 | |
| 222 | return 0; |
| 223 | |
| 224 | disable_pclk: |
| 225 | clk_disable_unprepare(formatter->pclk); |
| 226 | return ret; |
| 227 | } |
| 228 | |
| 229 | static void axg_tdm_formatter_power_down(struct axg_tdm_formatter *formatter) |
| 230 | { |
| 231 | axg_tdm_formatter_dettach(formatter); |
| 232 | clk_disable_unprepare(formatter->pclk); |
| 233 | formatter->stream = NULL; |
| 234 | } |
| 235 | |
| 236 | int axg_tdm_formatter_event(struct snd_soc_dapm_widget *w, |
| 237 | struct snd_kcontrol *control, |
| 238 | int event) |
| 239 | { |
| 240 | struct snd_soc_component *c = snd_soc_dapm_to_component(w->dapm); |
| 241 | struct axg_tdm_formatter *formatter = snd_soc_component_get_drvdata(c); |
| 242 | int ret = 0; |
| 243 | |
| 244 | switch (event) { |
| 245 | case SND_SOC_DAPM_PRE_PMU: |
| 246 | ret = axg_tdm_formatter_power_up(formatter, w); |
| 247 | break; |
| 248 | |
| 249 | case SND_SOC_DAPM_PRE_PMD: |
| 250 | axg_tdm_formatter_power_down(formatter); |
| 251 | break; |
| 252 | |
| 253 | default: |
| 254 | dev_err(c->dev, "Unexpected event %d\n", event); |
| 255 | return -EINVAL; |
| 256 | } |
| 257 | |
| 258 | return ret; |
| 259 | } |
| 260 | EXPORT_SYMBOL_GPL(axg_tdm_formatter_event); |
| 261 | |
| 262 | int axg_tdm_formatter_probe(struct platform_device *pdev) |
| 263 | { |
| 264 | struct device *dev = &pdev->dev; |
| 265 | const struct axg_tdm_formatter_driver *drv; |
| 266 | struct axg_tdm_formatter *formatter; |
| 267 | void __iomem *regs; |
| 268 | int ret; |
| 269 | |
| 270 | drv = of_device_get_match_data(dev); |
| 271 | if (!drv) { |
| 272 | dev_err(dev, "failed to match device\n"); |
| 273 | return -ENODEV; |
| 274 | } |
| 275 | |
| 276 | formatter = devm_kzalloc(dev, sizeof(*formatter), GFP_KERNEL); |
| 277 | if (!formatter) |
| 278 | return -ENOMEM; |
| 279 | platform_set_drvdata(pdev, formatter); |
| 280 | formatter->drv = drv; |
| 281 | |
| 282 | regs = devm_platform_ioremap_resource(pdev, 0); |
| 283 | if (IS_ERR(regs)) |
| 284 | return PTR_ERR(regs); |
| 285 | |
| 286 | formatter->map = devm_regmap_init_mmio(dev, regs, drv->regmap_cfg); |
| 287 | if (IS_ERR(formatter->map)) { |
| 288 | dev_err(dev, "failed to init regmap: %ld\n", |
| 289 | PTR_ERR(formatter->map)); |
| 290 | return PTR_ERR(formatter->map); |
| 291 | } |
| 292 | |
| 293 | /* Peripharal clock */ |
| 294 | formatter->pclk = devm_clk_get(dev, "pclk"); |
| 295 | if (IS_ERR(formatter->pclk)) { |
| 296 | ret = PTR_ERR(formatter->pclk); |
| 297 | if (ret != -EPROBE_DEFER) |
| 298 | dev_err(dev, "failed to get pclk: %d\n", ret); |
| 299 | return ret; |
| 300 | } |
| 301 | |
| 302 | /* Formatter bit clock */ |
| 303 | formatter->sclk = devm_clk_get(dev, "sclk"); |
| 304 | if (IS_ERR(formatter->sclk)) { |
| 305 | ret = PTR_ERR(formatter->sclk); |
| 306 | if (ret != -EPROBE_DEFER) |
| 307 | dev_err(dev, "failed to get sclk: %d\n", ret); |
| 308 | return ret; |
| 309 | } |
| 310 | |
| 311 | /* Formatter sample clock */ |
| 312 | formatter->lrclk = devm_clk_get(dev, "lrclk"); |
| 313 | if (IS_ERR(formatter->lrclk)) { |
| 314 | ret = PTR_ERR(formatter->lrclk); |
| 315 | if (ret != -EPROBE_DEFER) |
| 316 | dev_err(dev, "failed to get lrclk: %d\n", ret); |
| 317 | return ret; |
| 318 | } |
| 319 | |
| 320 | /* Formatter bit clock input multiplexer */ |
| 321 | formatter->sclk_sel = devm_clk_get(dev, "sclk_sel"); |
| 322 | if (IS_ERR(formatter->sclk_sel)) { |
| 323 | ret = PTR_ERR(formatter->sclk_sel); |
| 324 | if (ret != -EPROBE_DEFER) |
| 325 | dev_err(dev, "failed to get sclk_sel: %d\n", ret); |
| 326 | return ret; |
| 327 | } |
| 328 | |
| 329 | /* Formatter sample clock input multiplexer */ |
| 330 | formatter->lrclk_sel = devm_clk_get(dev, "lrclk_sel"); |
| 331 | if (IS_ERR(formatter->lrclk_sel)) { |
| 332 | ret = PTR_ERR(formatter->lrclk_sel); |
| 333 | if (ret != -EPROBE_DEFER) |
| 334 | dev_err(dev, "failed to get lrclk_sel: %d\n", ret); |
| 335 | return ret; |
| 336 | } |
| 337 | |
| 338 | /* Formatter dedicated reset line */ |
| 339 | formatter->reset = devm_reset_control_get_optional_exclusive(dev, NULL); |
| 340 | if (IS_ERR(formatter->reset)) { |
| 341 | ret = PTR_ERR(formatter->reset); |
| 342 | if (ret != -EPROBE_DEFER) |
| 343 | dev_err(dev, "failed to get reset: %d\n", ret); |
| 344 | return ret; |
| 345 | } |
| 346 | |
| 347 | return devm_snd_soc_register_component(dev, drv->component_drv, |
| 348 | NULL, 0); |
| 349 | } |
| 350 | EXPORT_SYMBOL_GPL(axg_tdm_formatter_probe); |
| 351 | |
| 352 | int axg_tdm_stream_start(struct axg_tdm_stream *ts) |
| 353 | { |
| 354 | struct axg_tdm_formatter *formatter; |
| 355 | int ret = 0; |
| 356 | |
| 357 | mutex_lock(&ts->lock); |
| 358 | ts->ready = true; |
| 359 | |
| 360 | /* Start all the formatters attached to the stream */ |
| 361 | list_for_each_entry(formatter, &ts->formatter_list, list) { |
| 362 | ret = axg_tdm_formatter_enable(formatter); |
| 363 | if (ret) { |
| 364 | pr_err("failed to start tdm stream\n"); |
| 365 | goto out; |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | out: |
| 370 | mutex_unlock(&ts->lock); |
| 371 | return ret; |
| 372 | } |
| 373 | EXPORT_SYMBOL_GPL(axg_tdm_stream_start); |
| 374 | |
| 375 | void axg_tdm_stream_stop(struct axg_tdm_stream *ts) |
| 376 | { |
| 377 | struct axg_tdm_formatter *formatter; |
| 378 | |
| 379 | mutex_lock(&ts->lock); |
| 380 | ts->ready = false; |
| 381 | |
| 382 | /* Stop all the formatters attached to the stream */ |
| 383 | list_for_each_entry(formatter, &ts->formatter_list, list) { |
| 384 | axg_tdm_formatter_disable(formatter); |
| 385 | } |
| 386 | |
| 387 | mutex_unlock(&ts->lock); |
| 388 | } |
| 389 | EXPORT_SYMBOL_GPL(axg_tdm_stream_stop); |
| 390 | |
| 391 | struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface) |
| 392 | { |
| 393 | struct axg_tdm_stream *ts; |
| 394 | |
| 395 | ts = kzalloc(sizeof(*ts), GFP_KERNEL); |
| 396 | if (ts) { |
| 397 | INIT_LIST_HEAD(&ts->formatter_list); |
| 398 | mutex_init(&ts->lock); |
| 399 | ts->iface = iface; |
| 400 | } |
| 401 | |
| 402 | return ts; |
| 403 | } |
| 404 | EXPORT_SYMBOL_GPL(axg_tdm_stream_alloc); |
| 405 | |
| 406 | void axg_tdm_stream_free(struct axg_tdm_stream *ts) |
| 407 | { |
| 408 | /* |
| 409 | * If the list is not empty, it would mean that one of the formatter |
| 410 | * widget is still powered and attached to the interface while we |
| 411 | * we are removing the TDM DAI. It should not be possible |
| 412 | */ |
| 413 | WARN_ON(!list_empty(&ts->formatter_list)); |
| 414 | mutex_destroy(&ts->lock); |
| 415 | kfree(ts); |
| 416 | } |
| 417 | EXPORT_SYMBOL_GPL(axg_tdm_stream_free); |
| 418 | |
| 419 | MODULE_DESCRIPTION("Amlogic AXG TDM formatter driver"); |
| 420 | MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>"); |
| 421 | MODULE_LICENSE("GPL v2"); |