| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. |
| 4 | * |
| 5 | * lpass.h - Definitions for the QTi LPASS |
| 6 | */ |
| 7 | |
| 8 | #ifndef __LPASS_H__ |
| 9 | #define __LPASS_H__ |
| 10 | |
| 11 | #include <linux/clk.h> |
| 12 | #include <linux/compiler.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/regmap.h> |
| 15 | |
| 16 | #define LPASS_AHBIX_CLOCK_FREQUENCY 131072000 |
| 17 | #define LPASS_MAX_MI2S_PORTS (8) |
| 18 | #define LPASS_MAX_DMA_CHANNELS (8) |
| 19 | |
| 20 | /* Both the CPU DAI and platform drivers will access this data */ |
| 21 | struct lpass_data { |
| 22 | |
| 23 | /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */ |
| 24 | struct clk *ahbix_clk; |
| 25 | |
| 26 | /* MI2S system clock */ |
| 27 | struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS]; |
| 28 | |
| 29 | /* MI2S bit clock (derived from system clock by a divider */ |
| 30 | struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS]; |
| 31 | |
| 32 | /* low-power audio interface (LPAIF) registers */ |
| 33 | void __iomem *lpaif; |
| 34 | |
| 35 | /* regmap backed by the low-power audio interface (LPAIF) registers */ |
| 36 | struct regmap *lpaif_map; |
| 37 | |
| 38 | /* interrupts from the low-power audio interface (LPAIF) */ |
| 39 | int lpaif_irq; |
| 40 | |
| 41 | /* SOC specific variations in the LPASS IP integration */ |
| 42 | struct lpass_variant *variant; |
| 43 | |
| 44 | /* bit map to keep track of static channel allocations */ |
| 45 | unsigned long dma_ch_bit_map; |
| 46 | |
| 47 | /* used it for handling interrupt per dma channel */ |
| 48 | struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; |
| 49 | |
| 50 | /* 8016 specific */ |
| 51 | struct clk *pcnoc_mport_clk; |
| 52 | struct clk *pcnoc_sway_clk; |
| 53 | |
| 54 | }; |
| 55 | |
| 56 | /* Vairant data per each SOC */ |
| 57 | struct lpass_variant { |
| 58 | u32 i2sctrl_reg_base; |
| 59 | u32 i2sctrl_reg_stride; |
| 60 | u32 i2s_ports; |
| 61 | u32 irq_reg_base; |
| 62 | u32 irq_reg_stride; |
| 63 | u32 irq_ports; |
| 64 | u32 rdma_reg_base; |
| 65 | u32 rdma_reg_stride; |
| 66 | u32 rdma_channels; |
| 67 | u32 wrdma_reg_base; |
| 68 | u32 wrdma_reg_stride; |
| 69 | u32 wrdma_channels; |
| 70 | |
| 71 | /** |
| 72 | * on SOCs like APQ8016 the channel control bits start |
| 73 | * at different offset to ipq806x |
| 74 | **/ |
| 75 | u32 dmactl_audif_start; |
| 76 | u32 wrdma_channel_start; |
| 77 | /* SOC specific initialization like clocks */ |
| 78 | int (*init)(struct platform_device *pdev); |
| 79 | int (*exit)(struct platform_device *pdev); |
| 80 | int (*alloc_dma_channel)(struct lpass_data *data, int direction); |
| 81 | int (*free_dma_channel)(struct lpass_data *data, int ch); |
| 82 | |
| 83 | /* SOC specific dais */ |
| 84 | struct snd_soc_dai_driver *dai_driver; |
| 85 | int num_dai; |
| 86 | const char * const *dai_osr_clk_names; |
| 87 | const char * const *dai_bit_clk_names; |
| 88 | }; |
| 89 | |
| 90 | /* register the platform driver from the CPU DAI driver */ |
| 91 | int asoc_qcom_lpass_platform_register(struct platform_device *); |
| 92 | int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev); |
| 93 | int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev); |
| 94 | int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai); |
| 95 | extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops; |
| 96 | |
| 97 | #endif /* __LPASS_H__ */ |