| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From d0e68d354f345873e15876a7b35be1baaf5e3ec9 Mon Sep 17 00:00:00 2001 | 
 | 2 | From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> | 
 | 3 | Date: Fri, 5 Nov 2021 11:14:13 +0100 | 
 | 4 | Subject: [PATCH] arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500 | 
 | 5 | MIME-Version: 1.0 | 
 | 6 | Content-Type: text/plain; charset=UTF-8 | 
 | 7 | Content-Transfer-Encoding: 8bit | 
 | 8 |  | 
 | 9 | It's a home router based on BCM4908 SoC. It has: 1 GiB of RAM, 512 MiB | 
 | 10 | NAND flash, 6 Ethernet ports and 3 x BCM43684 (WiFi). One of Ethernet | 
 | 11 | ports is "2.5 G Multi-Gig port" that isn't described yet (it isn't known | 
 | 12 | how it's wired up). | 
 | 13 |  | 
 | 14 | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> | 
 | 15 | Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> | 
 | 16 | --- | 
 | 17 |  arch/arm64/boot/dts/broadcom/bcm4908/Makefile |  1 + | 
 | 18 |  .../bcm4908/bcm4908-netgear-raxe500.dts       | 50 +++++++++++++++++++ | 
 | 19 |  2 files changed, 51 insertions(+) | 
 | 20 |  create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts | 
 | 21 |  | 
 | 22 | --- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 
 | 23 | +++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 
 | 24 | @@ -2,3 +2,4 @@ | 
 | 25 |  dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb | 
 | 26 |  dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb | 
 | 27 |  dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb | 
 | 28 | +dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb | 
 | 29 | --- /dev/null | 
 | 30 | +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts | 
 | 31 | @@ -0,0 +1,50 @@ | 
 | 32 | +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | 
 | 33 | + | 
 | 34 | +#include "bcm4908.dtsi" | 
 | 35 | + | 
 | 36 | +/ { | 
 | 37 | +	compatible = "netgear,raxe500", "brcm,bcm4908"; | 
 | 38 | +	model = "Netgear RAXE500"; | 
 | 39 | + | 
 | 40 | +	memory@0 { | 
 | 41 | +		device_type = "memory"; | 
 | 42 | +		reg = <0x00 0x00 0x00 0x40000000>; | 
 | 43 | +	}; | 
 | 44 | +}; | 
 | 45 | + | 
 | 46 | +&ehci { | 
 | 47 | +	status = "okay"; | 
 | 48 | +}; | 
 | 49 | + | 
 | 50 | +&ohci { | 
 | 51 | +	status = "okay"; | 
 | 52 | +}; | 
 | 53 | + | 
 | 54 | +&xhci { | 
 | 55 | +	status = "okay"; | 
 | 56 | +}; | 
 | 57 | + | 
 | 58 | +&ports { | 
 | 59 | +	port@0 { | 
 | 60 | +		label = "lan4"; | 
 | 61 | +	}; | 
 | 62 | + | 
 | 63 | +	port@1 { | 
 | 64 | +		label = "lan3"; | 
 | 65 | +	}; | 
 | 66 | + | 
 | 67 | +	port@2 { | 
 | 68 | +		label = "lan2"; | 
 | 69 | +	}; | 
 | 70 | + | 
 | 71 | +	port@3 { | 
 | 72 | +		label = "lan1"; | 
 | 73 | +	}; | 
 | 74 | + | 
 | 75 | +	port@7 { | 
 | 76 | +		reg = <7>; | 
 | 77 | +		phy-mode = "internal"; | 
 | 78 | +		phy-handle = <&phy12>; | 
 | 79 | +		label = "wan"; | 
 | 80 | +	}; | 
 | 81 | +}; |