b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From e567e58d6819adc002c57b81e16b88da24d3b4aa Mon Sep 17 00:00:00 2001 |
| 2 | From: Pierre Gondois <pierre.gondois@arm.com> |
| 3 | Date: Tue, 22 Nov 2022 17:32:07 +0100 |
| 4 | Subject: [PATCH] arm64: dts: Update cache properties for broadcom |
| 5 | |
| 6 | The DeviceTree Specification v0.3 specifies that the cache node |
| 7 | 'compatible' and 'cache-level' properties are 'required'. Cf. |
| 8 | s3.8 Multi-level and Shared Cache Nodes |
| 9 | The 'cache-unified' property should be present if one of the |
| 10 | properties for unified cache is present ('cache-size', ...). |
| 11 | |
| 12 | Update the Device Trees accordingly. |
| 13 | |
| 14 | Acked-by: William Zhang <william.zhang@broadcom.com> |
| 15 | Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> |
| 16 | Link: https://lore.kernel.org/r/20221122163208.3810985-3-pierre.gondois@arm.com |
| 17 | Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
| 18 | --- |
| 19 | arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 + |
| 20 | arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 + |
| 21 | arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 + |
| 22 | arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 + |
| 23 | arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 + |
| 24 | arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 + |
| 25 | arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 + |
| 26 | arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 + |
| 27 | arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++ |
| 28 | 9 files changed, 12 insertions(+) |
| 29 | |
| 30 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi |
| 31 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi |
| 32 | @@ -63,6 +63,7 @@ |
| 33 | |
| 34 | l2: l2-cache0 { |
| 35 | compatible = "cache"; |
| 36 | + cache-level = <2>; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi |
| 41 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi |
| 42 | @@ -51,6 +51,7 @@ |
| 43 | |
| 44 | L2_0: l2-cache0 { |
| 45 | compatible = "cache"; |
| 46 | + cache-level = <2>; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi |
| 51 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi |
| 52 | @@ -35,6 +35,7 @@ |
| 53 | |
| 54 | L2_0: l2-cache0 { |
| 55 | compatible = "cache"; |
| 56 | + cache-level = <2>; |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi |
| 61 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi |
| 62 | @@ -51,6 +51,7 @@ |
| 63 | |
| 64 | L2_0: l2-cache0 { |
| 65 | compatible = "cache"; |
| 66 | + cache-level = <2>; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi |
| 71 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi |
| 72 | @@ -51,6 +51,7 @@ |
| 73 | |
| 74 | L2_0: l2-cache0 { |
| 75 | compatible = "cache"; |
| 76 | + cache-level = <2>; |
| 77 | }; |
| 78 | }; |
| 79 | |
| 80 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi |
| 81 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi |
| 82 | @@ -35,6 +35,7 @@ |
| 83 | |
| 84 | L2_0: l2-cache0 { |
| 85 | compatible = "cache"; |
| 86 | + cache-level = <2>; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi |
| 91 | +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi |
| 92 | @@ -50,6 +50,7 @@ |
| 93 | }; |
| 94 | L2_0: l2-cache0 { |
| 95 | compatible = "cache"; |
| 96 | + cache-level = <2>; |
| 97 | }; |
| 98 | }; |
| 99 | |
| 100 | --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi |
| 101 | +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi |
| 102 | @@ -79,6 +79,7 @@ |
| 103 | |
| 104 | CLUSTER0_L2: l2-cache@0 { |
| 105 | compatible = "cache"; |
| 106 | + cache-level = <2>; |
| 107 | }; |
| 108 | }; |
| 109 | |
| 110 | --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi |
| 111 | +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi |
| 112 | @@ -108,18 +108,22 @@ |
| 113 | |
| 114 | CLUSTER0_L2: l2-cache@0 { |
| 115 | compatible = "cache"; |
| 116 | + cache-level = <2>; |
| 117 | }; |
| 118 | |
| 119 | CLUSTER1_L2: l2-cache@100 { |
| 120 | compatible = "cache"; |
| 121 | + cache-level = <2>; |
| 122 | }; |
| 123 | |
| 124 | CLUSTER2_L2: l2-cache@200 { |
| 125 | compatible = "cache"; |
| 126 | + cache-level = <2>; |
| 127 | }; |
| 128 | |
| 129 | CLUSTER3_L2: l2-cache@300 { |
| 130 | compatible = "cache"; |
| 131 | + cache-level = <2>; |
| 132 | }; |
| 133 | }; |
| 134 | |