| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 2038e0416518b30bb40857fbafa3733a6bae93ca Mon Sep 17 00:00:00 2001 |
| 2 | From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com> |
| 3 | Date: Tue, 26 May 2020 13:03:24 +0200 |
| 4 | Subject: [PATCH] MIPS: BCM63xx: fix 6328 boot selection bit |
| 5 | MIME-Version: 1.0 |
| 6 | Content-Type: text/plain; charset=UTF-8 |
| 7 | Content-Transfer-Encoding: 8bit |
| 8 | |
| 9 | MISC_STRAP_BUS_BOOT_SEL_SHIFT is 18 according to Broadcom's GPL source code. |
| 10 | |
| 11 | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> |
| 12 | Acked-by: Florian Fainelli <f.fainelli@gmail.com> |
| 13 | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| 14 | --- |
| 15 | arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 4 ++-- |
| 16 | 1 file changed, 2 insertions(+), 2 deletions(-) |
| 17 | |
| 18 | --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
| 19 | +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |
| 20 | @@ -1367,8 +1367,8 @@ |
| 21 | #define MISC_STRAPBUS_6328_REG 0x240 |
| 22 | #define STRAPBUS_6328_FCVO_SHIFT 7 |
| 23 | #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) |
| 24 | -#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28) |
| 25 | -#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 28) |
| 26 | +#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 18) |
| 27 | +#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 18) |
| 28 | |
| 29 | /************************************************************************* |
| 30 | * _REG relative to RSET_PCIE |