| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001 | 
|  | 2 | From: Jonas Gorski <jonas.gorski@gmail.com> | 
|  | 3 | Date: Wed, 27 Jul 2016 11:36:00 +0200 | 
|  | 4 | Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding | 
|  | 5 | documentation | 
|  | 6 |  | 
|  | 7 | Add binding documentation for the pincontrol core found in BCM6358 SoCs. | 
|  | 8 |  | 
|  | 9 | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> | 
|  | 10 | --- | 
|  | 11 | .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt      | 44 ++++++++++++++++++++++ | 
|  | 12 | 1 file changed, 44 insertions(+) | 
|  | 13 | create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 
|  | 14 |  | 
|  | 15 | --- /dev/null | 
|  | 16 | +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 
|  | 17 | @@ -0,0 +1,44 @@ | 
|  | 18 | +* Broadcom BCM6358 pin controller | 
|  | 19 | + | 
|  | 20 | +Required properties: | 
|  | 21 | +- compatible: Must be "brcm,bcm6358-pinctrl". | 
|  | 22 | +- reg: Register specifiers of dirout, dat registers. | 
|  | 23 | +- reg-names: Must be "dirout", "dat". | 
|  | 24 | +- brcm,gpiomode: Phandle to the shared gpiomode register. | 
|  | 25 | +- gpio-controller: Identifies this node as a gpio-controller. | 
|  | 26 | +- #gpio-cells: Must be <2>. | 
|  | 27 | + | 
|  | 28 | +Example: | 
|  | 29 | + | 
|  | 30 | +pinctrl: pin-controller@fffe0080 { | 
|  | 31 | +	compatible = "brcm,bcm6358-pinctrl"; | 
|  | 32 | +	reg = <0xfffe0080 0x8>, | 
|  | 33 | +	      <0xfffe0088 0x8>, | 
|  | 34 | +	      <0xfffe0098 0x4>; | 
|  | 35 | +	reg-names = "dirout", "dat"; | 
|  | 36 | +	brcm,gpiomode = <&gpiomode>; | 
|  | 37 | + | 
|  | 38 | +	gpio-controller; | 
|  | 39 | +	#gpio-cells = <2>; | 
|  | 40 | +}; | 
|  | 41 | + | 
|  | 42 | +gpiomode: syscon@fffe0098 { | 
|  | 43 | +	compatible = "brcm,bcm6358-gpiomode", "syscon"; | 
|  | 44 | +	reg = <0xfffe0098 0x4>; | 
|  | 45 | +	native-endian; | 
|  | 46 | +}; | 
|  | 47 | + | 
|  | 48 | +Available pins/groups and functions: | 
|  | 49 | + | 
|  | 50 | +name		pins		functions | 
|  | 51 | +----------------------------------------------------------- | 
|  | 52 | +ebi_cs_grp	30-31		ebi_cs | 
|  | 53 | +uart1_grp	28-31		uart1 | 
|  | 54 | +spi_cs_grp	32-33		spi_cs | 
|  | 55 | +async_modem_grp	12-15		async_modem | 
|  | 56 | +legacy_led_grp	9-15		legacy_led | 
|  | 57 | +serial_led_grp	6-7		serial_led | 
|  | 58 | +led_grp		0-3		led | 
|  | 59 | +utopia_grp	12-15, 22-31	utopia | 
|  | 60 | +pwm_syn_clk_grp	8		pwm_syn_clk | 
|  | 61 | +sys_irq_grp	5		sys_irq |