blob: 332b2394e1246bf95122cf2ce0961e2b5e94f03d [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
2+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
3@@ -2,6 +2,7 @@
4 #define _PCI_ATH9K_FIXUP
5
6
7-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
8+void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
9+ unsigned endian_check) __init;
10
11 #endif /* _PCI_ATH9K_FIXUP */
12--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
13+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
14@@ -20,6 +20,7 @@
15 struct ath9k_caldata {
16 unsigned int slot;
17 u32 caldata_offset;
18+ unsigned int endian_check:1;
19 };
20
21 /*
22--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
23+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
24@@ -183,12 +183,14 @@ static void ath9k_pci_fixup(struct pci_d
25 }
26 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
27
28-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
29+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
30+ unsigned endian_check)
31 {
32 if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
33 return;
34
35 ath9k_fixups[ath9k_num_fixups].slot = slot;
36+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
37
38 if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
39 return;
40--- a/arch/mips/bcm63xx/boards/board_common.c
41+++ b/arch/mips/bcm63xx/boards/board_common.c
42@@ -245,7 +245,8 @@ int __init board_register_devices(void)
43
44 /* register any fixups */
45 for (i = 0; i < board.has_caldata; i++)
46- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
47+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
48+ board.caldata[i].endian_check);
49
50 return 0;
51 }