blob: b5979ff248fcf46430b4e8ec037c8dce52c95e96 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001--- a/arch/mips/bcm63xx/clk.c
2+++ b/arch/mips/bcm63xx/clk.c
3@@ -430,6 +430,23 @@ static struct clk clk_pcie = {
4 };
5
6 /*
7+ * NAND clock
8+ */
9+static void nand_set(struct clk *clk, int enable)
10+{
11+ if (BCMCPU_IS_6362())
12+ bcm_hwclock_set(CKCTL_6362_NAND_EN, enable);
13+ else if (BCMCPU_IS_6368())
14+ bcm_hwclock_set(CKCTL_6368_NAND_EN, enable);
15+ else if (BCMCPU_IS_63268())
16+ bcm_hwclock_set(CKCTL_63268_NAND_EN, enable);
17+}
18+
19+static struct clk clk_nand = {
20+ .set = nand_set,
21+};
22+
23+/*
24 * Internal peripheral clock
25 */
26 static struct clk clk_periph = {
27@@ -626,6 +643,7 @@ static struct clk_lookup bcm6362_clks[]
28 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
29 CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
30 /* gated clocks */
31+ CLKDEV_INIT(NULL, "nand", &clk_nand),
32 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
33 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
34 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
35@@ -643,6 +661,7 @@ static struct clk_lookup bcm6368_clks[]
36 CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
37 CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
38 /* gated clocks */
39+ CLKDEV_INIT(NULL, "nand", &clk_nand),
40 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
41 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
42 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
43@@ -661,6 +680,7 @@ static struct clk_lookup bcm63268_clks[]
44 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
45 CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
46 /* gated clocks */
47+ CLKDEV_INIT(NULL, "nand", &clk_nand),
48 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
49 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
50 CLKDEV_INIT(NULL, "usbd", &clk_usbd),