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192.168.1.100 / T108 / c2023d5d03be91dbb983606f0ec5e9e4ea36c8c2 / . / target / linux / generic / backport-5.4 / 709-v5.8-0003-net-dsa-b53-Provide-number-of-ARL-buckets.patch
blob: 3c278d4a54efd83bec4edfb50121badabc082e26 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame]1From e3da4038f4ca1094596a7604c6edac4a6a4f6ee9 Mon Sep 17 00:00:00 2001
2From: Florian Fainelli <f.fainelli@gmail.com>
3Date: Thu, 30 Apr 2020 11:49:09 -0700
4Subject: [PATCH] net: dsa: b53: Provide number of ARL buckets
5
6In preparation for doing proper upper bound checking of FDB/MDB entries
7being added to the ARL, provide the number of ARL buckets for each
8switch chip we support. All chips have 1024 buckets, except 7278 which
9has only 256.
10
11Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
12Reviewed-by: Andrew Lunn <andrew@lunn.ch>
13Signed-off-by: David S. Miller <davem@davemloft.net>
14---
15 drivers/net/dsa/b53/b53_common.c | 21 +++++++++++++++++++++
16 drivers/net/dsa/b53/b53_priv.h | 1 +
17 2 files changed, 22 insertions(+)
18
19--- a/drivers/net/dsa/b53/b53_common.c
20+++ b/drivers/net/dsa/b53/b53_common.c
21@@ -2180,6 +2180,7 @@ struct b53_chip_data {
22 u8 cpu_port;
23 u8 vta_regs[3];
24 u8 arl_bins;
25+ u16 arl_buckets;
26 u8 duplex_reg;
27 u8 jumbo_pm_reg;
28 u8 jumbo_size_reg;
29@@ -2199,6 +2200,7 @@ static const struct b53_chip_data b53_sw
30 .vlans = 16,
31 .enabled_ports = 0x1f,
32 .arl_bins = 2,
33+ .arl_buckets = 1024,
34 .cpu_port = B53_CPU_PORT_25,
35 .duplex_reg = B53_DUPLEX_STAT_FE,
36 },
37@@ -2208,6 +2210,7 @@ static const struct b53_chip_data b53_sw
38 .vlans = 256,
39 .enabled_ports = 0x1f,
40 .arl_bins = 2,
41+ .arl_buckets = 1024,
42 .cpu_port = B53_CPU_PORT_25,
43 .duplex_reg = B53_DUPLEX_STAT_FE,
44 },
45@@ -2217,6 +2220,7 @@ static const struct b53_chip_data b53_sw
46 .vlans = 4096,
47 .enabled_ports = 0x1f,
48 .arl_bins = 4,
49+ .arl_buckets = 1024,
50 .cpu_port = B53_CPU_PORT,
51 .vta_regs = B53_VTA_REGS,
52 .duplex_reg = B53_DUPLEX_STAT_GE,
53@@ -2229,6 +2233,7 @@ static const struct b53_chip_data b53_sw
54 .vlans = 4096,
55 .enabled_ports = 0x1f,
56 .arl_bins = 4,
57+ .arl_buckets = 1024,
58 .cpu_port = B53_CPU_PORT,
59 .vta_regs = B53_VTA_REGS,
60 .duplex_reg = B53_DUPLEX_STAT_GE,
61@@ -2241,6 +2246,7 @@ static const struct b53_chip_data b53_sw
62 .vlans = 4096,
63 .enabled_ports = 0x1f,
64 .arl_bins = 4,
65+ .arl_buckets = 1024,
66 .cpu_port = B53_CPU_PORT,
67 .vta_regs = B53_VTA_REGS_9798,
68 .duplex_reg = B53_DUPLEX_STAT_GE,
69@@ -2253,6 +2259,7 @@ static const struct b53_chip_data b53_sw
70 .vlans = 4096,
71 .enabled_ports = 0x7f,
72 .arl_bins = 4,
73+ .arl_buckets = 1024,
74 .cpu_port = B53_CPU_PORT,
75 .vta_regs = B53_VTA_REGS_9798,
76 .duplex_reg = B53_DUPLEX_STAT_GE,
77@@ -2265,6 +2272,7 @@ static const struct b53_chip_data b53_sw
78 .vlans = 4096,
79 .enabled_ports = 0x1f,
80 .arl_bins = 4,
81+ .arl_buckets = 1024,
82 .vta_regs = B53_VTA_REGS,
83 .cpu_port = B53_CPU_PORT,
84 .duplex_reg = B53_DUPLEX_STAT_GE,
85@@ -2277,6 +2285,7 @@ static const struct b53_chip_data b53_sw
86 .vlans = 4096,
87 .enabled_ports = 0xff,
88 .arl_bins = 4,
89+ .arl_buckets = 1024,
90 .cpu_port = B53_CPU_PORT,
91 .vta_regs = B53_VTA_REGS,
92 .duplex_reg = B53_DUPLEX_STAT_GE,
93@@ -2289,6 +2298,7 @@ static const struct b53_chip_data b53_sw
94 .vlans = 4096,
95 .enabled_ports = 0x1ff,
96 .arl_bins = 4,
97+ .arl_buckets = 1024,
98 .cpu_port = B53_CPU_PORT,
99 .vta_regs = B53_VTA_REGS,
100 .duplex_reg = B53_DUPLEX_STAT_GE,
101@@ -2301,6 +2311,7 @@ static const struct b53_chip_data b53_sw
102 .vlans = 4096,
103 .enabled_ports = 0, /* pdata must provide them */
104 .arl_bins = 4,
105+ .arl_buckets = 1024,
106 .cpu_port = B53_CPU_PORT,
107 .vta_regs = B53_VTA_REGS_63XX,
108 .duplex_reg = B53_DUPLEX_STAT_63XX,
109@@ -2313,6 +2324,7 @@ static const struct b53_chip_data b53_sw
110 .vlans = 4096,
111 .enabled_ports = 0x1f,
112 .arl_bins = 4,
113+ .arl_buckets = 1024,
114 .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
115 .vta_regs = B53_VTA_REGS,
116 .duplex_reg = B53_DUPLEX_STAT_GE,
117@@ -2325,6 +2337,7 @@ static const struct b53_chip_data b53_sw
118 .vlans = 4096,
119 .enabled_ports = 0x1bf,
120 .arl_bins = 4,
121+ .arl_buckets = 1024,
122 .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
123 .vta_regs = B53_VTA_REGS,
124 .duplex_reg = B53_DUPLEX_STAT_GE,
125@@ -2337,6 +2350,7 @@ static const struct b53_chip_data b53_sw
126 .vlans = 4096,
127 .enabled_ports = 0x1bf,
128 .arl_bins = 4,
129+ .arl_buckets = 1024,
130 .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
131 .vta_regs = B53_VTA_REGS,
132 .duplex_reg = B53_DUPLEX_STAT_GE,
133@@ -2349,6 +2363,7 @@ static const struct b53_chip_data b53_sw
134 .vlans = 4096,
135 .enabled_ports = 0x1f,
136 .arl_bins = 4,
137+ .arl_buckets = 1024,
138 .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
139 .vta_regs = B53_VTA_REGS,
140 .duplex_reg = B53_DUPLEX_STAT_GE,
141@@ -2361,6 +2376,7 @@ static const struct b53_chip_data b53_sw
142 .vlans = 4096,
143 .enabled_ports = 0x1f,
144 .arl_bins = 4,
145+ .arl_buckets = 1024,
146 .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
147 .vta_regs = B53_VTA_REGS,
148 .duplex_reg = B53_DUPLEX_STAT_GE,
149@@ -2373,6 +2389,7 @@ static const struct b53_chip_data b53_sw
150 .vlans = 4096,
151 .enabled_ports = 0x1ff,
152 .arl_bins = 4,
153+ .arl_buckets = 1024,
154 .cpu_port = B53_CPU_PORT,
155 .vta_regs = B53_VTA_REGS,
156 .duplex_reg = B53_DUPLEX_STAT_GE,
157@@ -2385,6 +2402,7 @@ static const struct b53_chip_data b53_sw
158 .vlans = 4096,
159 .enabled_ports = 0x103,
160 .arl_bins = 4,
161+ .arl_buckets = 1024,
162 .cpu_port = B53_CPU_PORT,
163 .vta_regs = B53_VTA_REGS,
164 .duplex_reg = B53_DUPLEX_STAT_GE,
165@@ -2397,6 +2415,7 @@ static const struct b53_chip_data b53_sw
166 .vlans = 4096,
167 .enabled_ports = 0x1ff,
168 .arl_bins = 4,
169+ .arl_buckets = 1024,
170 .cpu_port = B53_CPU_PORT,
171 .vta_regs = B53_VTA_REGS,
172 .duplex_reg = B53_DUPLEX_STAT_GE,
173@@ -2409,6 +2428,7 @@ static const struct b53_chip_data b53_sw
174 .vlans = 4096,
175 .enabled_ports = 0x1ff,
176 .arl_bins = 4,
177+ .arl_buckets = 256,
178 .cpu_port = B53_CPU_PORT,
179 .vta_regs = B53_VTA_REGS,
180 .duplex_reg = B53_DUPLEX_STAT_GE,
181@@ -2437,6 +2457,7 @@ static int b53_switch_init(struct b53_de
182 dev->cpu_port = chip->cpu_port;
183 dev->num_vlans = chip->vlans;
184 dev->num_arl_bins = chip->arl_bins;
185+ dev->num_arl_buckets = chip->arl_buckets;
186 break;
187 }
188 }
189--- a/drivers/net/dsa/b53/b53_priv.h
190+++ b/drivers/net/dsa/b53/b53_priv.h
191@@ -118,6 +118,7 @@ struct b53_device {
192 u8 jumbo_size_reg;
193 int reset_gpio;
194 u8 num_arl_bins;
195+ u16 num_arl_buckets;
196 enum dsa_tag_protocol tag_protocol;
197
198 /* used ports mask */