blob: d95e75107bc62b68427a7424694110ea50216c28 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
2From: Christian Lamparter <chunkeey@gmail.com>
3Date: Sun, 20 Nov 2016 02:20:54 +0100
4Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
5
6This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
7nodes which are needed for the ar40xx.c driver to initialize the
8switch.
9
10Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
11---
12 arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
13 1 file changed, 23 insertions(+)
14
15--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
16+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
17@@ -617,6 +617,29 @@
18 };
19 };
20
21+ ess-switch@c000000 {
22+ compatible = "qcom,ess-switch";
23+ reg = <0xc000000 0x80000>;
24+ switch_access_mode = "local bus";
25+ resets = <&gcc ESS_RESET>;
26+ reset-names = "ess_rst";
27+ clocks = <&gcc GCC_ESS_CLK>;
28+ clock-names = "ess_clk";
29+ switch_cpu_bmp = <0x1>;
30+ switch_lan_bmp = <0x1e>;
31+ switch_wan_bmp = <0x20>;
32+ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
33+ switch_initvlas = <0x7c 0x54>;
34+ status = "disabled";
35+ };
36+
37+ ess-psgmii@98000 {
38+ compatible = "qcom,ess-psgmii";
39+ reg = <0x98000 0x800>;
40+ psgmii_access_mode = "local bus";
41+ status = "disabled";
42+ };
43+
44 usb3_ss_phy: ssphy@9a000 {
45 compatible = "qcom,usb-ss-ipq4019-phy";
46 #phy-cells = <0>;