| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 203a34f815c7e9320140bb2259ae5884575f0658 Mon Sep 17 00:00:00 2001 |
| 2 | From: Calvin Johnson <calvin.johnson@nxp.com> |
| 3 | Date: Tue, 20 Nov 2018 21:52:03 +0530 |
| 4 | Subject: [PATCH] arm64: dts: ls1012a: use phy-handle to handle phy params |
| 5 | |
| 6 | Replace properties "fsl,gemac-phy-id" and "fsl,pfe-phy-if-flags" |
| 7 | and use phy-handle instead. |
| 8 | Create mdio node with phy-handles defining PHYs available on the |
| 9 | mdio bus. |
| 10 | |
| 11 | Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> |
| 12 | --- |
| 13 | .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 25 +++++++++++++--------- |
| 14 | arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 23 +++++++++++--------- |
| 15 | arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts | 23 +++++++++++--------- |
| 16 | arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 25 +++++++++++++--------- |
| 17 | arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 22 ++++++++++--------- |
| 18 | 5 files changed, 68 insertions(+), 50 deletions(-) |
| 19 | |
| 20 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts |
| 21 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts |
| 22 | @@ -58,14 +58,9 @@ |
| 23 | #size-cells = <0>; |
| 24 | reg = <0x0>; /* GEM_ID */ |
| 25 | fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 26 | - fsl,gemac-phy-id = <0x1>; /* PHY_ID */ |
| 27 | fsl,mdio-mux-val = <0x0>; |
| 28 | phy-mode = "sgmii-2500"; |
| 29 | - fsl,pfe-phy-if-flags = <0x0>; |
| 30 | - |
| 31 | - mdio@0 { |
| 32 | - reg = <0x1>; /* enabled/disabled */ |
| 33 | - }; |
| 34 | + phy-handle = <&sgmii_phy1>; |
| 35 | }; |
| 36 | |
| 37 | ethernet@1 { |
| 38 | @@ -74,13 +69,23 @@ |
| 39 | #size-cells = <0>; |
| 40 | reg = <0x1>; /* GEM_ID */ |
| 41 | fsl,gemac-bus-id = < 0x0>; /* BUS_ID */ |
| 42 | - fsl,gemac-phy-id = < 0x2>; /* PHY_ID */ |
| 43 | fsl,mdio-mux-val = <0x0>; |
| 44 | phy-mode = "sgmii-2500"; |
| 45 | - fsl,pfe-phy-if-flags = <0x0>; |
| 46 | + phy-handle = <&sgmii_phy2>; |
| 47 | + }; |
| 48 | + |
| 49 | + mdio@0 { |
| 50 | + #address-cells = <1>; |
| 51 | + #size-cells = <0>; |
| 52 | + |
| 53 | + sgmii_phy1: ethernet-phy@1 { |
| 54 | + compatible = "ethernet-phy-ieee802.3-c45"; |
| 55 | + reg = <0x1>; |
| 56 | + }; |
| 57 | |
| 58 | - mdio@0 { |
| 59 | - reg = <0x0>; /* enabled/disabled */ |
| 60 | + sgmii_phy2: ethernet-phy@2 { |
| 61 | + compatible = "ethernet-phy-ieee802.3-c45"; |
| 62 | + reg = <0x2>; |
| 63 | }; |
| 64 | }; |
| 65 | }; |
| 66 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts |
| 67 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts |
| 68 | @@ -90,14 +90,9 @@ |
| 69 | #size-cells = <0>; |
| 70 | reg = <0x0>; /* GEM_ID */ |
| 71 | fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 72 | - fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| 73 | fsl,mdio-mux-val = <0x0>; |
| 74 | phy-mode = "sgmii"; |
| 75 | - fsl,pfe-phy-if-flags = <0x0>; |
| 76 | - |
| 77 | - mdio@0 { |
| 78 | - reg = <0x1>; /* enabled/disabled */ |
| 79 | - }; |
| 80 | + phy-handle = <&sgmii_phy1>; |
| 81 | }; |
| 82 | |
| 83 | ethernet@1 { |
| 84 | @@ -106,13 +101,21 @@ |
| 85 | #size-cells = <0>; |
| 86 | reg = <0x1>; /* GEM_ID */ |
| 87 | fsl,gemac-bus-id = <0x1>; /* BUS_ID */ |
| 88 | - fsl,gemac-phy-id = <0x1>; /* PHY_ID */ |
| 89 | fsl,mdio-mux-val = <0x0>; |
| 90 | phy-mode = "sgmii"; |
| 91 | - fsl,pfe-phy-if-flags = <0x0>; |
| 92 | + phy-handle = <&sgmii_phy2>; |
| 93 | + }; |
| 94 | + |
| 95 | + mdio@0 { |
| 96 | + #address-cells = <1>; |
| 97 | + #size-cells = <0>; |
| 98 | + |
| 99 | + sgmii_phy1: ethernet-phy@2 { |
| 100 | + reg = <0x2>; |
| 101 | + }; |
| 102 | |
| 103 | - mdio@0 { |
| 104 | - reg = <0x0>; /* enabled/disabled */ |
| 105 | + sgmii_phy2: ethernet-phy@1 { |
| 106 | + reg = <0x1>; |
| 107 | }; |
| 108 | }; |
| 109 | }; |
| 110 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts |
| 111 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts |
| 112 | @@ -111,14 +111,9 @@ |
| 113 | #size-cells = <0>; |
| 114 | reg = <0x0>; /* GEM_ID */ |
| 115 | fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 116 | - fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| 117 | fsl,mdio-mux-val = <0x0>; |
| 118 | phy-mode = "sgmii"; |
| 119 | - fsl,pfe-phy-if-flags = <0x0>; |
| 120 | - |
| 121 | - mdio@0 { |
| 122 | - reg = <0x1>; /* enabled/disabled */ |
| 123 | - }; |
| 124 | + phy-handle = <&sgmii_phy1>; |
| 125 | }; |
| 126 | |
| 127 | ethernet@1 { |
| 128 | @@ -127,13 +122,21 @@ |
| 129 | #size-cells = <0>; |
| 130 | reg = <0x1>; /* GEM_ID */ |
| 131 | fsl,gemac-bus-id = <0x1>; /* BUS_ID */ |
| 132 | - fsl,gemac-phy-id = <0x1>; /* PHY_ID */ |
| 133 | fsl,mdio-mux-val = <0x0>; |
| 134 | phy-mode = "sgmii"; |
| 135 | - fsl,pfe-phy-if-flags = <0x0>; |
| 136 | + phy-handle = <&sgmii_phy2>; |
| 137 | + }; |
| 138 | + |
| 139 | + mdio@0 { |
| 140 | + #address-cells = <1>; |
| 141 | + #size-cells = <0>; |
| 142 | + |
| 143 | + sgmii_phy1: ethernet-phy@2 { |
| 144 | + reg = <0x2>; |
| 145 | + }; |
| 146 | |
| 147 | - mdio@0 { |
| 148 | - reg = <0x0>; /* enabled/disabled */ |
| 149 | + sgmii_phy2: ethernet-phy@1 { |
| 150 | + reg = <0x1>; |
| 151 | }; |
| 152 | }; |
| 153 | }; |
| 154 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts |
| 155 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts |
| 156 | @@ -148,14 +148,9 @@ |
| 157 | #size-cells = <0>; |
| 158 | reg = <0x0>; /* GEM_ID */ |
| 159 | fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 160 | - fsl,gemac-phy-id = <0x1>; /* PHY_ID */ |
| 161 | fsl,mdio-mux-val = <0x2>; |
| 162 | phy-mode = "sgmii-2500"; |
| 163 | - fsl,pfe-phy-if-flags = <0x0>; |
| 164 | - |
| 165 | - mdio@0 { |
| 166 | - reg = <0x1>; /* enabled/disabled */ |
| 167 | - }; |
| 168 | + phy-handle = <&sgmii_phy1>; |
| 169 | }; |
| 170 | |
| 171 | ethernet@1 { |
| 172 | @@ -164,13 +159,23 @@ |
| 173 | #size-cells = <0>; |
| 174 | reg = <0x1>; /* GEM_ID */ |
| 175 | fsl,gemac-bus-id = <0x1>; /* BUS_ID */ |
| 176 | - fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| 177 | fsl,mdio-mux-val = <0x3>; |
| 178 | phy-mode = "sgmii-2500"; |
| 179 | - fsl,pfe-phy-if-flags = <0x0>; |
| 180 | + phy-handle = <&sgmii_phy2>; |
| 181 | + }; |
| 182 | + |
| 183 | + mdio@0 { |
| 184 | + #address-cells = <1>; |
| 185 | + #size-cells = <0>; |
| 186 | + |
| 187 | + sgmii_phy1: ethernet-phy@1 { |
| 188 | + compatible = "ethernet-phy-ieee802.3-c45"; |
| 189 | + reg = <0x1>; |
| 190 | + }; |
| 191 | |
| 192 | - mdio@0 { |
| 193 | - reg = <0x0>; /* enabled/disabled */ |
| 194 | + sgmii_phy2: ethernet-phy@2 { |
| 195 | + compatible = "ethernet-phy-ieee802.3-c45"; |
| 196 | + reg = <0x2>; |
| 197 | }; |
| 198 | }; |
| 199 | }; |
| 200 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts |
| 201 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts |
| 202 | @@ -59,14 +59,9 @@ |
| 203 | #size-cells = <0>; |
| 204 | reg = <0x0>; /* GEM_ID */ |
| 205 | fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 206 | - fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| 207 | fsl,mdio-mux-val = <0x0>; |
| 208 | phy-mode = "sgmii"; |
| 209 | - fsl,pfe-phy-if-flags = <0x0>; |
| 210 | - |
| 211 | - mdio@0 { |
| 212 | - reg = <0x1>; /* enabled/disabled */ |
| 213 | - }; |
| 214 | + phy-handle = <&sgmii_phy>; |
| 215 | }; |
| 216 | |
| 217 | ethernet@1 { |
| 218 | @@ -75,13 +70,20 @@ |
| 219 | #size-cells = <0>; |
| 220 | reg = <0x1>; /* GEM_ID */ |
| 221 | fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */ |
| 222 | - fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */ |
| 223 | fsl,mdio-mux-val = <0x0>; |
| 224 | phy-mode = "rgmii-txid"; |
| 225 | - fsl,pfe-phy-if-flags = <0x0>; |
| 226 | + phy-handle = <&rgmii_phy>; |
| 227 | + }; |
| 228 | + mdio@0 { |
| 229 | + #address-cells = <1>; |
| 230 | + #size-cells = <0>; |
| 231 | + |
| 232 | + sgmii_phy: ethernet-phy@2 { |
| 233 | + reg = <0x2>; |
| 234 | + }; |
| 235 | |
| 236 | - mdio@0 { |
| 237 | - reg = <0x0>; /* enabled/disabled */ |
| 238 | + rgmii_phy: ethernet-phy@1 { |
| 239 | + reg = <0x1>; |
| 240 | }; |
| 241 | }; |
| 242 | }; |