| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From c2046901f933b0e1c87c5cbdab4ba27a3b66317e Mon Sep 17 00:00:00 2001 |
| 2 | From: Pankaj Bansal <pankaj.bansal@nxp.com> |
| 3 | Date: Wed, 8 May 2019 17:49:14 +0530 |
| 4 | Subject: [PATCH] arm64: dts: fsl: lx2160a: add flexcan node |
| 5 | |
| 6 | Add flexcan node in LX2160A SOC file as well as in QDS and RDB files. |
| 7 | The device tree bindings used can be referred from |
| 8 | Documentation/devicetree/bindings/net/can/fsl-flexcan.txt |
| 9 | |
| 10 | Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> |
| 11 | --- |
| 12 | arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 10 +++++++++- |
| 13 | arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 18 +++++++++++++++++- |
| 14 | arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++++++++++++++++++ |
| 15 | 3 files changed, 44 insertions(+), 2 deletions(-) |
| 16 | |
| 17 | --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |
| 18 | +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |
| 19 | @@ -2,7 +2,7 @@ |
| 20 | // |
| 21 | // Device Tree file for LX2160AQDS |
| 22 | // |
| 23 | -// Copyright 2018 NXP |
| 24 | +// Copyright 2018-2019 NXP |
| 25 | |
| 26 | /dts-v1/; |
| 27 | |
| 28 | @@ -155,6 +155,14 @@ |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | +&can0 { |
| 33 | + status = "okay"; |
| 34 | +}; |
| 35 | + |
| 36 | +&can1 { |
| 37 | + status = "okay"; |
| 38 | +}; |
| 39 | + |
| 40 | &crypto { |
| 41 | status = "okay"; |
| 42 | }; |
| 43 | --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |
| 44 | +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |
| 45 | @@ -2,7 +2,7 @@ |
| 46 | // |
| 47 | // Device Tree file for LX2160ARDB |
| 48 | // |
| 49 | -// Copyright 2018 NXP |
| 50 | +// Copyright 2018-2019 NXP |
| 51 | |
| 52 | /dts-v1/; |
| 53 | |
| 54 | @@ -31,6 +31,22 @@ |
| 55 | }; |
| 56 | }; |
| 57 | |
| 58 | +&can0 { |
| 59 | + status = "okay"; |
| 60 | + |
| 61 | + can-transceiver { |
| 62 | + max-bitrate = <5000000>; |
| 63 | + }; |
| 64 | +}; |
| 65 | + |
| 66 | +&can1 { |
| 67 | + status = "okay"; |
| 68 | + |
| 69 | + can-transceiver { |
| 70 | + max-bitrate = <5000000>; |
| 71 | + }; |
| 72 | +}; |
| 73 | + |
| 74 | &crypto { |
| 75 | status = "okay"; |
| 76 | }; |
| 77 | --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| 78 | +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi |
| 79 | @@ -753,6 +753,24 @@ |
| 80 | status = "disabled"; |
| 81 | }; |
| 82 | |
| 83 | + can0: can@2180000 { |
| 84 | + compatible = "fsl,lx2160ar1-flexcan"; |
| 85 | + reg = <0x0 0x2180000 0x0 0x10000>; |
| 86 | + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
| 87 | + clocks = <&sysclk>, <&clockgen 4 7>; |
| 88 | + clock-names = "ipg", "per"; |
| 89 | + status = "disabled"; |
| 90 | + }; |
| 91 | + |
| 92 | + can1: can@2190000 { |
| 93 | + compatible = "fsl,lx2160ar1-flexcan"; |
| 94 | + reg = <0x0 0x2190000 0x0 0x10000>; |
| 95 | + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
| 96 | + clocks = <&sysclk>, <&clockgen 4 7>; |
| 97 | + clock-names = "ipg", "per"; |
| 98 | + status = "disabled"; |
| 99 | + }; |
| 100 | + |
| 101 | uart0: serial@21c0000 { |
| 102 | compatible = "arm,sbsa-uart","arm,pl011"; |
| 103 | reg = <0x0 0x21c0000 0x0 0x1000>; |