| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From b94cbaaa2facfdc6aa49d6f323da251f9e91d4ba Mon Sep 17 00:00:00 2001 |
| 2 | From: Xiaowei Bao <xiaowei.bao@nxp.com> |
| 3 | Date: Tue, 14 May 2019 18:17:31 +0800 |
| 4 | Subject: [PATCH] arm64: dts: ls1028a: add flexspi nodes |
| 5 | |
| 6 | Add fspi node property for LS1028A SoC for FlexSPI driver. |
| 7 | Property added for the FlexSPI controller and for the connected |
| 8 | slave device for the LS1028ARDB and LS1028AQDS target. |
| 9 | This is having one SPI-NOR flash device, mt35xu02g connected at |
| 10 | CS0. |
| 11 | |
| 12 | Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> |
| 13 | --- |
| 14 | arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 15 +++++++++++++++ |
| 15 | arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 15 +++++++++++++++ |
| 16 | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 12 ++++++++++++ |
| 17 | 3 files changed, 42 insertions(+) |
| 18 | |
| 19 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |
| 20 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts |
| 21 | @@ -226,6 +226,21 @@ |
| 22 | phy-connection-type = "rgmii-id"; |
| 23 | }; |
| 24 | |
| 25 | +&fspi { |
| 26 | + status = "okay"; |
| 27 | + mt35xu02g: flash@0 { |
| 28 | + compatible = "spansion,m25p80"; |
| 29 | + #address-cells = <1>; |
| 30 | + #size-cells = <1>; |
| 31 | + m25p,fast-read; |
| 32 | + spi-max-frequency = <20000000>; |
| 33 | + reg = <0>; |
| 34 | + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ |
| 35 | + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ |
| 36 | + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ |
| 37 | + }; |
| 38 | +}; |
| 39 | + |
| 40 | &sai1 { |
| 41 | status = "okay"; |
| 42 | }; |
| 43 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |
| 44 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts |
| 45 | @@ -168,6 +168,21 @@ |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | +&fspi { |
| 50 | + status = "okay"; |
| 51 | + mt35xu02g: flash@0 { |
| 52 | + compatible = "spansion,m25p80"; |
| 53 | + #address-cells = <1>; |
| 54 | + #size-cells = <1>; |
| 55 | + m25p,fast-read; |
| 56 | + spi-max-frequency = <20000000>; |
| 57 | + reg = <0>; |
| 58 | + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ |
| 59 | + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ |
| 60 | + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ |
| 61 | + }; |
| 62 | +}; |
| 63 | + |
| 64 | &duart0 { |
| 65 | status = "okay"; |
| 66 | }; |
| 67 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |
| 68 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |
| 69 | @@ -180,6 +180,18 @@ |
| 70 | clocks = <&sysclk>; |
| 71 | }; |
| 72 | |
| 73 | + fspi: spi@20c0000 { |
| 74 | + compatible = "nxp,lx2160a-fspi"; |
| 75 | + #address-cells = <1>; |
| 76 | + #size-cells = <0>; |
| 77 | + reg = <0x0 0x20c0000 0x0 0x10000>, |
| 78 | + <0x0 0x20000000 0x0 0x10000000>; |
| 79 | + reg-names = "FSPI", "FSPI-memory"; |
| 80 | + interrupts = <0 25 0x4>; /* Level high type */ |
| 81 | + clocks = <&clockgen 4 3>, <&clockgen 4 3>; |
| 82 | + clock-names = "fspi_en", "fspi"; |
| 83 | + }; |
| 84 | + |
| 85 | i2c0: i2c@2000000 { |
| 86 | compatible = "fsl,vf610-i2c"; |
| 87 | #address-cells = <1>; |