| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 121cd10d9ec4466b09ac33986c7b4c1f8eff9363 Mon Sep 17 00:00:00 2001 |
| 2 | From: Kuldeep Singh <kuldeep.singh@nxp.com> |
| 3 | Date: Wed, 18 Dec 2019 15:09:41 +0530 |
| 4 | Subject: [PATCH] arm64: dts: ls208xa: Update qspi node properties for |
| 5 | LS2088ARDB |
| 6 | |
| 7 | LS2088ADB has one spansion flash s25fs512s of size 64M. |
| 8 | |
| 9 | Update qspi dts entry for the board using compatibles as "jedec,spi-nor" |
| 10 | to probe flash successfully. Also, align properties with other board dts |
| 11 | properties. |
| 12 | |
| 13 | Since device properties are different, so remove fsl, ls1021a-qspi. |
| 14 | ls1021a-qspi is to be used only for Big-endian verion of QSPI |
| 15 | controller. Use dt-bindings constants in interrupts instead of using |
| 16 | numbers. |
| 17 | |
| 18 | Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> |
| 19 | --- |
| 20 | arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 8 ++++---- |
| 21 | arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 6 +++--- |
| 22 | 2 files changed, 7 insertions(+), 7 deletions(-) |
| 23 | |
| 24 | --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi |
| 25 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi |
| 26 | @@ -110,12 +110,12 @@ |
| 27 | |
| 28 | &qspi { |
| 29 | status = "okay"; |
| 30 | - flash0: s25fs512s@0 { |
| 31 | + |
| 32 | + s25fs512s0: flash@0 { |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <1>; |
| 35 | - compatible = "spansion,m25p80"; |
| 36 | - m25p,fast-read; |
| 37 | - spi-max-frequency = <20000000>; |
| 38 | + compatible = "jedec,spi-nor"; |
| 39 | + spi-max-frequency = <50000000>; |
| 40 | reg = <0>; |
| 41 | }; |
| 42 | }; |
| 43 | --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi |
| 44 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi |
| 45 | @@ -609,16 +609,16 @@ |
| 46 | }; |
| 47 | |
| 48 | qspi: spi@20c0000 { |
| 49 | - status = "disabled"; |
| 50 | - compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi"; |
| 51 | + compatible = "fsl,ls2080a-qspi"; |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <0>; |
| 54 | reg = <0x0 0x20c0000 0x0 0x10000>, |
| 55 | <0x0 0x20000000 0x0 0x10000000>; |
| 56 | reg-names = "QuadSPI", "QuadSPI-memory"; |
| 57 | - interrupts = <0 25 0x4>; /* Level high type */ |
| 58 | + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
| 59 | clocks = <&clockgen 4 3>, <&clockgen 4 3>; |
| 60 | clock-names = "qspi_en", "qspi"; |
| 61 | + status = "disabled"; |
| 62 | }; |
| 63 | |
| 64 | pcie1: pcie@3400000 { |