| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From aa54d82b06962bb620852ed20270f7783be68897 Mon Sep 17 00:00:00 2001 |
| 2 | From: Camelia Groza <camelia.groza@nxp.com> |
| 3 | Date: Fri, 24 Nov 2017 10:29:12 +0200 |
| 4 | Subject: [PATCH] sdk_dpaa: ceetm: add independent CEETM congestion thresholds |
| 5 | |
| 6 | Configure the CEETM egress congestion thresholds independently from the |
| 7 | default Ethernet driver's Work Queues. Allow the user to edit the |
| 8 | thresholds through menuconfig. |
| 9 | |
| 10 | Signed-off-by: Camelia Groza <camelia.groza@nxp.com> |
| 11 | --- |
| 12 | drivers/net/ethernet/freescale/sdk_dpaa/Kconfig | 23 ++++++++++++++++++++++ |
| 13 | .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c | 4 ++-- |
| 14 | 2 files changed, 25 insertions(+), 2 deletions(-) |
| 15 | |
| 16 | --- a/drivers/net/ethernet/freescale/sdk_dpaa/Kconfig |
| 17 | +++ b/drivers/net/ethernet/freescale/sdk_dpaa/Kconfig |
| 18 | @@ -20,6 +20,29 @@ config FSL_DPAA_CEETM |
| 19 | help |
| 20 | Enable QoS offloading support through the CEETM hardware block. |
| 21 | |
| 22 | +config FSL_DPAA_CEETM_CCS_THRESHOLD_1G |
| 23 | + hex "CEETM egress congestion threshold on 1G ports" |
| 24 | + depends on FSL_DPAA_CEETM |
| 25 | + range 0x1000 0x10000000 |
| 26 | + default "0x000a0000" |
| 27 | + help |
| 28 | + The size in bytes of the CEETM egress Class Congestion State threshold on 1G ports. |
| 29 | + The threshold needs to be configured keeping in mind the following factors: |
| 30 | + - A threshold too large will buffer frames for a long time in the TX queues, |
| 31 | + when a small shaping rate is configured. This will cause buffer pool depletion |
| 32 | + or out of memory errors. This in turn will cause frame loss on RX; |
| 33 | + - A threshold too small will cause unnecessary frame loss by entering |
| 34 | + congestion too often. |
| 35 | + |
| 36 | +config FSL_DPAA_CEETM_CCS_THRESHOLD_10G |
| 37 | + hex "CEETM egress congestion threshold on 10G ports" |
| 38 | + depends on FSL_DPAA_CEETM |
| 39 | + range 0x1000 0x20000000 |
| 40 | + default "0x00640000" |
| 41 | + help |
| 42 | + The size in bytes of the CEETM egress Class Congestion State threshold on 10G ports. |
| 43 | + See FSL_DPAA_CEETM_CCS_THRESHOLD_1G for details. |
| 44 | + |
| 45 | config FSL_DPAA_OFFLINE_PORTS |
| 46 | bool "Offline Ports support" |
| 47 | depends on FSL_SDK_DPAA_ETH |
| 48 | --- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c |
| 49 | +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c |
| 50 | @@ -185,9 +185,9 @@ static int ceetm_config_ccg(struct qm_ce |
| 51 | |
| 52 | /* Set the congestion state thresholds according to the link speed */ |
| 53 | if (dpa_priv->mac_dev->if_support & SUPPORTED_10000baseT_Full) |
| 54 | - cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_10G; |
| 55 | + cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_10G; |
| 56 | else |
| 57 | - cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_1G; |
| 58 | + cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_1G; |
| 59 | |
| 60 | qm_cgr_cs_thres_set64(&ccg_params.cs_thres_in, cs_th, 1); |
| 61 | qm_cgr_cs_thres_set64(&ccg_params.cs_thres_out, |