| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 6f23cfed09dc50e532a5d6a535bb992102d03cab Mon Sep 17 00:00:00 2001 |
| 2 | From: Sandor Yu <Sandor.yu@nxp.com> |
| 3 | Date: Wed, 27 Nov 2019 19:08:42 +0800 |
| 4 | Subject: [PATCH] LF-94: drm: hdmi: imx: Add hdmi phy video mode valid function |
| 5 | |
| 6 | Add hdmi phy video mode valid function to filter the video modes. |
| 7 | |
| 8 | Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> |
| 9 | Reviewed-by: Robby Cai <robby.cai@nxp.com> |
| 10 | --- |
| 11 | drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 8 +++++++- |
| 12 | drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c | 23 +++++++++++++++++++++++ |
| 13 | drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c | 2 ++ |
| 14 | drivers/gpu/drm/imx/cdn-mhdp-phy.h | 2 ++ |
| 15 | include/drm/bridge/cdns-mhdp-common.h | 2 ++ |
| 16 | 5 files changed, 36 insertions(+), 1 deletion(-) |
| 17 | |
| 18 | --- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c |
| 19 | +++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c |
| 20 | @@ -352,7 +352,9 @@ static enum drm_mode_status |
| 21 | cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, |
| 22 | const struct drm_display_mode *mode) |
| 23 | { |
| 24 | + struct cdns_mhdp_device *mhdp = bridge->driver_private; |
| 25 | enum drm_mode_status mode_status = MODE_OK; |
| 26 | + int ret; |
| 27 | |
| 28 | /* We don't support double-clocked and Interlaced modes */ |
| 29 | if (mode->flags & DRM_MODE_FLAG_DBLCLK || |
| 30 | @@ -367,6 +369,11 @@ cdns_hdmi_bridge_mode_valid(struct drm_b |
| 31 | if (mode->hdisplay > 3840 || mode->vdisplay > 2160) |
| 32 | return MODE_BAD_HVALUE; |
| 33 | |
| 34 | + mhdp->valid_mode = mode; |
| 35 | + ret = cdns_mhdp_plat_call(mhdp, phy_video_valid); |
| 36 | + if (ret == false) |
| 37 | + return MODE_CLOCK_RANGE; |
| 38 | + |
| 39 | return mode_status; |
| 40 | } |
| 41 | |
| 42 | @@ -375,7 +382,6 @@ static void cdns_hdmi_bridge_mode_set(st |
| 43 | const struct drm_display_mode *mode) |
| 44 | { |
| 45 | struct cdns_mhdp_device *mhdp = bridge->driver_private; |
| 46 | - struct drm_display_info *display_info = &mhdp->connector.base.display_info; |
| 47 | struct video_info *video = &mhdp->video_info; |
| 48 | |
| 49 | video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); |
| 50 | --- a/drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c |
| 51 | +++ b/drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c |
| 52 | @@ -683,6 +683,17 @@ static int hdmi_phy_power_up(struct cdns |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | +bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *mhdp) |
| 57 | +{ |
| 58 | + u32 rate = mhdp->valid_mode->clock; |
| 59 | + int i; |
| 60 | + |
| 61 | + for (i = 0; i < ARRAY_SIZE(imx8mq_ctrl_table); i++) |
| 62 | + if(rate == imx8mq_ctrl_table[i].pixel_clk_freq_min) |
| 63 | + return true; |
| 64 | + return false; |
| 65 | +} |
| 66 | + |
| 67 | int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *mhdp) |
| 68 | { |
| 69 | struct drm_display_mode *mode = &mhdp->mode; |
| 70 | @@ -711,6 +722,18 @@ int cdns_hdmi_phy_set_imx8mq(struct cdns |
| 71 | return true; |
| 72 | } |
| 73 | |
| 74 | +bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *mhdp) |
| 75 | +{ |
| 76 | + u32 rate = mhdp->valid_mode->clock; |
| 77 | + int i; |
| 78 | + |
| 79 | + for (i = 0; i < ARRAY_SIZE(imx8qm_ctrl_table); i++) |
| 80 | + if(rate >= imx8qm_ctrl_table[i].pixel_clk_freq_min && |
| 81 | + rate <= imx8qm_ctrl_table[i].pixel_clk_freq_max) |
| 82 | + return true; |
| 83 | + return false; |
| 84 | +} |
| 85 | + |
| 86 | int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) |
| 87 | { |
| 88 | struct drm_display_mode *mode = &mhdp->mode; |
| 89 | --- a/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c |
| 90 | +++ b/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c |
| 91 | @@ -58,6 +58,7 @@ static struct cdns_plat_data imx8mq_hdmi |
| 92 | .bind = cdns_hdmi_bind, |
| 93 | .unbind = cdns_hdmi_unbind, |
| 94 | .phy_set = cdns_hdmi_phy_set_imx8mq, |
| 95 | + .phy_video_valid = cdns_hdmi_phy_video_valid_imx8mq, |
| 96 | .bus_type = BUS_TYPE_NORMAL_APB, |
| 97 | }; |
| 98 | |
| 99 | @@ -74,6 +75,7 @@ static struct cdns_plat_data imx8qm_hdmi |
| 100 | .bind = cdns_hdmi_bind, |
| 101 | .unbind = cdns_hdmi_unbind, |
| 102 | .phy_set = cdns_hdmi_phy_set_imx8qm, |
| 103 | + .phy_video_valid = cdns_hdmi_phy_video_valid_imx8qm, |
| 104 | .power_on = cdns_mhdp_power_on_imx8qm, |
| 105 | .firmware_init = cdns_mhdp_firmware_init_imx8qm, |
| 106 | .pclk_rate = cdns_mhdp_pclk_rate_imx8qm, |
| 107 | --- a/drivers/gpu/drm/imx/cdn-mhdp-phy.h |
| 108 | +++ b/drivers/gpu/drm/imx/cdn-mhdp-phy.h |
| 109 | @@ -148,6 +148,8 @@ |
| 110 | |
| 111 | int cdns_dp_phy_set_imx8mq(struct cdns_mhdp_device *hdp); |
| 112 | int cdns_dp_phy_set_imx8qm(struct cdns_mhdp_device *hdp); |
| 113 | +bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *hdp); |
| 114 | +bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *hdp); |
| 115 | int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *hdp); |
| 116 | int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *hdp); |
| 117 | #endif /* _CDNS_MHDP_PHY_H */ |
| 118 | --- a/include/drm/bridge/cdns-mhdp-common.h |
| 119 | +++ b/include/drm/bridge/cdns-mhdp-common.h |
| 120 | @@ -643,6 +643,7 @@ struct cdns_plat_data { |
| 121 | void (*plat_deinit)(struct cdns_mhdp_device *mhdp); |
| 122 | |
| 123 | int (*phy_set)(struct cdns_mhdp_device *mhdp); |
| 124 | + bool (*phy_video_valid)(struct cdns_mhdp_device *mhdp); |
| 125 | int (*firmware_init)(struct cdns_mhdp_device *mhdp); |
| 126 | void (*pclk_rate)(struct cdns_mhdp_device *mhdp); |
| 127 | |
| 128 | @@ -675,6 +676,7 @@ struct cdns_mhdp_device { |
| 129 | |
| 130 | struct video_info video_info; |
| 131 | struct drm_display_mode mode; |
| 132 | + const struct drm_display_mode *valid_mode; |
| 133 | unsigned int fw_version; |
| 134 | |
| 135 | struct drm_dp_mst_topology_mgr mst_mgr; |