b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001 |
| 2 | From: Tim Harvey <tharvey@gateworks.com> |
| 3 | Date: Wed, 10 Apr 2019 08:00:47 -0700 |
| 4 | Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with |
| 5 | GPIO PERST# |
| 6 | |
| 7 | Gateworks boards use PLX PEX860x switches where downstream ports |
| 8 | have their PERST# driven from the PEX GPIO. |
| 9 | |
| 10 | Signed-off-by: Tim Harvey <tharvey@gateworks.com> |
| 11 | --- |
| 12 | drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++ |
| 13 | 1 file changed, 32 insertions(+) |
| 14 | |
| 15 | --- a/drivers/pci/quirks.c |
| 16 | +++ b/drivers/pci/quirks.c |
| 17 | @@ -25,6 +25,7 @@ |
| 18 | #include <linux/ktime.h> |
| 19 | #include <linux/mm.h> |
| 20 | #include <linux/nvme.h> |
| 21 | +#include <linux/of.h> |
| 22 | #include <linux/platform_data/x86/apple.h> |
| 23 | #include <linux/pm_runtime.h> |
| 24 | #include <linux/suspend.h> |
| 25 | @@ -5819,3 +5820,34 @@ static void nvidia_ion_ahci_fixup(struct |
| 26 | pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING; |
| 27 | } |
| 28 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup); |
| 29 | + |
| 30 | +#ifdef CONFIG_PCI_HOST_THUNDER_PEM |
| 31 | +/* |
| 32 | + * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High |
| 33 | + * as they are used for slots1-7 PERST# |
| 34 | + */ |
| 35 | +static void newport_pciesw_early_fixup(struct pci_dev *dev) |
| 36 | +{ |
| 37 | + u32 dw; |
| 38 | + |
| 39 | + if (!of_machine_is_compatible("gw,newport")) |
| 40 | + return; |
| 41 | + |
| 42 | + if (dev->devfn != 0) |
| 43 | + return; |
| 44 | + |
| 45 | + dev_info(&dev->dev, "de-asserting PERST#\n"); |
| 46 | + pci_read_config_dword(dev, 0x62c, &dw); |
| 47 | + dw |= 0xaaa8; /* GPIO1-7 outputs */ |
| 48 | + pci_write_config_dword(dev, 0x62c, dw); |
| 49 | + |
| 50 | + pci_read_config_dword(dev, 0x644, &dw); |
| 51 | + dw |= 0xfe; /* GPIO1-7 output high */ |
| 52 | + pci_write_config_dword(dev, 0x644, dw); |
| 53 | + |
| 54 | + msleep(100); |
| 55 | +} |
| 56 | +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup); |
| 57 | +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup); |
| 58 | +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup); |
| 59 | +#endif /* CONFIG_PCI_HOST_THUNDER_PEM */ |