| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
| 2 | |
| 3 | #include "qca9556_avm_fritz-repeater.dtsi" |
| 4 | |
| 5 | #include <dt-bindings/gpio/gpio.h> |
| 6 | |
| 7 | / { |
| 8 | compatible = "avm,fritz1750e", "qca,qca9556"; |
| 9 | model = "AVM FRITZ!WLAN Repeater 1750E"; |
| 10 | |
| 11 | aliases { |
| 12 | led-boot = &led_power; |
| 13 | led-failsafe = &led_power; |
| 14 | led-running = &led_power; |
| 15 | led-upgrade = &led_power; |
| 16 | }; |
| 17 | |
| 18 | led_spi { |
| 19 | compatible = "spi-gpio"; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | |
| 23 | sck-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; |
| 24 | mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; |
| 25 | num-chipselects = <0>; |
| 26 | |
| 27 | spi_gpio: led_gpio@0 { |
| 28 | compatible = "fairchild,74hc595"; |
| 29 | reg = <0>; |
| 30 | gpio-controller; |
| 31 | #gpio-cells = <2>; |
| 32 | registers-number = <1>; |
| 33 | spi-max-frequency = <10000000>; |
| 34 | |
| 35 | gpio_latch_bit { |
| 36 | gpio-hog; |
| 37 | gpios = <7 GPIO_ACTIVE_HIGH>; |
| 38 | output-high; |
| 39 | line-name = "gpio-latch-bit"; |
| 40 | }; |
| 41 | }; |
| 42 | }; |
| 43 | |
| 44 | leds { |
| 45 | compatible = "gpio-leds"; |
| 46 | |
| 47 | led_power: power { |
| 48 | label = "green:power"; |
| 49 | gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>; |
| 50 | }; |
| 51 | |
| 52 | wlan { |
| 53 | label = "green:wlan"; |
| 54 | gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>; |
| 55 | linux,default-trigger = "phy1tpt"; |
| 56 | }; |
| 57 | |
| 58 | lan { |
| 59 | label = "green:lan"; |
| 60 | gpios = <&gpio 13 GPIO_ACTIVE_HIGH>; |
| 61 | }; |
| 62 | |
| 63 | rssi0 { |
| 64 | label = "green:rssi0"; |
| 65 | gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>; |
| 66 | }; |
| 67 | |
| 68 | rssi1 { |
| 69 | label = "green:rssi1"; |
| 70 | gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>; |
| 71 | }; |
| 72 | |
| 73 | rssi2 { |
| 74 | label = "green:rssi2"; |
| 75 | gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>; |
| 76 | }; |
| 77 | |
| 78 | rssi3 { |
| 79 | label = "green:rssi3"; |
| 80 | gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>; |
| 81 | }; |
| 82 | |
| 83 | rssi4 { |
| 84 | label = "green:rssi4"; |
| 85 | gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>; |
| 86 | }; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | &pcie0 { |
| 91 | status = "okay"; |
| 92 | }; |
| 93 | |
| 94 | &phy0 { |
| 95 | reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
| 96 | }; |
| 97 | |
| 98 | &gpio { |
| 99 | reset-pcie-ep { |
| 100 | gpio-hog; |
| 101 | gpios = <17 GPIO_ACTIVE_HIGH>; |
| 102 | output-high; |
| 103 | line-name = "PCIE EP reset"; |
| 104 | }; |
| 105 | |
| 106 | reset-pcie { |
| 107 | gpio-hog; |
| 108 | gpios = <18 GPIO_ACTIVE_HIGH>; |
| 109 | output-high; |
| 110 | line-name = "PCIE Bus reset"; |
| 111 | }; |
| 112 | }; |