blob: f0c311d91620850a2472ffedf341ec44bf7e9716 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 5f6c08984a6578201fe3a2394ccb0d3a30fdf027 Mon Sep 17 00:00:00 2001
2From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
3Date: Tue, 22 Oct 2019 12:26:52 -0300
4Subject: [PATCH] media: v4l: Add definitions for HEVC stateless
5 decoding
6
7This introduces the required definitions for HEVC decoding support with
8stateless VPUs. The controls associated to the HEVC slice format provide
9the required meta-data for decoding slices extracted from the bitstream.
10
11They are not exported to the public V4L2 API since reworking this API
12will likely be needed for covering various use-cases and new hardware.
13
14Multi-slice decoding is exposed as a valid decoding mode to match current
15H.264 support but it is not yet implemented.
16
17The interface comes with the following limitations:
18* No custom quantization matrices (scaling lists);
19* Support for a single temporal layer only;
20* No slice entry point offsets support;
21* No conformance window support;
22* No VUI parameters support;
23* No support for SPS extensions: range, multilayer, 3d, scc, 4 bits;
24* No support for PPS extensions: range, multilayer, 3d, scc, 4 bits.
25
26Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
27[hverkuil-cisco@xs4all.nl: use 1ULL in flags defines in hevc-ctrls.h]
28Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
29Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
30---
31 Documentation/media/uapi/v4l/biblio.rst | 9 +
32 .../media/uapi/v4l/ext-ctrls-codec.rst | 553 +++++++++++++++++-
33 .../media/uapi/v4l/vidioc-queryctrl.rst | 18 +
34 .../media/videodev2.h.rst.exceptions | 3 +
35 drivers/media/v4l2-core/v4l2-ctrls.c | 109 +++-
36 drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
37 include/media/hevc-ctrls.h | 212 +++++++
38 include/media/v4l2-ctrls.h | 7 +
39 8 files changed, 908 insertions(+), 4 deletions(-)
40 create mode 100644 include/media/hevc-ctrls.h
41
42--- a/Documentation/media/uapi/v4l/biblio.rst
43+++ b/Documentation/media/uapi/v4l/biblio.rst
44@@ -131,6 +131,15 @@ ITU-T Rec. H.264 Specification (04/2017
45
46 :author: International Telecommunication Union (http://www.itu.ch)
47
48+.. _hevc:
49+
50+ITU H.265/HEVC
51+==============
52+
53+:title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"
54+
55+:author: International Telecommunication Union (http://www.itu.ch), International Organisation for Standardisation (http://www.iso.ch)
56+
57 .. _jfif:
58
59 JFIF
60--- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
61+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
62@@ -1983,9 +1983,9 @@ enum v4l2_mpeg_video_h264_hierarchical_c
63 - ``reference_ts``
64 - Timestamp of the V4L2 capture buffer to use as reference, used
65 with B-coded and P-coded frames. The timestamp refers to the
66- ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
67- :c:func:`v4l2_timeval_to_ns()` function to convert the struct
68- :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
69+ ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
70+ :c:func:`v4l2_timeval_to_ns()` function to convert the struct
71+ :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
72 * - __u16
73 - ``frame_num``
74 -
75@@ -3693,3 +3693,550 @@ enum v4l2_mpeg_video_hevc_size_of_length
76 Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
77 disables generating SPS and PPS at every IDR. Setting it to one enables
78 generating SPS and PPS at every IDR.
79+
80+.. _v4l2-mpeg-hevc:
81+
82+``V4L2_CID_MPEG_VIDEO_HEVC_SPS (struct)``
83+ Specifies the Sequence Parameter Set fields (as extracted from the
84+ bitstream) for the associated HEVC slice data.
85+ These bitstream parameters are defined according to :ref:`hevc`.
86+ They are described in section 7.4.3.2 "Sequence parameter set RBSP
87+ semantics" of the specification.
88+
89+.. c:type:: v4l2_ctrl_hevc_sps
90+
91+.. cssclass:: longtable
92+
93+.. flat-table:: struct v4l2_ctrl_hevc_sps
94+ :header-rows: 0
95+ :stub-columns: 0
96+ :widths: 1 1 2
97+
98+ * - __u16
99+ - ``pic_width_in_luma_samples``
100+ -
101+ * - __u16
102+ - ``pic_height_in_luma_samples``
103+ -
104+ * - __u8
105+ - ``bit_depth_luma_minus8``
106+ -
107+ * - __u8
108+ - ``bit_depth_chroma_minus8``
109+ -
110+ * - __u8
111+ - ``log2_max_pic_order_cnt_lsb_minus4``
112+ -
113+ * - __u8
114+ - ``sps_max_dec_pic_buffering_minus1``
115+ -
116+ * - __u8
117+ - ``sps_max_num_reorder_pics``
118+ -
119+ * - __u8
120+ - ``sps_max_latency_increase_plus1``
121+ -
122+ * - __u8
123+ - ``log2_min_luma_coding_block_size_minus3``
124+ -
125+ * - __u8
126+ - ``log2_diff_max_min_luma_coding_block_size``
127+ -
128+ * - __u8
129+ - ``log2_min_luma_transform_block_size_minus2``
130+ -
131+ * - __u8
132+ - ``log2_diff_max_min_luma_transform_block_size``
133+ -
134+ * - __u8
135+ - ``max_transform_hierarchy_depth_inter``
136+ -
137+ * - __u8
138+ - ``max_transform_hierarchy_depth_intra``
139+ -
140+ * - __u8
141+ - ``pcm_sample_bit_depth_luma_minus1``
142+ -
143+ * - __u8
144+ - ``pcm_sample_bit_depth_chroma_minus1``
145+ -
146+ * - __u8
147+ - ``log2_min_pcm_luma_coding_block_size_minus3``
148+ -
149+ * - __u8
150+ - ``log2_diff_max_min_pcm_luma_coding_block_size``
151+ -
152+ * - __u8
153+ - ``num_short_term_ref_pic_sets``
154+ -
155+ * - __u8
156+ - ``num_long_term_ref_pics_sps``
157+ -
158+ * - __u8
159+ - ``chroma_format_idc``
160+ -
161+ * - __u64
162+ - ``flags``
163+ - See :ref:`Sequence Parameter Set Flags <hevc_sps_flags>`
164+
165+.. _hevc_sps_flags:
166+
167+``Sequence Parameter Set Flags``
168+
169+.. cssclass:: longtable
170+
171+.. flat-table::
172+ :header-rows: 0
173+ :stub-columns: 0
174+ :widths: 1 1 2
175+
176+ * - ``V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE``
177+ - 0x00000001
178+ -
179+ * - ``V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED``
180+ - 0x00000002
181+ -
182+ * - ``V4L2_HEVC_SPS_FLAG_AMP_ENABLED``
183+ - 0x00000004
184+ -
185+ * - ``V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET``
186+ - 0x00000008
187+ -
188+ * - ``V4L2_HEVC_SPS_FLAG_PCM_ENABLED``
189+ - 0x00000010
190+ -
191+ * - ``V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED``
192+ - 0x00000020
193+ -
194+ * - ``V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT``
195+ - 0x00000040
196+ -
197+ * - ``V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED``
198+ - 0x00000080
199+ -
200+ * - ``V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED``
201+ - 0x00000100
202+ -
203+
204+``V4L2_CID_MPEG_VIDEO_HEVC_PPS (struct)``
205+ Specifies the Picture Parameter Set fields (as extracted from the
206+ bitstream) for the associated HEVC slice data.
207+ These bitstream parameters are defined according to :ref:`hevc`.
208+ They are described in section 7.4.3.3 "Picture parameter set RBSP
209+ semantics" of the specification.
210+
211+.. c:type:: v4l2_ctrl_hevc_pps
212+
213+.. cssclass:: longtable
214+
215+.. flat-table:: struct v4l2_ctrl_hevc_pps
216+ :header-rows: 0
217+ :stub-columns: 0
218+ :widths: 1 1 2
219+
220+ * - __u8
221+ - ``num_extra_slice_header_bits``
222+ -
223+ * - __s8
224+ - ``init_qp_minus26``
225+ -
226+ * - __u8
227+ - ``diff_cu_qp_delta_depth``
228+ -
229+ * - __s8
230+ - ``pps_cb_qp_offset``
231+ -
232+ * - __s8
233+ - ``pps_cr_qp_offset``
234+ -
235+ * - __u8
236+ - ``num_tile_columns_minus1``
237+ -
238+ * - __u8
239+ - ``num_tile_rows_minus1``
240+ -
241+ * - __u8
242+ - ``column_width_minus1[20]``
243+ -
244+ * - __u8
245+ - ``row_height_minus1[22]``
246+ -
247+ * - __s8
248+ - ``pps_beta_offset_div2``
249+ -
250+ * - __s8
251+ - ``pps_tc_offset_div2``
252+ -
253+ * - __u8
254+ - ``log2_parallel_merge_level_minus2``
255+ -
256+ * - __u8
257+ - ``padding[4]``
258+ - Applications and drivers must set this to zero.
259+ * - __u64
260+ - ``flags``
261+ - See :ref:`Picture Parameter Set Flags <hevc_pps_flags>`
262+
263+.. _hevc_pps_flags:
264+
265+``Picture Parameter Set Flags``
266+
267+.. cssclass:: longtable
268+
269+.. flat-table::
270+ :header-rows: 0
271+ :stub-columns: 0
272+ :widths: 1 1 2
273+
274+ * - ``V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT``
275+ - 0x00000001
276+ -
277+ * - ``V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT``
278+ - 0x00000002
279+ -
280+ * - ``V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED``
281+ - 0x00000004
282+ -
283+ * - ``V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT``
284+ - 0x00000008
285+ -
286+ * - ``V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED``
287+ - 0x00000010
288+ -
289+ * - ``V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED``
290+ - 0x00000020
291+ -
292+ * - ``V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED``
293+ - 0x00000040
294+ -
295+ * - ``V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT``
296+ - 0x00000080
297+ -
298+ * - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED``
299+ - 0x00000100
300+ -
301+ * - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED``
302+ - 0x00000200
303+ -
304+ * - ``V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED``
305+ - 0x00000400
306+ -
307+ * - ``V4L2_HEVC_PPS_FLAG_TILES_ENABLED``
308+ - 0x00000800
309+ -
310+ * - ``V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED``
311+ - 0x00001000
312+ -
313+ * - ``V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED``
314+ - 0x00002000
315+ -
316+ * - ``V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED``
317+ - 0x00004000
318+ -
319+ * - ``V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED``
320+ - 0x00008000
321+ -
322+ * - ``V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER``
323+ - 0x00010000
324+ -
325+ * - ``V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT``
326+ - 0x00020000
327+ -
328+ * - ``V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT``
329+ - 0x00040000
330+ -
331+
332+``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (struct)``
333+ Specifies various slice-specific parameters, especially from the NAL unit
334+ header, general slice segment header and weighted prediction parameter
335+ parts of the bitstream.
336+ These bitstream parameters are defined according to :ref:`hevc`.
337+ They are described in section 7.4.7 "General slice segment header
338+ semantics" of the specification.
339+
340+.. c:type:: v4l2_ctrl_hevc_slice_params
341+
342+.. cssclass:: longtable
343+
344+.. flat-table:: struct v4l2_ctrl_hevc_slice_params
345+ :header-rows: 0
346+ :stub-columns: 0
347+ :widths: 1 1 2
348+
349+ * - __u32
350+ - ``bit_size``
351+ - Size (in bits) of the current slice data.
352+ * - __u32
353+ - ``data_bit_offset``
354+ - Offset (in bits) to the video data in the current slice data.
355+ * - __u8
356+ - ``nal_unit_type``
357+ -
358+ * - __u8
359+ - ``nuh_temporal_id_plus1``
360+ -
361+ * - __u8
362+ - ``slice_type``
363+ -
364+ (V4L2_HEVC_SLICE_TYPE_I, V4L2_HEVC_SLICE_TYPE_P or
365+ V4L2_HEVC_SLICE_TYPE_B).
366+ * - __u8
367+ - ``colour_plane_id``
368+ -
369+ * - __u16
370+ - ``slice_pic_order_cnt``
371+ -
372+ * - __u8
373+ - ``num_ref_idx_l0_active_minus1``
374+ -
375+ * - __u8
376+ - ``num_ref_idx_l1_active_minus1``
377+ -
378+ * - __u8
379+ - ``collocated_ref_idx``
380+ -
381+ * - __u8
382+ - ``five_minus_max_num_merge_cand``
383+ -
384+ * - __s8
385+ - ``slice_qp_delta``
386+ -
387+ * - __s8
388+ - ``slice_cb_qp_offset``
389+ -
390+ * - __s8
391+ - ``slice_cr_qp_offset``
392+ -
393+ * - __s8
394+ - ``slice_act_y_qp_offset``
395+ -
396+ * - __s8
397+ - ``slice_act_cb_qp_offset``
398+ -
399+ * - __s8
400+ - ``slice_act_cr_qp_offset``
401+ -
402+ * - __s8
403+ - ``slice_beta_offset_div2``
404+ -
405+ * - __s8
406+ - ``slice_tc_offset_div2``
407+ -
408+ * - __u8
409+ - ``pic_struct``
410+ -
411+ * - __u8
412+ - ``num_active_dpb_entries``
413+ - The number of entries in ``dpb``.
414+ * - __u8
415+ - ``ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
416+ - The list of L0 reference elements as indices in the DPB.
417+ * - __u8
418+ - ``ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
419+ - The list of L1 reference elements as indices in the DPB.
420+ * - __u8
421+ - ``num_rps_poc_st_curr_before``
422+ - The number of reference pictures in the short-term set that come before
423+ the current frame.
424+ * - __u8
425+ - ``num_rps_poc_st_curr_after``
426+ - The number of reference pictures in the short-term set that come after
427+ the current frame.
428+ * - __u8
429+ - ``num_rps_poc_lt_curr``
430+ - The number of reference pictures in the long-term set.
431+ * - __u8
432+ - ``padding[7]``
433+ - Applications and drivers must set this to zero.
434+ * - struct :c:type:`v4l2_hevc_dpb_entry`
435+ - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
436+ - The decoded picture buffer, for meta-data about reference frames.
437+ * - struct :c:type:`v4l2_hevc_pred_weight_table`
438+ - ``pred_weight_table``
439+ - The prediction weight coefficients for inter-picture prediction.
440+ * - __u64
441+ - ``flags``
442+ - See :ref:`Slice Parameters Flags <hevc_slice_params_flags>`
443+
444+.. _hevc_slice_params_flags:
445+
446+``Slice Parameters Flags``
447+
448+.. cssclass:: longtable
449+
450+.. flat-table::
451+ :header-rows: 0
452+ :stub-columns: 0
453+ :widths: 1 1 2
454+
455+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA``
456+ - 0x00000001
457+ -
458+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA``
459+ - 0x00000002
460+ -
461+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED``
462+ - 0x00000004
463+ -
464+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO``
465+ - 0x00000008
466+ -
467+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT``
468+ - 0x00000010
469+ -
470+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0``
471+ - 0x00000020
472+ -
473+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV``
474+ - 0x00000040
475+ -
476+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED``
477+ - 0x00000080
478+ -
479+ * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED``
480+ - 0x00000100
481+ -
482+
483+.. c:type:: v4l2_hevc_dpb_entry
484+
485+.. cssclass:: longtable
486+
487+.. flat-table:: struct v4l2_hevc_dpb_entry
488+ :header-rows: 0
489+ :stub-columns: 0
490+ :widths: 1 1 2
491+
492+ * - __u64
493+ - ``timestamp``
494+ - Timestamp of the V4L2 capture buffer to use as reference, used
495+ with B-coded and P-coded frames. The timestamp refers to the
496+ ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
497+ :c:func:`v4l2_timeval_to_ns()` function to convert the struct
498+ :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
499+ * - __u8
500+ - ``rps``
501+ - The reference set for the reference frame
502+ (V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_BEFORE,
503+ V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_AFTER or
504+ V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR)
505+ * - __u8
506+ - ``field_pic``
507+ - Whether the reference is a field picture or a frame.
508+ * - __u16
509+ - ``pic_order_cnt[2]``
510+ - The picture order count of the reference. Only the first element of the
511+ array is used for frame pictures, while the first element identifies the
512+ top field and the second the bottom field in field-coded pictures.
513+ * - __u8
514+ - ``padding[2]``
515+ - Applications and drivers must set this to zero.
516+
517+.. c:type:: v4l2_hevc_pred_weight_table
518+
519+.. cssclass:: longtable
520+
521+.. flat-table:: struct v4l2_hevc_pred_weight_table
522+ :header-rows: 0
523+ :stub-columns: 0
524+ :widths: 1 1 2
525+
526+ * - __u8
527+ - ``luma_log2_weight_denom``
528+ -
529+ * - __s8
530+ - ``delta_chroma_log2_weight_denom``
531+ -
532+ * - __s8
533+ - ``delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
534+ -
535+ * - __s8
536+ - ``luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
537+ -
538+ * - __s8
539+ - ``delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
540+ -
541+ * - __s8
542+ - ``chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
543+ -
544+ * - __s8
545+ - ``delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
546+ -
547+ * - __s8
548+ - ``luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
549+ -
550+ * - __s8
551+ - ``delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
552+ -
553+ * - __s8
554+ - ``chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
555+ -
556+ * - __u8
557+ - ``padding[6]``
558+ - Applications and drivers must set this to zero.
559+
560+``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)``
561+ Specifies the decoding mode to use. Currently exposes slice-based and
562+ frame-based decoding but new modes might be added later on.
563+ This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
564+ pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
565+ are required to set this control in order to specify the decoding mode
566+ that is expected for the buffer.
567+ Drivers may expose a single or multiple decoding modes, depending
568+ on what they can support.
569+
570+ .. note::
571+
572+ This menu control is not yet part of the public kernel API and
573+ it is expected to change.
574+
575+.. c:type:: v4l2_mpeg_video_hevc_decode_mode
576+
577+.. cssclass:: longtable
578+
579+.. flat-table::
580+ :header-rows: 0
581+ :stub-columns: 0
582+ :widths: 1 1 2
583+
584+ * - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED``
585+ - 0
586+ - Decoding is done at the slice granularity.
587+ The OUTPUT buffer must contain a single slice.
588+ * - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_FRAME_BASED``
589+ - 1
590+ - Decoding is done at the frame granularity.
591+ The OUTPUT buffer must contain all slices needed to decode the
592+ frame. The OUTPUT buffer must also contain both fields.
593+
594+``V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (enum)``
595+ Specifies the HEVC slice start code expected for each slice.
596+ This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
597+ pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
598+ are required to set this control in order to specify the start code
599+ that is expected for the buffer.
600+ Drivers may expose a single or multiple start codes, depending
601+ on what they can support.
602+
603+ .. note::
604+
605+ This menu control is not yet part of the public kernel API and
606+ it is expected to change.
607+
608+.. c:type:: v4l2_mpeg_video_hevc_start_code
609+
610+.. cssclass:: longtable
611+
612+.. flat-table::
613+ :header-rows: 0
614+ :stub-columns: 0
615+ :widths: 1 1 2
616+
617+ * - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_NONE``
618+ - 0
619+ - Selecting this value specifies that HEVC slices are passed
620+ to the driver without any start code.
621+ * - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_ANNEX_B``
622+ - 1
623+ - Selecting this value specifies that HEVC slices are expected
624+ to be prefixed by Annex B start codes. According to :ref:`hevc`
625+ valid start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001.
626--- a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst
627+++ b/Documentation/media/uapi/v4l/vidioc-queryctrl.rst
628@@ -479,6 +479,24 @@ See also the examples in :ref:`control`.
629 - n/a
630 - A struct :c:type:`v4l2_ctrl_h264_decode_params`, containing H264
631 decode parameters for stateless video decoders.
632+ * - ``V4L2_CTRL_TYPE_HEVC_SPS``
633+ - n/a
634+ - n/a
635+ - n/a
636+ - A struct :c:type:`v4l2_ctrl_hevc_sps`, containing HEVC Sequence
637+ Parameter Set for stateless video decoders.
638+ * - ``V4L2_CTRL_TYPE_HEVC_PPS``
639+ - n/a
640+ - n/a
641+ - n/a
642+ - A struct :c:type:`v4l2_ctrl_hevc_pps`, containing HEVC Picture
643+ Parameter Set for stateless video decoders.
644+ * - ``V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS``
645+ - n/a
646+ - n/a
647+ - n/a
648+ - A struct :c:type:`v4l2_ctrl_hevc_slice_params`, containing HEVC
649+ slice parameters for stateless video decoders.
650
651 .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
652
653--- a/Documentation/media/videodev2.h.rst.exceptions
654+++ b/Documentation/media/videodev2.h.rst.exceptions
655@@ -141,6 +141,9 @@ replace symbol V4L2_CTRL_TYPE_H264_PPS :
656 replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`v4l2_ctrl_type`
657 replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
658 replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`v4l2_ctrl_type`
659+replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type`
660+replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type`
661+replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
662 replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type`
663
664 # V4L2 capability defines
665--- a/drivers/media/v4l2-core/v4l2-ctrls.c
666+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
667@@ -567,6 +567,16 @@ const char * const *v4l2_ctrl_get_menu(u
668 "Disabled at slice boundary",
669 "NULL",
670 };
671+ static const char * const hevc_decode_mode[] = {
672+ "Slice-Based",
673+ "Frame-Based",
674+ NULL,
675+ };
676+ static const char * const hevc_start_code[] = {
677+ "No Start Code",
678+ "Annex B Start Code",
679+ NULL,
680+ };
681
682 switch (id) {
683 case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
684@@ -688,7 +698,10 @@ const char * const *v4l2_ctrl_get_menu(u
685 return hevc_tier;
686 case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE:
687 return hevc_loop_filter_mode;
688-
689+ case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE:
690+ return hevc_decode_mode;
691+ case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE:
692+ return hevc_start_code;
693 default:
694 return NULL;
695 }
696@@ -958,6 +971,11 @@ const char *v4l2_ctrl_get_name(u32 id)
697 case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD: return "HEVC Size of Length Field";
698 case V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES: return "Reference Frames for a P-Frame";
699 case V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR: return "Prepend SPS and PPS to IDR";
700+ case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set";
701+ case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set";
702+ case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters";
703+ case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode";
704+ case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code";
705
706 /* CAMERA controls */
707 /* Keep the order of the 'case's the same as in v4l2-controls.h! */
708@@ -1267,6 +1285,8 @@ void v4l2_ctrl_fill(u32 id, const char *
709 case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
710 case V4L2_CID_MPEG_VIDEO_HEVC_TIER:
711 case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE:
712+ case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE:
713+ case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE:
714 *type = V4L2_CTRL_TYPE_MENU;
715 break;
716 case V4L2_CID_LINK_FREQ:
717@@ -1377,6 +1397,15 @@ void v4l2_ctrl_fill(u32 id, const char *
718 case V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER:
719 *type = V4L2_CTRL_TYPE_VP8_FRAME_HEADER;
720 break;
721+ case V4L2_CID_MPEG_VIDEO_HEVC_SPS:
722+ *type = V4L2_CTRL_TYPE_HEVC_SPS;
723+ break;
724+ case V4L2_CID_MPEG_VIDEO_HEVC_PPS:
725+ *type = V4L2_CTRL_TYPE_HEVC_PPS;
726+ break;
727+ case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS:
728+ *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS;
729+ break;
730 case V4L2_CID_UNIT_CELL_SIZE:
731 *type = V4L2_CTRL_TYPE_AREA;
732 *flags |= V4L2_CTRL_FLAG_READ_ONLY;
733@@ -1678,8 +1707,12 @@ static int std_validate_compound(const s
734 {
735 struct v4l2_ctrl_mpeg2_slice_params *p_mpeg2_slice_params;
736 struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header;
737+ struct v4l2_ctrl_hevc_sps *p_hevc_sps;
738+ struct v4l2_ctrl_hevc_pps *p_hevc_pps;
739+ struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
740 struct v4l2_area *area;
741 void *p = ptr.p + idx * ctrl->elem_size;
742+ unsigned int i;
743
744 switch ((u32)ctrl->type) {
745 case V4L2_CTRL_TYPE_MPEG2_SLICE_PARAMS:
746@@ -1755,11 +1788,76 @@ static int std_validate_compound(const s
747 zero_padding(p_vp8_frame_header->entropy_header);
748 zero_padding(p_vp8_frame_header->coder_state);
749 break;
750+
751+ case V4L2_CTRL_TYPE_HEVC_SPS:
752+ p_hevc_sps = p;
753+
754+ if (!(p_hevc_sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED)) {
755+ p_hevc_sps->pcm_sample_bit_depth_luma_minus1 = 0;
756+ p_hevc_sps->pcm_sample_bit_depth_chroma_minus1 = 0;
757+ p_hevc_sps->log2_min_pcm_luma_coding_block_size_minus3 = 0;
758+ p_hevc_sps->log2_diff_max_min_pcm_luma_coding_block_size = 0;
759+ }
760+
761+ if (!(p_hevc_sps->flags &
762+ V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT))
763+ p_hevc_sps->num_long_term_ref_pics_sps = 0;
764+ break;
765+
766+ case V4L2_CTRL_TYPE_HEVC_PPS:
767+ p_hevc_pps = p;
768+
769+ if (!(p_hevc_pps->flags &
770+ V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED))
771+ p_hevc_pps->diff_cu_qp_delta_depth = 0;
772+
773+ if (!(p_hevc_pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED)) {
774+ p_hevc_pps->num_tile_columns_minus1 = 0;
775+ p_hevc_pps->num_tile_rows_minus1 = 0;
776+ memset(&p_hevc_pps->column_width_minus1, 0,
777+ sizeof(p_hevc_pps->column_width_minus1));
778+ memset(&p_hevc_pps->row_height_minus1, 0,
779+ sizeof(p_hevc_pps->row_height_minus1));
780+
781+ p_hevc_pps->flags &=
782+ ~V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED;
783+ }
784+
785+ if (p_hevc_pps->flags &
786+ V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER) {
787+ p_hevc_pps->pps_beta_offset_div2 = 0;
788+ p_hevc_pps->pps_tc_offset_div2 = 0;
789+ }
790+
791+ zero_padding(*p_hevc_pps);
792+ break;
793+
794+ case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
795+ p_hevc_slice_params = p;
796+
797+ if (p_hevc_slice_params->num_active_dpb_entries >
798+ V4L2_HEVC_DPB_ENTRIES_NUM_MAX)
799+ return -EINVAL;
800+
801+ zero_padding(p_hevc_slice_params->pred_weight_table);
802+
803+ for (i = 0; i < p_hevc_slice_params->num_active_dpb_entries;
804+ i++) {
805+ struct v4l2_hevc_dpb_entry *dpb_entry =
806+ &p_hevc_slice_params->dpb[i];
807+
808+ zero_padding(*dpb_entry);
809+ }
810+
811+ zero_padding(*p_hevc_slice_params);
812+ break;
813+
814 case V4L2_CTRL_TYPE_AREA:
815 area = p;
816 if (!area->width || !area->height)
817 return -EINVAL;
818 break;
819+
820 default:
821 return -EINVAL;
822 }
823@@ -2442,6 +2540,15 @@ static struct v4l2_ctrl *v4l2_ctrl_new(s
824 case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:
825 elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header);
826 break;
827+ case V4L2_CTRL_TYPE_HEVC_SPS:
828+ elem_size = sizeof(struct v4l2_ctrl_hevc_sps);
829+ break;
830+ case V4L2_CTRL_TYPE_HEVC_PPS:
831+ elem_size = sizeof(struct v4l2_ctrl_hevc_pps);
832+ break;
833+ case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
834+ elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
835+ break;
836 case V4L2_CTRL_TYPE_AREA:
837 elem_size = sizeof(struct v4l2_area);
838 break;
839--- a/drivers/media/v4l2-core/v4l2-ioctl.c
840+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
841@@ -1374,6 +1374,7 @@ static void v4l_fill_fmtdesc(struct v4l2
842 case V4L2_PIX_FMT_VP8_FRAME: descr = "VP8 Frame"; break;
843 case V4L2_PIX_FMT_VP9: descr = "VP9"; break;
844 case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break; /* aka H.265 */
845+ case V4L2_PIX_FMT_HEVC_SLICE: descr = "HEVC Parsed Slice Data"; break;
846 case V4L2_PIX_FMT_FWHT: descr = "FWHT"; break; /* used in vicodec */
847 case V4L2_PIX_FMT_FWHT_STATELESS: descr = "FWHT Stateless"; break; /* used in vicodec */
848 case V4L2_PIX_FMT_CPIA1: descr = "GSPCA CPiA YUV"; break;
849--- /dev/null
850+++ b/include/media/hevc-ctrls.h
851@@ -0,0 +1,212 @@
852+/* SPDX-License-Identifier: GPL-2.0 */
853+/*
854+ * These are the HEVC state controls for use with stateless HEVC
855+ * codec drivers.
856+ *
857+ * It turns out that these structs are not stable yet and will undergo
858+ * more changes. So keep them private until they are stable and ready to
859+ * become part of the official public API.
860+ */
861+
862+#ifndef _HEVC_CTRLS_H_
863+#define _HEVC_CTRLS_H_
864+
865+#include <linux/videodev2.h>
866+
867+/* The pixel format isn't stable at the moment and will likely be renamed. */
868+#define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5') /* HEVC parsed slices */
869+
870+#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_MPEG_BASE + 1008)
871+#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_MPEG_BASE + 1009)
872+#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_MPEG_BASE + 1010)
873+#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_MPEG_BASE + 1015)
874+#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_MPEG_BASE + 1016)
875+
876+/* enum v4l2_ctrl_type type values */
877+#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120
878+#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121
879+#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122
880+
881+enum v4l2_mpeg_video_hevc_decode_mode {
882+ V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED,
883+ V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_FRAME_BASED,
884+};
885+
886+enum v4l2_mpeg_video_hevc_start_code {
887+ V4L2_MPEG_VIDEO_HEVC_START_CODE_NONE,
888+ V4L2_MPEG_VIDEO_HEVC_START_CODE_ANNEX_B,
889+};
890+
891+#define V4L2_HEVC_SLICE_TYPE_B 0
892+#define V4L2_HEVC_SLICE_TYPE_P 1
893+#define V4L2_HEVC_SLICE_TYPE_I 2
894+
895+#define V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE (1ULL << 0)
896+#define V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED (1ULL << 1)
897+#define V4L2_HEVC_SPS_FLAG_AMP_ENABLED (1ULL << 2)
898+#define V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET (1ULL << 3)
899+#define V4L2_HEVC_SPS_FLAG_PCM_ENABLED (1ULL << 4)
900+#define V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED (1ULL << 5)
901+#define V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT (1ULL << 6)
902+#define V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED (1ULL << 7)
903+#define V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED (1ULL << 8)
904+
905+/* The controls are not stable at the moment and will likely be reworked. */
906+struct v4l2_ctrl_hevc_sps {
907+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */
908+ __u16 pic_width_in_luma_samples;
909+ __u16 pic_height_in_luma_samples;
910+ __u8 bit_depth_luma_minus8;
911+ __u8 bit_depth_chroma_minus8;
912+ __u8 log2_max_pic_order_cnt_lsb_minus4;
913+ __u8 sps_max_dec_pic_buffering_minus1;
914+ __u8 sps_max_num_reorder_pics;
915+ __u8 sps_max_latency_increase_plus1;
916+ __u8 log2_min_luma_coding_block_size_minus3;
917+ __u8 log2_diff_max_min_luma_coding_block_size;
918+ __u8 log2_min_luma_transform_block_size_minus2;
919+ __u8 log2_diff_max_min_luma_transform_block_size;
920+ __u8 max_transform_hierarchy_depth_inter;
921+ __u8 max_transform_hierarchy_depth_intra;
922+ __u8 pcm_sample_bit_depth_luma_minus1;
923+ __u8 pcm_sample_bit_depth_chroma_minus1;
924+ __u8 log2_min_pcm_luma_coding_block_size_minus3;
925+ __u8 log2_diff_max_min_pcm_luma_coding_block_size;
926+ __u8 num_short_term_ref_pic_sets;
927+ __u8 num_long_term_ref_pics_sps;
928+ __u8 chroma_format_idc;
929+
930+ __u8 padding;
931+
932+ __u64 flags;
933+};
934+
935+#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT (1ULL << 0)
936+#define V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT (1ULL << 1)
937+#define V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED (1ULL << 2)
938+#define V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT (1ULL << 3)
939+#define V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED (1ULL << 4)
940+#define V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED (1ULL << 5)
941+#define V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED (1ULL << 6)
942+#define V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT (1ULL << 7)
943+#define V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED (1ULL << 8)
944+#define V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED (1ULL << 9)
945+#define V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED (1ULL << 10)
946+#define V4L2_HEVC_PPS_FLAG_TILES_ENABLED (1ULL << 11)
947+#define V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED (1ULL << 12)
948+#define V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED (1ULL << 13)
949+#define V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 14)
950+#define V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED (1ULL << 15)
951+#define V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER (1ULL << 16)
952+#define V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT (1ULL << 17)
953+#define V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT (1ULL << 18)
954+
955+struct v4l2_ctrl_hevc_pps {
956+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */
957+ __u8 num_extra_slice_header_bits;
958+ __s8 init_qp_minus26;
959+ __u8 diff_cu_qp_delta_depth;
960+ __s8 pps_cb_qp_offset;
961+ __s8 pps_cr_qp_offset;
962+ __u8 num_tile_columns_minus1;
963+ __u8 num_tile_rows_minus1;
964+ __u8 column_width_minus1[20];
965+ __u8 row_height_minus1[22];
966+ __s8 pps_beta_offset_div2;
967+ __s8 pps_tc_offset_div2;
968+ __u8 log2_parallel_merge_level_minus2;
969+
970+ __u8 padding[4];
971+ __u64 flags;
972+};
973+
974+#define V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_BEFORE 0x01
975+#define V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_AFTER 0x02
976+#define V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR 0x03
977+
978+#define V4L2_HEVC_DPB_ENTRIES_NUM_MAX 16
979+
980+struct v4l2_hevc_dpb_entry {
981+ __u64 timestamp;
982+ __u8 rps;
983+ __u8 field_pic;
984+ __u16 pic_order_cnt[2];
985+ __u8 padding[2];
986+};
987+
988+struct v4l2_hevc_pred_weight_table {
989+ __s8 delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
990+ __s8 luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
991+ __s8 delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
992+ __s8 chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
993+
994+ __s8 delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
995+ __s8 luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
996+ __s8 delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
997+ __s8 chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
998+
999+ __u8 padding[6];
1000+
1001+ __u8 luma_log2_weight_denom;
1002+ __s8 delta_chroma_log2_weight_denom;
1003+};
1004+
1005+#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA (1ULL << 0)
1006+#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA (1ULL << 1)
1007+#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED (1ULL << 2)
1008+#define V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO (1ULL << 3)
1009+#define V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT (1ULL << 4)
1010+#define V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0 (1ULL << 5)
1011+#define V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV (1ULL << 6)
1012+#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED (1ULL << 7)
1013+#define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8)
1014+
1015+struct v4l2_ctrl_hevc_slice_params {
1016+ __u32 bit_size;
1017+ __u32 data_bit_offset;
1018+
1019+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
1020+ __u8 nal_unit_type;
1021+ __u8 nuh_temporal_id_plus1;
1022+
1023+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1024+ __u8 slice_type;
1025+ __u8 colour_plane_id;
1026+ __u16 slice_pic_order_cnt;
1027+ __u8 num_ref_idx_l0_active_minus1;
1028+ __u8 num_ref_idx_l1_active_minus1;
1029+ __u8 collocated_ref_idx;
1030+ __u8 five_minus_max_num_merge_cand;
1031+ __s8 slice_qp_delta;
1032+ __s8 slice_cb_qp_offset;
1033+ __s8 slice_cr_qp_offset;
1034+ __s8 slice_act_y_qp_offset;
1035+ __s8 slice_act_cb_qp_offset;
1036+ __s8 slice_act_cr_qp_offset;
1037+ __s8 slice_beta_offset_div2;
1038+ __s8 slice_tc_offset_div2;
1039+
1040+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture timing SEI message */
1041+ __u8 pic_struct;
1042+
1043+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1044+ __u8 num_active_dpb_entries;
1045+ __u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1046+ __u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1047+
1048+ __u8 num_rps_poc_st_curr_before;
1049+ __u8 num_rps_poc_st_curr_after;
1050+ __u8 num_rps_poc_lt_curr;
1051+
1052+ __u8 padding;
1053+
1054+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
1055+ struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
1056+
1057+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
1058+ struct v4l2_hevc_pred_weight_table pred_weight_table;
1059+
1060+ __u64 flags;
1061+};
1062+
1063+#endif
1064--- a/include/media/v4l2-ctrls.h
1065+++ b/include/media/v4l2-ctrls.h
1066@@ -21,6 +21,7 @@
1067 #include <media/fwht-ctrls.h>
1068 #include <media/h264-ctrls.h>
1069 #include <media/vp8-ctrls.h>
1070+#include <media/hevc-ctrls.h>
1071
1072 /* forward references */
1073 struct file;
1074@@ -50,6 +51,9 @@ struct poll_table_struct;
1075 * @p_h264_slice_params: Pointer to a struct v4l2_ctrl_h264_slice_params.
1076 * @p_h264_decode_params: Pointer to a struct v4l2_ctrl_h264_decode_params.
1077 * @p_vp8_frame_header: Pointer to a VP8 frame header structure.
1078+ * @p_hevc_sps: Pointer to an HEVC sequence parameter set structure.
1079+ * @p_hevc_pps: Pointer to an HEVC picture parameter set structure.
1080+ * @p_hevc_slice_params: Pointer to an HEVC slice parameters structure.
1081 * @p_area: Pointer to an area.
1082 * @p: Pointer to a compound value.
1083 */
1084@@ -69,6 +73,9 @@ union v4l2_ctrl_ptr {
1085 struct v4l2_ctrl_h264_slice_params *p_h264_slice_params;
1086 struct v4l2_ctrl_h264_decode_params *p_h264_decode_params;
1087 struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header;
1088+ struct v4l2_ctrl_hevc_sps *p_hevc_sps;
1089+ struct v4l2_ctrl_hevc_pps *p_hevc_pps;
1090+ struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
1091 struct v4l2_area *p_area;
1092 void *p;
1093 };