| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001 |
| 2 | From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com> |
| 3 | Date: Wed, 8 Apr 2015 06:58:11 +0200 |
| 4 | Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources |
| 5 | MIME-Version: 1.0 |
| 6 | Content-Type: text/plain; charset=UTF-8 |
| 7 | Content-Transfer-Encoding: 8bit |
| 8 | |
| 9 | If SoC has a CardBus we can set resources of device at slot 1 only. It's |
| 10 | impossigle to set bridge resources as it simply overwrites device 1 |
| 11 | configuration and usually results in Data bus error-s. |
| 12 | |
| 13 | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> |
| 14 | --- |
| 15 | drivers/ssb/driver_pcicore.c | 4 ++++ |
| 16 | 1 file changed, 4 insertions(+) |
| 17 | |
| 18 | --- a/drivers/ssb/driver_pcicore.c |
| 19 | +++ b/drivers/ssb/driver_pcicore.c |
| 20 | @@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc |
| 21 | WARN_ON(!pc->hostmode); |
| 22 | if (unlikely(len != 1 && len != 2 && len != 4)) |
| 23 | goto out; |
| 24 | + /* CardBus SoCs allow configuring dev 1 resources only */ |
| 25 | + if (extpci_core->cardbusmode && dev != 1 && |
| 26 | + off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5) |
| 27 | + goto out; |
| 28 | addr = get_cfgspace_addr(pc, bus, dev, func, off); |
| 29 | if (unlikely(!addr)) |
| 30 | goto out; |