| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From 091a12b1814142eac16a115dab206f735b5476a9 Mon Sep 17 00:00:00 2001 |
| 2 | From: Matthew Hagan <mnhagan88@gmail.com> |
| 3 | Date: Sun, 13 Jun 2021 10:46:34 +0100 |
| 4 | Subject: [PATCH] ARM: dts: NSP: disable qspi node by default |
| 5 | |
| 6 | The QSPI bus is enabled by default, however this may not used on all |
| 7 | devices. This patch disables by default, requiring it to be explicitly |
| 8 | enabled where required. |
| 9 | |
| 10 | Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> |
| 11 | Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
| 12 | --- |
| 13 | arch/arm/boot/dts/bcm-nsp.dtsi | 1 + |
| 14 | arch/arm/boot/dts/bcm958522er.dts | 1 + |
| 15 | arch/arm/boot/dts/bcm958525er.dts | 1 + |
| 16 | arch/arm/boot/dts/bcm958525xmc.dts | 1 + |
| 17 | arch/arm/boot/dts/bcm958622hr.dts | 1 + |
| 18 | arch/arm/boot/dts/bcm958623hr.dts | 1 + |
| 19 | arch/arm/boot/dts/bcm958625hr.dts | 1 + |
| 20 | arch/arm/boot/dts/bcm958625k.dts | 1 + |
| 21 | arch/arm/boot/dts/bcm988312hr.dts | 1 + |
| 22 | 9 files changed, 9 insertions(+) |
| 23 | |
| 24 | --- a/arch/arm/boot/dts/bcm-nsp.dtsi |
| 25 | +++ b/arch/arm/boot/dts/bcm-nsp.dtsi |
| 26 | @@ -308,6 +308,7 @@ |
| 27 | num-cs = <2>; |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <0>; |
| 30 | + status = "disabled"; |
| 31 | }; |
| 32 | |
| 33 | xhci: usb@29000 { |
| 34 | --- a/arch/arm/boot/dts/bcm958522er.dts |
| 35 | +++ b/arch/arm/boot/dts/bcm958522er.dts |
| 36 | @@ -130,6 +130,7 @@ |
| 37 | }; |
| 38 | |
| 39 | &qspi { |
| 40 | + status = "okay"; |
| 41 | bspi-sel = <0>; |
| 42 | flash: m25p80@0 { |
| 43 | #address-cells = <1>; |
| 44 | --- a/arch/arm/boot/dts/bcm958525er.dts |
| 45 | +++ b/arch/arm/boot/dts/bcm958525er.dts |
| 46 | @@ -130,6 +130,7 @@ |
| 47 | }; |
| 48 | |
| 49 | &qspi { |
| 50 | + status = "okay"; |
| 51 | bspi-sel = <0>; |
| 52 | flash: m25p80@0 { |
| 53 | #address-cells = <1>; |
| 54 | --- a/arch/arm/boot/dts/bcm958525xmc.dts |
| 55 | +++ b/arch/arm/boot/dts/bcm958525xmc.dts |
| 56 | @@ -146,6 +146,7 @@ |
| 57 | }; |
| 58 | |
| 59 | &qspi { |
| 60 | + status = "okay"; |
| 61 | bspi-sel = <0>; |
| 62 | flash: m25p80@0 { |
| 63 | #address-cells = <1>; |
| 64 | --- a/arch/arm/boot/dts/bcm958622hr.dts |
| 65 | +++ b/arch/arm/boot/dts/bcm958622hr.dts |
| 66 | @@ -134,6 +134,7 @@ |
| 67 | }; |
| 68 | |
| 69 | &qspi { |
| 70 | + status = "okay"; |
| 71 | bspi-sel = <0>; |
| 72 | flash: m25p80@0 { |
| 73 | #address-cells = <1>; |
| 74 | --- a/arch/arm/boot/dts/bcm958623hr.dts |
| 75 | +++ b/arch/arm/boot/dts/bcm958623hr.dts |
| 76 | @@ -138,6 +138,7 @@ |
| 77 | }; |
| 78 | |
| 79 | &qspi { |
| 80 | + status = "okay"; |
| 81 | bspi-sel = <0>; |
| 82 | flash: m25p80@0 { |
| 83 | #address-cells = <1>; |
| 84 | --- a/arch/arm/boot/dts/bcm958625hr.dts |
| 85 | +++ b/arch/arm/boot/dts/bcm958625hr.dts |
| 86 | @@ -150,6 +150,7 @@ |
| 87 | }; |
| 88 | |
| 89 | &qspi { |
| 90 | + status = "okay"; |
| 91 | bspi-sel = <0>; |
| 92 | flash: m25p80@0 { |
| 93 | #address-cells = <1>; |
| 94 | --- a/arch/arm/boot/dts/bcm958625k.dts |
| 95 | +++ b/arch/arm/boot/dts/bcm958625k.dts |
| 96 | @@ -149,6 +149,7 @@ |
| 97 | }; |
| 98 | |
| 99 | &qspi { |
| 100 | + status = "okay"; |
| 101 | bspi-sel = <0>; |
| 102 | flash: m25p80@0 { |
| 103 | #address-cells = <1>; |
| 104 | --- a/arch/arm/boot/dts/bcm988312hr.dts |
| 105 | +++ b/arch/arm/boot/dts/bcm988312hr.dts |
| 106 | @@ -138,6 +138,7 @@ |
| 107 | }; |
| 108 | |
| 109 | &qspi { |
| 110 | + status = "okay"; |
| 111 | bspi-sel = <0>; |
| 112 | flash: m25p80@0 { |
| 113 | #address-cells = <1>; |