blob: 39f0c392c511f11b03eae31044c9ecdc61300514 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 915fac07f053418d0ab9075af64da2872ca8a7f8 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3Date: Wed, 3 May 2023 14:16:10 +0200
4Subject: [PATCH] =?UTF-8?q?ARM:=20dts:=20BCM5301X:=20Relicense=20Rafa?=
5 =?UTF-8?q?=C5=82's=20code=20to=20the=20GPL=202.0+=20/=20MIT?=
6MIME-Version: 1.0
7Content-Type: text/plain; charset=UTF-8
8Content-Transfer-Encoding: 8bit
9
10All BCM5301X device DTS files use dual licensing. Try the same for SoC.
11Introduce a new .dtsi file with a proper SPDX tag.
12
13Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
14Link: https://lore.kernel.org/r/20230503121611.1629-1-zajec5@gmail.com
15Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
16---
17 MAINTAINERS | 1 +
18 arch/arm/boot/dts/bcm-ns.dtsi | 202 ++++++++++++++++++++++++++++++++
19 arch/arm/boot/dts/bcm5301x.dtsi | 192 +-----------------------------
20 3 files changed, 205 insertions(+), 190 deletions(-)
21 create mode 100644 arch/arm/boot/dts/bcm-ns.dtsi
22
23--- a/MAINTAINERS
24+++ b/MAINTAINERS
25@@ -3213,6 +3213,7 @@ M: Rafał Miłecki <zajec5@gmail.com>
26 M: bcm-kernel-feedback-list@broadcom.com
27 L: linux-arm-kernel@lists.infradead.org
28 S: Maintained
29+F: arch/arm/boot/dts/bcm-ns.dtsi
30 F: arch/arm/mach-bcm/bcm_5301x.c
31 F: arch/arm/boot/dts/bcm5301x*.dtsi
32 F: arch/arm/boot/dts/bcm470*
33--- /dev/null
34+++ b/arch/arm/boot/dts/bcm-ns.dtsi
35@@ -0,0 +1,202 @@
36+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
37+
38+#include <dt-bindings/clock/bcm-nsp.h>
39+#include <dt-bindings/gpio/gpio.h>
40+#include <dt-bindings/input/input.h>
41+#include <dt-bindings/interrupt-controller/irq.h>
42+#include <dt-bindings/interrupt-controller/arm-gic.h>
43+
44+/ {
45+ axi@18000000 {
46+ compatible = "brcm,bus-axi";
47+ reg = <0x18000000 0x1000>;
48+ ranges = <0x00000000 0x18000000 0x00100000>;
49+ #address-cells = <1>;
50+ #size-cells = <1>;
51+
52+ chipcommon: chipcommon@0 {
53+ reg = <0x00000000 0x1000>;
54+
55+ gpio-controller;
56+ #gpio-cells = <2>;
57+ };
58+
59+ pcie0: pcie@12000 {
60+ reg = <0x00012000 0x1000>;
61+ };
62+
63+ pcie1: pcie@13000 {
64+ reg = <0x00013000 0x1000>;
65+ };
66+
67+ usb2: usb2@21000 {
68+ reg = <0x00021000 0x1000>;
69+
70+ #address-cells = <1>;
71+ #size-cells = <1>;
72+ ranges;
73+
74+ interrupt-parent = <&gic>;
75+
76+ ehci: usb@21000 {
77+ #usb-cells = <0>;
78+
79+ compatible = "generic-ehci";
80+ reg = <0x00021000 0x1000>;
81+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
82+ phys = <&usb2_phy>;
83+
84+ #address-cells = <1>;
85+ #size-cells = <0>;
86+
87+ ehci_port1: port@1 {
88+ reg = <1>;
89+ #trigger-source-cells = <0>;
90+ };
91+
92+ ehci_port2: port@2 {
93+ reg = <2>;
94+ #trigger-source-cells = <0>;
95+ };
96+ };
97+
98+ ohci: usb@22000 {
99+ #usb-cells = <0>;
100+
101+ compatible = "generic-ohci";
102+ reg = <0x00022000 0x1000>;
103+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
104+
105+ #address-cells = <1>;
106+ #size-cells = <0>;
107+
108+ ohci_port1: port@1 {
109+ reg = <1>;
110+ #trigger-source-cells = <0>;
111+ };
112+
113+ ohci_port2: port@2 {
114+ reg = <2>;
115+ #trigger-source-cells = <0>;
116+ };
117+ };
118+ };
119+
120+ usb3: usb3@23000 {
121+ reg = <0x00023000 0x1000>;
122+
123+ #address-cells = <1>;
124+ #size-cells = <1>;
125+ ranges;
126+
127+ interrupt-parent = <&gic>;
128+
129+ xhci: usb@23000 {
130+ #usb-cells = <0>;
131+
132+ compatible = "generic-xhci";
133+ reg = <0x00023000 0x1000>;
134+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
135+ phys = <&usb3_phy>;
136+ phy-names = "usb";
137+
138+ #address-cells = <1>;
139+ #size-cells = <0>;
140+
141+ xhci_port1: port@1 {
142+ reg = <1>;
143+ #trigger-source-cells = <0>;
144+ };
145+ };
146+ };
147+ };
148+
149+ mdio: mdio@18003000 {
150+ compatible = "brcm,iproc-mdio";
151+ reg = <0x18003000 0x8>;
152+ #size-cells = <0>;
153+ #address-cells = <1>;
154+ };
155+
156+ dmu-bus@1800c000 {
157+ compatible = "simple-bus";
158+ ranges = <0 0x1800c000 0x1000>;
159+ #address-cells = <1>;
160+ #size-cells = <1>;
161+
162+ cru-bus@100 {
163+ compatible = "brcm,ns-cru", "simple-mfd";
164+ reg = <0x100 0x1a4>;
165+ ranges;
166+ #address-cells = <1>;
167+ #size-cells = <1>;
168+
169+ usb2_phy: phy@164 {
170+ compatible = "brcm,ns-usb2-phy";
171+ reg = <0x164 0x4>;
172+ brcm,syscon-clkset = <&cru_clkset>;
173+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
174+ clock-names = "phy-ref-clk";
175+ #phy-cells = <0>;
176+ };
177+
178+ cru_clkset: syscon@180 {
179+ compatible = "brcm,cru-clkset", "syscon";
180+ reg = <0x180 0x4>;
181+ };
182+
183+ pinctrl: pinctrl@1c0 {
184+ compatible = "brcm,bcm4708-pinmux";
185+ reg = <0x1c0 0x24>;
186+ reg-names = "cru_gpio_control";
187+
188+ spi-pins {
189+ groups = "spi_grp";
190+ function = "spi";
191+ };
192+
193+ pinmux_i2c: i2c-pins {
194+ groups = "i2c_grp";
195+ function = "i2c";
196+ };
197+
198+ pinmux_pwm: pwm-pins {
199+ groups = "pwm0_grp", "pwm1_grp",
200+ "pwm2_grp", "pwm3_grp";
201+ function = "pwm";
202+ };
203+
204+ pinmux_uart1: uart1-pins {
205+ groups = "uart1_grp";
206+ function = "uart1";
207+ };
208+ };
209+
210+ thermal: thermal@2c0 {
211+ compatible = "brcm,ns-thermal";
212+ reg = <0x2c0 0x10>;
213+ #thermal-sensor-cells = <0>;
214+ };
215+ };
216+ };
217+
218+ thermal-zones {
219+ cpu_thermal: cpu-thermal {
220+ polling-delay-passive = <0>;
221+ polling-delay = <1000>;
222+ coefficients = <(-556) 418000>;
223+ thermal-sensors = <&thermal>;
224+
225+ trips {
226+ cpu-crit {
227+ temperature = <125000>;
228+ hysteresis = <0>;
229+ type = "critical";
230+ };
231+ };
232+
233+ cooling-maps {
234+ };
235+ };
236+ };
237+};
238--- a/arch/arm/boot/dts/bcm5301x.dtsi
239+++ b/arch/arm/boot/dts/bcm5301x.dtsi
240@@ -8,11 +8,7 @@
241 * Licensed under the GNU/GPL. See COPYING for details.
242 */
243
244-#include <dt-bindings/clock/bcm-nsp.h>
245-#include <dt-bindings/gpio/gpio.h>
246-#include <dt-bindings/input/input.h>
247-#include <dt-bindings/interrupt-controller/irq.h>
248-#include <dt-bindings/interrupt-controller/arm-gic.h>
249+#include "bcm-ns.dtsi"
250
251 / {
252 #address-cells = <1>;
253@@ -149,12 +145,6 @@
254 };
255
256 axi@18000000 {
257- compatible = "brcm,bus-axi";
258- reg = <0x18000000 0x1000>;
259- ranges = <0x00000000 0x18000000 0x00100000>;
260- #address-cells = <1>;
261- #size-cells = <1>;
262-
263 #interrupt-cells = <1>;
264 interrupt-map-mask = <0x000fffff 0xffff>;
265 interrupt-map =
266@@ -228,108 +218,15 @@
267 <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
268 <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
269
270- chipcommon: chipcommon@0 {
271- reg = <0x00000000 0x1000>;
272-
273- gpio-controller;
274- #gpio-cells = <2>;
275+ chipcommon@0 {
276 interrupt-controller;
277 #interrupt-cells = <2>;
278 };
279
280- pcie0: pcie@12000 {
281- reg = <0x00012000 0x1000>;
282- };
283-
284- pcie1: pcie@13000 {
285- reg = <0x00013000 0x1000>;
286- };
287-
288 pcie2: pcie@14000 {
289 reg = <0x00014000 0x1000>;
290 };
291
292- usb2: usb2@21000 {
293- reg = <0x00021000 0x1000>;
294-
295- #address-cells = <1>;
296- #size-cells = <1>;
297- ranges;
298-
299- interrupt-parent = <&gic>;
300-
301- ehci: usb@21000 {
302- #usb-cells = <0>;
303-
304- compatible = "generic-ehci";
305- reg = <0x00021000 0x1000>;
306- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
307- phys = <&usb2_phy>;
308-
309- #address-cells = <1>;
310- #size-cells = <0>;
311-
312- ehci_port1: port@1 {
313- reg = <1>;
314- #trigger-source-cells = <0>;
315- };
316-
317- ehci_port2: port@2 {
318- reg = <2>;
319- #trigger-source-cells = <0>;
320- };
321- };
322-
323- ohci: usb@22000 {
324- #usb-cells = <0>;
325-
326- compatible = "generic-ohci";
327- reg = <0x00022000 0x1000>;
328- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
329-
330- #address-cells = <1>;
331- #size-cells = <0>;
332-
333- ohci_port1: port@1 {
334- reg = <1>;
335- #trigger-source-cells = <0>;
336- };
337-
338- ohci_port2: port@2 {
339- reg = <2>;
340- #trigger-source-cells = <0>;
341- };
342- };
343- };
344-
345- usb3: usb3@23000 {
346- reg = <0x00023000 0x1000>;
347-
348- #address-cells = <1>;
349- #size-cells = <1>;
350- ranges;
351-
352- interrupt-parent = <&gic>;
353-
354- xhci: usb@23000 {
355- #usb-cells = <0>;
356-
357- compatible = "generic-xhci";
358- reg = <0x00023000 0x1000>;
359- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
360- phys = <&usb3_phy>;
361- phy-names = "usb";
362-
363- #address-cells = <1>;
364- #size-cells = <0>;
365-
366- xhci_port1: port@1 {
367- reg = <1>;
368- #trigger-source-cells = <0>;
369- };
370- };
371- };
372-
373 gmac0: ethernet@24000 {
374 reg = <0x24000 0x800>;
375 };
376@@ -355,13 +252,6 @@
377 status = "disabled";
378 };
379
380- mdio: mdio@18003000 {
381- compatible = "brcm,iproc-mdio";
382- reg = <0x18003000 0x8>;
383- #size-cells = <0>;
384- #address-cells = <1>;
385- };
386-
387 mdio-mux@18003000 {
388 compatible = "mdio-mux-mmioreg", "mdio-mux";
389 mdio-parent-bus = <&mdio>;
390@@ -409,18 +299,7 @@
391 };
392
393 dmu-bus@1800c000 {
394- compatible = "simple-bus";
395- ranges = <0 0x1800c000 0x1000>;
396- #address-cells = <1>;
397- #size-cells = <1>;
398-
399 cru-bus@100 {
400- compatible = "brcm,ns-cru", "simple-mfd";
401- reg = <0x100 0x1a4>;
402- ranges;
403- #address-cells = <1>;
404- #size-cells = <1>;
405-
406 lcpll0: clock-controller@100 {
407 #clock-cells = <1>;
408 compatible = "brcm,nsp-lcpll0";
409@@ -440,53 +319,6 @@
410 "usbclk", "iprocfast",
411 "sata1", "sata2";
412 };
413-
414- usb2_phy: phy@164 {
415- compatible = "brcm,ns-usb2-phy";
416- reg = <0x164 0x4>;
417- brcm,syscon-clkset = <&cru_clkset>;
418- clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
419- clock-names = "phy-ref-clk";
420- #phy-cells = <0>;
421- };
422-
423- cru_clkset: syscon@180 {
424- compatible = "brcm,cru-clkset", "syscon";
425- reg = <0x180 0x4>;
426- };
427-
428- pinctrl: pinctrl@1c0 {
429- compatible = "brcm,bcm4708-pinmux";
430- reg = <0x1c0 0x24>;
431- reg-names = "cru_gpio_control";
432-
433- spi-pins {
434- groups = "spi_grp";
435- function = "spi";
436- };
437-
438- pinmux_i2c: i2c-pins {
439- groups = "i2c_grp";
440- function = "i2c";
441- };
442-
443- pinmux_pwm: pwm-pins {
444- groups = "pwm0_grp", "pwm1_grp",
445- "pwm2_grp", "pwm3_grp";
446- function = "pwm";
447- };
448-
449- pinmux_uart1: uart1-pins {
450- groups = "uart1_grp";
451- function = "uart1";
452- };
453- };
454-
455- thermal: thermal@2c0 {
456- compatible = "brcm,ns-thermal";
457- reg = <0x2c0 0x10>;
458- #thermal-sensor-cells = <0>;
459- };
460 };
461 };
462
463@@ -558,24 +390,4 @@
464 };
465 };
466 };
467-
468- thermal-zones {
469- cpu_thermal: cpu-thermal {
470- polling-delay-passive = <0>;
471- polling-delay = <1000>;
472- coefficients = <(-556) 418000>;
473- thermal-sensors = <&thermal>;
474-
475- trips {
476- cpu-crit {
477- temperature = <125000>;
478- hysteresis = <0>;
479- type = "critical";
480- };
481- };
482-
483- cooling-maps {
484- };
485- };
486- };
487 };