| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From e0d0cdff101b2f00ce1fd420522bd22bb6eebd9f Mon Sep 17 00:00:00 2001 | 
 | 2 | From: Robin Gong <yibin.gong@nxp.com> | 
 | 3 | Date: Wed, 13 Sep 2017 16:39:49 +0800 | 
 | 4 | Subject: [PATCH] MLK-16437: dma: fsl-edma-v3: fix kernel crash while edma | 
 | 5 |  interrupt trigger after channel disabled | 
 | 6 |  | 
 | 7 | edma interrupt may come after channel terminated, so should ignore | 
 | 8 | interrupts, else kernel crash as below since fsl_chan->edesc set | 
 | 9 | to NULL when terminate. | 
 | 10 |  | 
 | 11 |  606.837306] Unable to handle kernel NULL pointer dereference at virtual address 00000060 | 
 | 12 | [  606.845411] pgd = ffff000009295000 | 
 | 13 | [  606.848814] [00000060] *pgd=00000008bfffe003[  606.852906] , *pud=00000008bfffd003 | 
 | 14 |  , *pmd=0000000000000000[  606.858395] | 
 | 15 | [  606.859885] Internal error: Oops: 96000006 1 PREEMPT SMP | 
 | 16 | [  606.865460] Modules linked in: | 
 | 17 | [  606.868522] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.11-03371-g9904ea0 #42 | 
 | 18 | [  606.875832] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT) | 
 | 19 | [  606.881662] task: ffff000009120680 task.stack: ffff000009110000 | 
 | 20 | [  606.887588] PC is at fsl_edma3_tx_handler+0x50/0x150 | 
 | 21 |  | 
 | 22 | Signed-off-by: Robin Gong <yibin.gong@nxp.com> | 
 | 23 | Tested-by: Daniel Baluta <daniel.baluta@nxp.com> | 
 | 24 | (cherry picked from commit 625afad5a0900bc3e3288510f61647b1d891a5a4) | 
 | 25 | --- | 
 | 26 |  drivers/dma/fsl-edma-v3.c | 5 +++++ | 
 | 27 |  1 file changed, 5 insertions(+) | 
 | 28 |  | 
 | 29 | --- a/drivers/dma/fsl-edma-v3.c | 
 | 30 | +++ b/drivers/dma/fsl-edma-v3.c | 
 | 31 | @@ -689,6 +689,11 @@ static irqreturn_t fsl_edma3_tx_handler( | 
 | 32 |  	writel(1, base_addr + EDMA_CH_INT); | 
 | 33 |   | 
 | 34 |  	spin_lock(&fsl_chan->vchan.lock); | 
 | 35 | + | 
 | 36 | +	/* Ignore this interrupt since channel has been disabled already */ | 
 | 37 | +	if (!fsl_chan->edesc) | 
 | 38 | +		return IRQ_HANDLED; | 
 | 39 | + | 
 | 40 |  	if (!fsl_chan->edesc->iscyclic) { | 
 | 41 |  		fsl_edma3_get_realcnt(fsl_chan); | 
 | 42 |  		list_del(&fsl_chan->edesc->vdesc.node); |