| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001 |
| 2 | From: Xiangsheng Hou <xiangsheng.hou@mediatek.com> |
| 3 | Date: Thu, 6 Jun 2019 16:29:04 +0800 |
| 4 | Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629 |
| 5 | |
| 6 | Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> |
| 7 | --- |
| 8 | arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++ |
| 9 | arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++ |
| 10 | 3 files changed, 79 insertions(+) |
| 11 | |
| 12 | --- a/arch/arm/boot/dts/mt7629.dtsi |
| 13 | +++ b/arch/arm/boot/dts/mt7629.dtsi |
| 14 | @@ -258,6 +258,28 @@ |
| 15 | status = "disabled"; |
| 16 | }; |
| 17 | |
| 18 | + bch: ecc@1100e000 { |
| 19 | + compatible = "mediatek,mt7622-ecc"; |
| 20 | + reg = <0x1100e000 0x1000>; |
| 21 | + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; |
| 22 | + clocks = <&pericfg CLK_PERI_NFIECC_PD>; |
| 23 | + clock-names = "nfiecc_clk"; |
| 24 | + status = "disabled"; |
| 25 | + }; |
| 26 | + |
| 27 | + snfi: spi@1100d000 { |
| 28 | + compatible = "mediatek,mt7629-snfi"; |
| 29 | + reg = <0x1100d000 0x1000>; |
| 30 | + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; |
| 31 | + clocks = <&pericfg CLK_PERI_NFI_PD>, |
| 32 | + <&pericfg CLK_PERI_SNFI_PD>; |
| 33 | + clock-names = "nfi_clk", "spi_clk"; |
| 34 | + ecc-engine = <&bch>; |
| 35 | + #address-cells = <1>; |
| 36 | + #size-cells = <0>; |
| 37 | + status = "disabled"; |
| 38 | + }; |
| 39 | + |
| 40 | spi: spi@1100a000 { |
| 41 | compatible = "mediatek,mt7629-spi", |
| 42 | "mediatek,mt7622-spi"; |
| 43 | --- a/arch/arm/boot/dts/mt7629-rfb.dts |
| 44 | +++ b/arch/arm/boot/dts/mt7629-rfb.dts |
| 45 | @@ -276,6 +276,52 @@ |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | +&bch { |
| 50 | + status = "okay"; |
| 51 | +}; |
| 52 | + |
| 53 | +&snfi { |
| 54 | + pinctrl-names = "default"; |
| 55 | + pinctrl-0 = <&serial_nand_pins>; |
| 56 | + status = "okay"; |
| 57 | + |
| 58 | + spi_nand@0 { |
| 59 | + #address-cells = <1>; |
| 60 | + #size-cells = <1>; |
| 61 | + compatible = "spi-nand"; |
| 62 | + spi-max-frequency = <104000000>; |
| 63 | + reg = <0>; |
| 64 | + |
| 65 | + partitions { |
| 66 | + compatible = "fixed-partitions"; |
| 67 | + #address-cells = <1>; |
| 68 | + #size-cells = <1>; |
| 69 | + |
| 70 | + partition@0 { |
| 71 | + label = "Bootloader"; |
| 72 | + reg = <0x00000 0x0100000>; |
| 73 | + read-only; |
| 74 | + }; |
| 75 | + |
| 76 | + partition@100000 { |
| 77 | + label = "Config"; |
| 78 | + reg = <0x100000 0x0040000>; |
| 79 | + }; |
| 80 | + |
| 81 | + partition@140000 { |
| 82 | + label = "factory"; |
| 83 | + reg = <0x140000 0x0080000>; |
| 84 | + }; |
| 85 | + |
| 86 | + partition@1c0000 { |
| 87 | + label = "firmware"; |
| 88 | + reg = <0x1c0000 0x1000000>; |
| 89 | + }; |
| 90 | + |
| 91 | + }; |
| 92 | + }; |
| 93 | +}; |
| 94 | + |
| 95 | &spi { |
| 96 | pinctrl-names = "default"; |
| 97 | pinctrl-0 = <&spi_pins>; |