| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame] | 1 | --- a/drivers/crypto/inside-secure/safexcel.c |
| 2 | +++ b/drivers/crypto/inside-secure/safexcel.c |
| 3 | @@ -595,6 +595,14 @@ static int safexcel_hw_init(struct safex |
| 4 | val |= EIP197_MST_CTRL_TX_MAX_CMD(5); |
| 5 | writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL); |
| 6 | } |
| 7 | + /* |
| 8 | + * Set maximum number of TX commands to 2^4 = 16 for EIP97 HW2.1/HW2.3 |
| 9 | + */ |
| 10 | + else { |
| 11 | + val = 0; |
| 12 | + val |= EIP97_MST_CTRL_TX_MAX_CMD(4); |
| 13 | + writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL); |
| 14 | + } |
| 15 | |
| 16 | /* Configure wr/rd cache values */ |
| 17 | writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) | |
| 18 | --- a/drivers/crypto/inside-secure/safexcel.h |
| 19 | +++ b/drivers/crypto/inside-secure/safexcel.h |
| 20 | @@ -306,6 +306,7 @@ |
| 21 | #define EIP197_MST_CTRL_RD_CACHE(n) (((n) & 0xf) << 0) |
| 22 | #define EIP197_MST_CTRL_WD_CACHE(n) (((n) & 0xf) << 4) |
| 23 | #define EIP197_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 20) |
| 24 | +#define EIP97_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 4) |
| 25 | #define EIP197_MST_CTRL_BYTE_SWAP BIT(24) |
| 26 | #define EIP197_MST_CTRL_NO_BYTE_SWAP BIT(25) |
| 27 | #define EIP197_MST_CTRL_BYTE_SWAP_BITS GENMASK(25, 24) |