| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | Socionext UniPhier SPI controller driver |
| 2 | |
| 3 | UniPhier SoCs have SCSSI which supports SPI single channel. |
| 4 | |
| 5 | Required properties: |
| 6 | - compatible: should be "socionext,uniphier-scssi" |
| 7 | - reg: address and length of the spi master registers |
| 8 | - #address-cells: must be <1>, see spi-bus.txt |
| 9 | - #size-cells: must be <0>, see spi-bus.txt |
| 10 | - interrupts: a single interrupt specifier |
| 11 | - pinctrl-names: should be "default" |
| 12 | - pinctrl-0: pin control state for the default mode |
| 13 | - clocks: a phandle to the clock for the device |
| 14 | - resets: a phandle to the reset control for the device |
| 15 | |
| 16 | Example: |
| 17 | |
| 18 | spi0: spi@54006000 { |
| 19 | compatible = "socionext,uniphier-scssi"; |
| 20 | reg = <0x54006000 0x100>; |
| 21 | #address-cells = <1>; |
| 22 | #size-cells = <0>; |
| 23 | interrupts = <0 39 4>; |
| 24 | pinctrl-names = "default"; |
| 25 | pinctrl-0 = <&pinctrl_spi0>; |
| 26 | clocks = <&peri_clk 11>; |
| 27 | resets = <&peri_rst 11>; |
| 28 | }; |