Gitiles
Code Review Sign In
192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / arch / arm / boot / dts / asr1803-p403.dts
blob: ebc339fcf21434572b6b60839ef09b7c545f3ae6 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 ASR Technology Group Ltd.
4 */
5
6/dts-v1/;
7#include "asr1803.dtsi"
8
9/ {
10 model = "ASR 1803(FALCON) Board EVB";
11 compatible = "asr,1803-evb", "asr,1803";
12
13 memory {
14 reg = <0x00000000 0x10000000>;
15 };
16
17 firmware {
18 optee {
19 compatible = "linaro,optee-tz";
20 method = "smc";
21 };
22 };
23
24 soc {
25 axi@d4200000 { /* AXI */
26 usbphy: usbphy@d4207000 {
27 status = "okay";
28 };
29 udc: udc@d4208000 {
30 enable-vbuson-int = <0x1>;
31 /* no-acchg-det; */
32 status = "okay";
33 };
34 ehci: ehci@d4208100 {
35 status = "okay";
36 };
37 otg: otg@d4208100 {
38 status = "okay";
39 pinctrl-names = "default";
40 pinctrl-0 = <&otg_vbus_func>;
41 otg,use-gpio-vbus;
42 gpio-num = <122>;
43 };
44 eth0: asr-eth@0xd4281800 {
45 compatible = "asr,asr-eth";
46 pinctrl-names = "default", "rgmii-pins";
47 pinctrl-0 = <&emac_pmx_func0 &emac_pmx_func2 &emac_pmx_func3>;
48 pinctrl-1 = <&emac_pmx_func0 &emac_pmx_func1 &emac_pmx_func2 &emac_pmx_func3>;
49 reg = <0xd4281800 0x200>;
50 interrupts = <10 11>;
51 lpm-qos = <PM_QOS_CPUIDLE_BLOCK_AXI>;
52 clocks = <&soc_clocks ASR1803_CLK_EMAC>;
53 clock-names = "emac-clk";
54 status = "okay";
55
56 reset-gpio = <&gpio 23 0>;
57 reset-active-low;
58
59 reset-delays-us = <0 100000 100000>;
60
61 clk-tuning-enable;
62 /* clk-config(32bit)
63 *
64 * clk_sel(clk-config[23:16])
65 * RGMII:
66 * tx | clk_sel: 0 - from external RX clock
67 * 1 - from inverted external RX clock
68 * rx | clk_sel: 0 - from external RX clock
69 * 1 - from inverted external RX clock
70 *
71 * RMII:
72 * tx | clk_sel: 0 - RMII clock
73 * 1 - Inverted RMII clock
74 * rx | clk_sel: 0 - RMII clock
75 * 1 - Inverted RMII clock
76 *
77 */
78 tx-clk-config = <0x0>;
79 rx-clk-config = <0x0>;
80 3v3-enable = <1>; /* IO voltage, 1 - 3.3v, 0 - 1.8v */
81
82 phy-handle = <&phy3>;
83
84 /* enable fix link for ethernet switch */
85 /*
86 fixed-link {
87 speed = <100>;
88 full-duplex;
89 phy-mode = "rmii";
90 };
91 */
92
93 mdio: mdio-bus {
94 #address-cells = <0x1>;
95 #size-cells = <0x0>;
96 /* YT8521 10M/100M/100OM 1.8V RGMII PHY */
97 phy0: phy@0 {
98 compatible = "ethernet-phy-ieee802.3-c22";
99 device_type = "ethernet-phy";
100 reg = <0x0>; /* set phy address*/
101 phy-mode = "rgmii";
102 tx_rx_delay = <0xb 0x0>; /* 150ps per step*/
103 };
104
105 /* YT8512B 10M/100M 3.3V RMII PHY */
106 phy3: phy@3 {
107 compatible = "ethernet-phy-ieee802.3-c22";
108 device_type = "ethernet-phy";
109 reg = <0x3>; /* set phy address*/
110 phy-mode = "rmii";
111 };
112
113 /* IP175D 10M/100M 3.3V RMII SWITCH */
114 phy1: phy@1 {
115 compatible = "ethernet-phy-ieee802.3-c22";
116 device_type = "ethernet-phy";
117 reg = <0x1>; /* set phy address*/
118 phy-mode = "rmii";
119 };
120 };
121 };
122 qspi: spi@0xd420b000 {
123 asr,qspi-freq = <78000000>;
124 asr,qspi-tx-buf=<128>;
125 asr,qspi-rx-buf=<128>;
126 /* asr,qspi-ahb-enable=<0>; */
127 status = "okay";
128 };
129 /* SD card */
130 sdh0: sdh@d4280000 {
131 pinctrl-names = "default", "slow", "fast";
132 pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
133 pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
134 pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
135 /*
136 * Genernal use, juse set vmmc-supply and vqmmc-supply
137 * vmmc-supply = <&supply1>
138 * vqmmc-supply = <&supply2>
139 *
140 * For compatibility, to select one from two supply source
141 * vmmc-supply = <&supply1 &supply1_backup>;
142 * vqmmc-supply = <&supply2 &supply2_backup>;
143 * vmmc2-supply = <&supply1_backup &supply1>;
144 * vqmmc2-supply = <&supply2_backup &supply2>;
145 */
146 vmmc-supply = <&pm802ldo4 &vcc_sdh1>;
147 vqmmc-supply = <&pm802ldo6 &pm803ldo8>;
148 vmmc2-supply = <&vcc_sdh1 &pm802ldo4>;
149 vqmmc2-supply = <&pm803ldo8 &pm802ldo6>;
150 bus-width = <4>;
151 no-mmc;
152 no-sdio;
153 non-removable;
154 broken-cd;
155 wp-inverted;
156 asr,sdh-pm-runtime-en;
157 asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>;
158 asr,sdh-quirks = <(
159 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
160 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
161 )>;
162 asr,sdh-quirks2 = <(
163 SDHCI_QUIRK2_SET_AIB_MMC |
164 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
165 )>;
166 /* prop "sdh-dtr-data":
167 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
168 asr,sdh-dtr-data =
169 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
170 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
171 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
172 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>,
173 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
174 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>;
175 status = "okay";
176 };
177
178 /* SDIO */
179 sdh1: sdh@d4280800 {
180 pinctrl-names = "default", "fast", "sleep";
181 pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2 &sdh1_pmx_func3>;
182 pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast &sdh1_pmx_func3>;
183 pinctrl-2 = <&sdh1_pmx_edge_wakeup>;
184 bus-width = <4>;
185 no-mmc;
186 no-sd;
187 non-removable;
188 keep-power-in-suspend;
189 enable-sdio-wakeup;
190 /* clk-scaling-config:
191 <up_threshold down_threshold polling_interval> */
192 clk-scaling-config = <25 12 200>;
193 min-ddr-qos = <156000 312000 400000>;
194 asr,sdh-pm-runtime-en;
195 asr,sdh-quirks = <(
196 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
197 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
198 )>;
199 asr,sdh-quirks2 = <(
200 SDHCI_QUIRK2_NO_TIMER_RETUNING |
201 SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
202 SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
203 )>;
204 asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>;
205 asr,sdh-host-caps2 = <(
206 MMC_CAP2_ONLY_1_8V |
207 MMC_CAP2_DISABLE_PROBE_CDSCAN |
208 MMC_CAP2_CLK_SCALE |
209 MMC_CAP2_BUS_CLK_NO_SCALE
210 )>;
211 /* prop "sdh-dtr-data":
212 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
213 asr,sdh-dtr-data =
214 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
215 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>,
216 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
217 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>,
218 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
219 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
220 status = "okay";
221 };
222 };
223
224 apb@d4000000 {
225 mfpr: mfpr@d401e000 {
226 status = "okay";
227 };
228 timer0: timer@d4014000 {
229 status = "okay";
230 };
231 uart1: uart@d4017000 { /* nezhas evb use ap uart */
232 pinctrl-names = "default","sleep";
233 pinctrl-0 = <&uart1_pmx_func1 &uart1_pmx_func2>;
234 pinctrl-1 = <&uart1_pmx_func1_sleep &uart1_pmx_func2>;
235 edge-wakeup-gpio = <&gpio 29 0>; /* GPIO29: AP UART rx pin */
236 status = "okay";
237 };
238 uart2: uart@d4036000 {
239 pinctrl-names = "default";
240 status = "okay";
241 };
242 rtc: rtc@d4010000 {
243 status = "okay";
244 };
245 pmx: pinmux@d401e000 {
246 /* pin base = base_addr / 4, nr pins & gpio function */
247 pinctrl-single,gpio-range = <
248 /*
249 * GPIO number is hardcoded for range at here.
250 * In gpio chip, GPIO number is not hardcoded for range.
251 * Since one gpio pin may be routed to multiple pins,
252 * define these gpio range in pxa910-dkb.dts not pxa910.dtsi.
253 */
254 /*&range 80 4 0 */ /* GPIO25 ~ GPIO28 */
255 &range 55 32 0 /* GPIO0 ~ GPIO31 */
256 &range 87 32 0 /* GPIO32 ~ GPIO63 */
257 &range 119 32 0 /* GPIO64 ~ GPIO95 */
258 &range 151 32 0 /* GPIO96 ~ GPIO127 */
259 >;
260
261 ssp0_pmx_func: ssp0_pmx_func {
262 pinctrl-single,pins = <
263 GPIO36 AF1 /* TXD */
264 GPIO35 AF1 /* RXD */
265 GPIO34 AF1 /* FRM */
266 /*GPIO34 AF0*/ /* FRM *//* DXS101 Use the config of Cs-gpios */
267 GPIO33 AF1 /* SCLK */
268 >;
269 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
270 };
271 lcd_bl_func: lcd_bl_func {
272 pinctrl-single,pins = <
273 VCXO_OUT AF1 /* GPIO126, lcd bl */
274 GPIO24 AF0 /* reset */
275 GPIO22 AF0 /* lcd d/c */
276 >;
277 MFP_DEFAULT;
278 };
279 uart1_pmx_func1: uart1_pmx_func1 {
280 pinctrl-single,pins = <
281 GPIO29 AF1
282 >;
283 MFP_DEFAULT;
284 };
285 uart1_pmx_func2: uart1_pmx_func2 {
286 pinctrl-single,pins = <
287 GPIO30 AF1
288 >;
289 MFP_DEFAULT;
290 };
291 uart1_pmx_func1_sleep: uart1_pmx_func1_sleep {
292 pinctrl-single,pins = <
293 GPIO29 AF1
294 >;
295 DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
296 };
297 twsi0_pmx_func: twsi0_pmx_func {
298 pinctrl-single,pins = <
299 GPIO49 AF1
300 GPIO50 AF1
301 >;
302 MFP_LPM_FLOAT;
303 };
304 twsi0_pmx_gpio: twsi0_pmx_gpio {
305 pinctrl-single,pins = <
306 GPIO49 AF0
307 GPIO50 AF0
308 >;
309 MFP_LPM_FLOAT;
310 };
311 twsi1_pmx_func: twsi1_pmx_func {
312 pinctrl-single,pins = <
313 GPIO10 AF1
314 GPIO11 AF1
315 >;
316 MFP_LPM_FLOAT;
317 };
318 twsi1_pmx_gpio: twsi1_pmx_gpio {
319 pinctrl-single,pins = <
320 GPIO10 AF0
321 GPIO11 AF0
322 >;
323 MFP_LPM_FLOAT;
324 };
325 /* no pull, no LPM */
326 dvc_pmx_func: dvc_pmx_func {
327 /* hw-dvc */
328 pinctrl-single,pins = <
329 TDS_DIO0 AF0
330 TDS_DIO1 AF0
331 >;
332 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
333 };
334
335 leds_pmx_func: leds_pmx_func {
336 pinctrl-single,pins = <
337 DF_IO10 AF1
338 DF_IO11 AF1
339 DF_IO12 AF1
340 >;
341 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
342 };
343
344 sd_ldo_en: sd_ldo_en {
345 pinctrl-single,pins = <
346 GPIO12 AF0
347 >;
348 MFP_PULL_DOWN;
349 };
350 sdh0_pmx_func1: sdh0_pmx_func1 {
351 pinctrl-single,pins = <
352 MMC1_DAT3 AF0
353 MMC1_DAT2 AF0
354 MMC1_DAT1 AF0
355 MMC1_DAT0 AF0
356 MMC1_CMD AF0
357 >;
358 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
359 };
360 sdh0_pmx_func2: sdh0_pmx_func2 {
361 pinctrl-single,pins = <
362 MMC1_CLK AF0
363 >;
364 DS_MEDIUM;PULL_NONE;EDGE_NONE;
365 };
366 sdh0_pmx_func3: sdh0_pmx_func3 {
367 pinctrl-single,pins = <
368 MMC1_CD AF0
369 >;
370 MFP_PULL_UP;
371 };
372 sdh0_pmx_func1_slow: sdh0_pmx_func1_slow {
373 pinctrl-single,pins = <
374 MMC1_DAT3 AF0
375 MMC1_DAT2 AF0
376 MMC1_DAT1 AF0
377 MMC1_DAT0 AF0
378 MMC1_CMD AF0
379 >;
380 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
381 };
382 sdh0_pmx_func2_slow: sdh0_pmx_func2_slow {
383 pinctrl-single,pins = <
384 MMC1_CLK AF0
385 >;
386 DS_FAST0;PULL_NONE;EDGE_NONE;
387 };
388 sdh0_pmx_func1_fast: sdh0_pmx_func1_fast {
389 pinctrl-single,pins = <
390 MMC1_DAT3 AF0
391 MMC1_DAT2 AF0
392 MMC1_DAT1 AF0
393 MMC1_DAT0 AF0
394 MMC1_CMD AF0
395 >;
396 DS_FAST1;PULL_NONE;EDGE_NONE;SL_NORMAL;
397 };
398 sdh0_pmx_func2_fast: sdh0_pmx_func2_fast {
399 pinctrl-single,pins = <
400 MMC1_CLK AF0
401 >;
402 DS_FAST1;PULL_NONE;EDGE_NONE;
403 };
404 sdh1_pmx_func1_fast: sdh1_pmx_func1_fast {
405 pinctrl-single,pins = <
406 TDS_DIO13 AF0 /* WLAN_DAT3 */
407 TDS_DIO14 AF0 /* WLAN_DAT2 */
408 TDS_DIO15 AF0 /* WLAN_DAT1 */
409 TDS_DIO16 AF0 /* WLAN_DAT0 */
410 TDS_DIO17 AF0 /* WLAN_CMD */
411 >;
412 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
413 };
414 sdh1_pmx_func2_fast: sdh1_pmx_func2_fast {
415 pinctrl-single,pins = <
416 TDS_DIO18 AF0 /* WLAN_CLK */
417 >;
418 DS_FAST0;PULL_DOWN;EDGE_NONE;SL_NORMAL;
419 };
420 sdh1_pmx_func1: sdh1_pmx_func1 {
421 pinctrl-single,pins = <
422 TDS_DIO13 AF0 /* WLAN_DAT3 */
423 TDS_DIO14 AF0 /* WLAN_DAT2 */
424 TDS_DIO15 AF0 /* WLAN_DAT1 */
425 TDS_DIO16 AF0 /* WLAN_DAT0 */
426 TDS_DIO17 AF0 /* WLAN_CMD */
427 >;
428 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
429 };
430 sdh1_pmx_func2: sdh1_pmx_func2 {
431 pinctrl-single,pins = <
432 TDS_DIO18 AF0 /* WLAN_CLK */
433 >;
434 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_LOW;
435 };
436 sdh1_pmx_func3: sdh1_pmx_func3 {
437 pinctrl-single,pins = <
438 GPIO10 AF0 /* VCXO_REQ AF1 WLAN_WAKE_HOST */
439 >;
440 MFP_PULL_DOWN;
441 };
442 sdh1_pmx_edge_wakeup: sdh1_pmx_edge_wakeup {
443 pinctrl-single,pins = <
444 GPIO10 AF0 /* VCXO_REQ AF1 */
445 >;
446 DS_MEDIUM;PULL_DOWN;EDGE_RISE;SL_NORMAL;
447 };
448 sdh1_pmx_pd_rst_off: sdh1_pmx_pd_rst_off {
449 pinctrl-single,pins = <
450 GPIO11 AF0 /* GPIO31 AF0 WLAN_PDn */
451 GPIO13 AF0 /* GPIO32 AF0 LDO_EN */
452 >;
453 MFP_PULL_DOWN;
454 };
455 sdh1_pmx_pd_rst_on: sdh1_pmx_pd_rst_on {
456 pinctrl-single,pins = <
457 GPIO11 AF0 /* GPIO31 AF0 WLAN_PDn */
458 GPIO13 AF0 /* GPIO32 AF0 LDO_EN */
459 >;
460 MFP_PULL_UP;
461 };
462 eta6005_charger_en: eta6005_charger_en {
463 pinctrl-single,pins = <
464 GPIO08 AF0
465 >;
466 MFP_PULL_UP;
467 };
468 eta6005_charger_stat: eta6005_charger_stat {
469 pinctrl-single,pins = <
470 GPIO04 AF0
471 >;
472 MFP_DEFAULT;
473 };
474
475 otg_vbus_func: otg_vbus_func {
476 pinctrl-single,pins = <
477 VBUS_DRV AF1 /* GPIO[122] */
478 >;
479 DS_MEDIUM;PULL_DOWN;EDGE_NONE;
480 };
481
482 emac_pmx_func0: emac_pmx_func0 {
483 pinctrl-single,pins = <
484 GPIO00 AF1 /* GMAC1_RX_DV */
485 GPIO01 AF1 /* GMAC1_RX_D0 */
486 GPIO02 AF1 /* GMAC1_RX_D1 */
487 GPIO03 AF1 /* GMAC1_RX_CLK */
488 /* GPIO04 AF1 GMAC1_RX_D2 */
489 /* GPIO05 AF1 GMAC1_RX_D3 */
490 GPIO06 AF1 /* GMAC1_TX_D0 */
491 GPIO07 AF1 /* GMAC1_TX_D1 */
492 /* GPIO12 AF1 GMAC1_TX_CLK */
493 /* GPIO13 AF1 GMAC1_TX_D2 */
494 /* GPIO14 AF1 GMAC1_TX_D3 */
495 GPIO15 AF1 /* GMAC1_TX_EN */
496 GPIO16 AF1 /* GMAC1_TX_MDC */
497 /* GPIO17 AF1 GMAC1_TX_MDIO */
498 >;
499 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
500 };
501 emac_pmx_func1: emac_pmx_func1 {
502 pinctrl-single,pins = <
503 GPIO04 AF1 /* GMAC1_RX_D2 */
504 GPIO05 AF1 /* GMAC1_RX_D3 */
505 GPIO12 AF1 /* GMAC1_TX_CLK */
506 GPIO13 AF1 /* GMAC1_TX_D2 */
507 GPIO14 AF1 /* GMAC1_TX_D3 */
508 >;
509 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
510 };
511 emac_pmx_func2: emac_pmx_func2 {
512 pinctrl-single,pins = <
513 GPIO17 AF1 /* GMAC1_TX_MDIO */
514 GPIO18 AF1 /* GMAC1_TX_INT_N */
515 >;
516 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
517 };
518 emac_pmx_func3: emac_pmx_func3 {
519 pinctrl-single,pins = <
520 GPIO23 AF0 /* RESET */
521 /* GPIO54 AF0 LDO_EN */
522 >;
523 DS_SLOW0;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
524 };
525 usim1_pmx_func: usim1_pmx_func {
526 pinctrl-single,pins = <
527 GPIO19 AF0
528 >;
529 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
530 };
531 usim1_pmx_func_sleep: usim1_pmx_func_sleep {
532 pinctrl-single,pins = <
533 GPIO19 AF0
534 >;
535 DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
536 };
537 gpiokey_pmx_func: gpiokey_pmx_func {
538 pinctrl-single,pins = <
539 GPIO09 AF0
540 >;
541 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
542 };
543 };
544
545 ssp0: spi@d401b000 {
546 status = "okay";
547 pinctrl-names = "default";
548 pinctrl-0 = <&ssp0_pmx_func>;
549 asr,spi-inc-mode;
550 /* asr,spi-pio-interval = <6>; */
551#ifdef CONFIG_FB_SPI_LCD
552 /* this enhancemnet feature is not suitable for
553 3 line 9bits spi lcd. */
554 /* asr,ssp-enhancement; */
555
556 lcd: spidev@0 {
557 #address-cells = <1>;
558 #size-cells = <1>;
559 compatible = "spilcd";
560 pinctrl-names = "default";
561 pinctrl-0 = <&lcd_bl_func>;
562 reg = <0>;
563 /* ST7735: need to set spi-max-frequency to 26M
564 * ST7789V: can set spi-max-frequency to 52M
565 */
566 spi-max-frequency = <26000000>;
567 xres = <128>;
568 yres = <128>;
569 bits = <8>; /* 8: 4line, 9: 3line */
570 rst_gpio = <&gpio 24 0>;
571 bl_gpio = <&gpio 126 0>;
572 rs_gpio = <&gpio 22 0>;
573 /* if comment the following statement, it means
574 * the avdd is sit on the "always-on" ldo.
575 */
576 /* avdd-supply = <&LDO1>; */
577 };
578#endif
579 };
580 twsi0: i2c@d4011000 {
581 status= "okay";
582
583 /*
584 pmic4: 88pm805@38 {
585 compatible = "marvell,88pm805";
586 reg = <0x38>;
587 };
588 */
589 };
590
591 twsi2: i2c@d4037000 {
592 status = "okay";
593
594 pmic5: pm802@0 {
595 compatible = "asr,pm802";
596 reg = <0x00>;
597 interrupts = <4>;
598 interrupt-parent = <&intc>;
599 interrupt-controller;
600 #interrupt-cells = <1>;
601 chg_irq_from_exton;
602 battery {
603 compatible = "asr,pm802-bat";
604 status = "disabled";
605
606 online-gpadc = <1>;
607 temperature-gpadc = <1>;
608
609 hi-volt-online = <1150>; /* mV */
610 lo-volt-online = <20>; /* mV */
611 hi-volt-temp = <1150>; /* mV */
612 lo-volt-temp = <200>; /* mV */
613
614 sw-fg-use-ntc;
615 full-capacity = <2050>; /* mAh */
616 r1-resistor = <40>; /* mohm */
617 r2-resistor = <30>; /* mohm */
618 rs-resistor = <120>; /* mohm */
619 roff-resistor = <0>; /* mohm */
620 roff-initial-resistor = <0>; /* mohm */
621
622 times-in-zero-degree = <1>;
623 offset-in-zero-degree = <0>;
624
625 times-in-ten-degree = <2>;
626 offset-in-ten-degree = <100>;
627
628 power-off-threshold = <3350>; /* mV */
629 safe-power-off-threshold = <3200>; /* mV */
630
631 online-gp-bias-curr = <11>; /* uA */
632
633 soc-ramp-up-interval = <150>; /* s */
634 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
635 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
636 ntc-table-size = <88>;
637 stop-chg-for-vbatmeas;
638 /* -24C, -23C, ..., 62C, 63C */
639 ntc-table = <
640 89680 85130 80840 76790 72970 69360 65960 62740
641 59700 56830 54130 51530 49100 46800 44610 42550
642 40590 38730 36970 35300 33710 32210 30780 29420
643 28130 26910 25750 24640 23590 22580 21630 20720
644 19860 19030 18250 17500 16790 16110 15460 14840
645 14250 13690 13150 12640 12150 11680 11230 10800
646 10390 10000 9620 9270 8920 8590 8280 7980
647 7690 7410 7150 6890 6650 6410 6190 5970
648 5770 5570 5380 5190 5020 4850 4680 4530
649 4380 4230 4100 3960 3830 3710 3590 3480
650 3370 3260 3160 3060 2960 2870 2780 2700
651 >;
652 };
653 usb {
654 status = "disabled";
655 vbus_gpio = <0xff>; /* set_vbus */
656 id-gpadc = <0xff>; /* usb-id */
657 vchg-from-exton = <1>;
658 vbus-detect = <1>; /* vbus-irq */
659 get-vbus = <1>; /* get-vbus */
660 };
661 };
662 pmic6: pm803@30 {
663 compatible = "asr,pm803";
664 reg = <0x30>;
665 interrupts = <4>;
666 interrupt-parent = <&intc>;
667 interrupt-controller;
668 #interrupt-cells = <1>;
669 chg_irq_from_exton;
670 battery {
671 compatible = "asr,pm803-bat";
672 status = "disabled";
673
674 online-gpadc = <1>;
675 temperature-gpadc = <1>;
676
677 hi-volt-online = <1150>; /* mV */
678 lo-volt-online = <20>; /* mV */
679 hi-volt-temp = <1150>; /* mV */
680 lo-volt-temp = <200>; /* mV */
681
682 sw-fg-use-ntc;
683 full-capacity = <2050>; /* mAh */
684 r1-resistor = <40>; /* mohm */
685 r2-resistor = <30>; /* mohm */
686 rs-resistor = <120>; /* mohm */
687 roff-resistor = <0>; /* mohm */
688 roff-initial-resistor = <0>; /* mohm */
689
690 times-in-zero-degree = <1>;
691 offset-in-zero-degree = <0>;
692
693 times-in-ten-degree = <2>;
694 offset-in-ten-degree = <100>;
695
696 power-off-threshold = <3350>; /* mV */
697 safe-power-off-threshold = <3200>; /* mV */
698
699 online-gp-bias-curr = <11>; /* uA */
700
701 soc-ramp-up-interval = <150>; /* s */
702 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
703 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
704 ntc-table-size = <88>;
705 stop-chg-for-vbatmeas;
706 /* -24C, -23C, ..., 62C, 63C */
707 ntc-table = <
708 89680 85130 80840 76790 72970 69360 65960 62740
709 59700 56830 54130 51530 49100 46800 44610 42550
710 40590 38730 36970 35300 33710 32210 30780 29420
711 28130 26910 25750 24640 23590 22580 21630 20720
712 19860 19030 18250 17500 16790 16110 15460 14840
713 14250 13690 13150 12640 12150 11680 11230 10800
714 10390 10000 9620 9270 8920 8590 8280 7980
715 7690 7410 7150 6890 6650 6410 6190 5970
716 5770 5570 5380 5190 5020 4850 4680 4530
717 4380 4230 4100 3960 3830 3710 3590 3480
718 3370 3260 3160 3060 2960 2870 2780 2700
719 >;
720 };
721 usb {
722 status = "disabled";
723 vbus_gpio = <0xff>; /* set_vbus */
724 id-gpadc = <0xff>; /* usb-id */
725 vchg-from-exton = <1>;
726 vbus-detect = <1>; /* vbus-irq */
727 get-vbus = <1>; /* get-vbus */
728 };
729 };
730 };
731 };
732 };
733
734 vcc_sdh1: sd-regulator {
735 compatible = "regulator-fixed";
736 pinctrl-names = "default";
737 pinctrl-0 = <&sd_ldo_en>;/*conflict with audio-pa*/
738 regulator-name = "SDH1 VCC";
739 regulator-min-microvolt = <3300000>;
740 regulator-max-microvolt = <3300000>;
741 gpio = <&gpio 12 0>;/*conflict with audio-pa*/
742 enable-active-high;
743 };
744
745 asr-rfkill {
746 compatible = "asr,asr-rfkill";
747 pinctrl-names = "off", "on";
748 pinctrl-0 = <&sdh1_pmx_pd_rst_off>;
749 pinctrl-1 = <&sdh1_pmx_pd_rst_on>;
750 sd-host = <&sdh1>;
751 pd-gpio = <&gpio 11 0>;
752#if 1 /* ASR5803 RTL8192ES */
753 3v3-ldo-gpio = <&gpio 13 0>;
754 edge-wakeup-gpio = <&gpio 10 0>;
755#else /* AIC8800DW/AIC8800D80 */
756 host-wakeup-wlan-gpio = <&gpio 13 0>;
757 wlan-wakeup-host-gpio = <&gpio 10 0>;
758 rst-gpio = <&gpio 14 0>;
759#endif
760 status = "okay";
761 };
762
763 usim1: usim {
764 compatible = "asr,usim1";
765 pinctrl-names = "default", "sleep";
766 pinctrl-0 = <&usim1_pmx_func>;
767 pinctrl-1 = <&usim1_pmx_func_sleep>;
768 edge_detect_gpio = <19>; /* GPIO19: SIM detect pin */
769 status = "okay";
770 };
771
772 gpio_keys {
773 compatible = "gpio-keys";
774 #address-cells = <1>;
775 #size-cells = <0>;
776 /* autorepeat; */
777 pinctrl-names = "default";
778 pinctrl-0 = <&gpiokey_pmx_func>;
779 button@1 {
780 label = "qrcode-key";
781 linux,code = <139>; /* KEY_MENU, refer to linux/input.h */
782 /* NOTE:
783 * We use the FORCE DOWNLOAD key to implement the qrcode key in DKB.
784 * Customer SHOULD change it to any other gpios.
785 * Because user may do the misoperation that
786 * powerup with FDL key pressed,
787 * then the borad will enter force download mode.
788 */
789 gpios = <&gpio 9 1>;
790 gpio-key,wakeup;
791 };
792 };
793};
794#include "asr_pm802.dtsi"
795#include "asr_pm803.dtsi"
796#include "asr1803_spinor_layout.dtsi"