Gitiles
Code Review Sign In
192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / arch / arm / boot / dts / asr1806-p301-posl.dts
blob: b8bc88cecacfd51f29662688dd44e183ce5336c7 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 ASR Microelectronics Co., Ltd.
4 */
5
6/dts-v1/;
7#include "asr1806.dtsi"
8
9/ {
10 model = "ASR 1806(FALCON-T) Board EVB";
11 compatible = "asr,1803-evb", "asr,1803";
12
13 chosen {
14 bootargs = "root=/dev/mtdblock5 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200 mem=128M";
15 };
16
17 memory {
18 reg = <0x00000000 0x10000000>;
19 };
20
21 firmware {
22 optee {
23 compatible = "linaro,optee-tz";
24 method = "smc";
25 };
26 };
27
28 soc {
29 axi@d4200000 { /* AXI */
30 lcd: lcd@d420a000 {
31 compatible = "asr,fb";
32 pinctrl-names = "default";
33 pinctrl-0 = <&lcd_pmx_func>;
34 interrupts = <51>;
35 lpm-qos = <PM_QOS_CPUIDLE_BLOCK_AXI>;
36 reg = <0xd420a000 0x800>;
37 //avdd-supply = <&ldo1>;
38 status = "okay";
39 };
40
41 backlight: pwm_bl {
42 compatible = "pwm-backlight";
43 pwms = <&pwm2 50000>;
44 brightness-levels = <0 4 8 16 32 64 128 255>;
45 default-brightness-level = <6>;
46 status = "okay";
47 };
48
49 usbphy: usbphy@d4207000 {
50 status = "okay";
51 };
52#ifdef CONFIG_USB_DWC2_ASR_OTG /* otg mode */
53 usb: usb@c0000000 {
54 dr_mode = "otg";
55 pinctrl-names = "default","sleep";
56 pinctrl-0 = <&usb_id_pinmux &usb_host_pinmux>;
57 pinctrl-1 = <&usb_id_pinmux_slp &usb_host_pinmux>;
58 usbid_gpio = <99>;
59 edge_detect_gpio = <99>;
60 otg,use-gpio-vbus;
61 gpio-num = <122>;
62 status = "okay";
63 };
64#else
65 usb: usb@c0000000 {
66 status = "okay";
67 };
68#endif
69
70
71 qspi: spi@0xd420b000 {
72 asr,qspi-freq = <78000000>;
73 status = "okay";
74 };
75 /* SD card */
76 sdh0: sdh@d4280000 {
77 pinctrl-names = "default", "slow", "fast";
78 pinctrl-0 = <&sdh0_pmx_func1 &sdh0_pmx_func2 &sdh0_pmx_func3>;
79 pinctrl-1 = <&sdh0_pmx_func1_slow &sdh0_pmx_func2_slow &sdh0_pmx_func3>;
80 pinctrl-2 = <&sdh0_pmx_func1_fast &sdh0_pmx_func2_fast &sdh0_pmx_func3>;
81 /*
82 * Genernal use, juse set vmmc-supply and vqmmc-supply
83 * vmmc-supply = <&supply1>
84 * vqmmc-supply = <&supply2>
85 *
86 * For compatibility, to select one from two supply source
87 * vmmc-supply = <&supply1 &supply1_backup>;
88 * vqmmc-supply = <&supply2 &supply2_backup>;
89 * vmmc2-supply = <&supply1_backup &supply1>;
90 * vqmmc2-supply = <&supply2_backup &supply2>;
91 */
92 vmmc-supply = <&vcc_sdh1>;
93 vqmmc-supply = <&pm802ldo6>;
94#ifndef CONFIG_ASR_DSDS
95 vmmc2-supply = <&vcc_sdh1 &pm802ldo4>;
96 vqmmc2-supply = <&pm803ldo8 &pm802ldo6>;
97#endif
98 bus-width = <4>;
99 no-mmc;
100 no-sdio;
101 non-removable;
102 broken-cd;
103 wp-inverted;
104 asr,sdh-pm-runtime-en;
105 asr,sdh-host-caps-disable = <(MMC_CAP_UHS_SDR104)>;
106 asr,sdh-quirks = <(
107 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
108 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
109 )>;
110 asr,sdh-quirks2 = <(
111 SDHCI_QUIRK2_SET_AIB_MMC |
112 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
113 )>;
114 /* prop "sdh-dtr-data":
115 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
116 asr,sdh-dtr-data =
117 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
118 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 0>,
119 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
120 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_104M PXA_SDH_DTR_208M 0 0 0 0>,
121 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
122 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_104M 0 0 0 0>;
123 status = "okay";
124 };
125
126 /* SDIO */
127 sdh1: sdh@d4280800 {
128 pinctrl-names = "default", "fast", "sleep";
129 pinctrl-0 = <&sdh1_pmx_func1 &sdh1_pmx_func2 &sdh1_pmx_func3>;
130 pinctrl-1 = <&sdh1_pmx_func1_fast &sdh1_pmx_func2_fast &sdh1_pmx_func3>;
131 pinctrl-2 = <&sdh1_pmx_edge_wakeup>;
132 bus-width = <4>;
133 no-mmc;
134 no-sd;
135 non-removable;
136 keep-power-in-suspend;
137 enable-sdio-wakeup;
138 /* clk-scaling-config:
139 <up_threshold down_threshold polling_interval> */
140 clk-scaling-config = <25 12 200>;
141 min-ddr-qos = <156000 312000 400000>;
142 asr,sdh-pm-runtime-en;
143 asr,sdh-quirks = <(
144 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
145 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
146 )>;
147 asr,sdh-quirks2 = <(
148 SDHCI_QUIRK2_NO_TIMER_RETUNING |
149 SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
150 SDHCI_QUIRK2_BASE_CLOCK_ALWAYS_ON
151 )>;
152 asr,sdh-pm-caps = <(MMC_PM_KEEP_POWER)>;
153 asr,sdh-host-caps2 = <(
154 MMC_CAP2_ONLY_1_8V |
155 MMC_CAP2_DISABLE_PROBE_CDSCAN |
156 MMC_CAP2_CLK_SCALE |
157 MMC_CAP2_BUS_CLK_NO_SCALE
158 )>;
159 /* prop "sdh-dtr-data":
160 <timing preset_rate src_rate tx_delay rx_delay tx_dline_reg rx_dline_reg> */
161 asr,sdh-dtr-data =
162 <PXA_MMC_TIMING_LEGACY PXA_SDH_DTR_26M PXA_SDH_DTR_104M 0 0 0 0>,
163 <PXA_MMC_TIMING_SD_HS PXA_SDH_DTR_45M PXA_SDH_DTR_89M 0 0 0 0>,
164 <PXA_MMC_TIMING_UHS_DDR50 PXA_SDH_DTR_52M PXA_SDH_DTR_104M 0 0 0 3>,
165 <PXA_MMC_TIMING_UHS_SDR50 PXA_SDH_DTR_83M PXA_SDH_DTR_83M 0 0 0 3>,
166 <PXA_MMC_TIMING_UHS_SDR104 PXA_SDH_DTR_208M PXA_SDH_DTR_208M 0 0 0 0>,
167 <PXA_MMC_TIMING_MAX PXA_SDH_DTR_PS_NONE PXA_SDH_DTR_89M 0 0 0 0>;
168 status = "okay";
169 };
170 pcie0: pcie@0xd4288000{
171 reset-gpios = <&gpio 42 0 >;
172 status = "okay";
173 };
174 pciephy0: pcie-phy@d4206000 {
175 status = "okay";
176 };
177 camera: camera@d420d000 {
178 compatible = "asr,camera";
179 reg = <0xd420d000 0x1000>, /* IPE registers */
180 <0xd420f000 0x1000>; /* ISP registers */
181 reg-names = "ipe", "isp";
182 interrupts = <64>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&isp_spi_data>;
185 lpm-qos = <PM_QOS_CPUIDLE_BLOCK_AXI>;
186 clock-frequency = <24>;
187 clocks = <&soc_clocks ASR1803_CLK_CAMERA>;
188 clock-names = "cam_clk";
189 status = "okay";
190 port {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 spi_in_cam: endpoint@0 {
194 reg = <0>;
195 remote-endpoint = <&gc0312_out>;
196 };
197 };
198 };
199 };
200
201 apb@d4000000 {
202 pwm2: pwm@d401a800 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_pwm2>;
205 status = "okay";
206 };
207 mfpr: mfpr@d401e000 {
208 status = "okay";
209 };
210 timer0: timer@d4014000 {
211 status = "okay";
212 };
213 uart1: uart@d4017000 { /* nezhas evb use ap uart */
214 pinctrl-names = "default","sleep";
215 pinctrl-0 = <&uart1_pmx_func1 &uart1_pmx_func2>;
216 pinctrl-1 = <&uart1_pmx_func1_sleep &uart1_pmx_func2>;
217 edge-wakeup-gpio = <&gpio 29 0>; /* GPIO29: AP UART rx pin */
218 status = "okay";
219 };
220 uart2: uart@d4036000 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&gps_pmx_uart_rxd &gps_pmx_uart_txd>;
223 status = "okay";
224 };
225 rtc: rtc@d4010000 {
226 status = "okay";
227 };
228 tsc: tsc@d4013500 {
229 pinctrl-names = "default";
230 pinctrl-0 = <&tsc_pmx>;
231 status = "okay";
232 };
233 pmx: pinmux@d401e000 {
234 /* pin base = base_addr / 4, nr pins & gpio function */
235 pinctrl-single,gpio-range = <
236 /*
237 * GPIO number is hardcoded for range at here.
238 * In gpio chip, GPIO number is not hardcoded for range.
239 * Since one gpio pin may be routed to multiple pins,
240 * define these gpio range in pxa910-dkb.dts not pxa910.dtsi.
241 */
242 /*&range 80 4 0 */ /* GPIO25 ~ GPIO28 */
243 &range 55 32 0 /* GPIO0 ~ GPIO31 */
244 &range 87 32 0 /* GPIO32 ~ GPIO63 */
245 &range 119 32 0 /* GPIO64 ~ GPIO95 */
246 &range 151 32 0 /* GPIO96 ~ GPIO127 */
247 >;
248
249 lcd_pmx_func: lcd_pmx_func {
250 pinctrl-single,pins = <
251 #ifdef CONFIG_FB_ASR_SPI
252 GPIO00 AF3 /* SPI_DCLK */
253 GPIO01 AF3 /* SPI_DCX */
254 GPIO16 AF3 /* SPI_DOUT_1 */
255 GPIO02 AF3 /* SPI_CS0 */
256 GPIO03 AF3 /* SPI_DIN */
257 GPIO06 AF3 /* SPI_DOUT */
258 GPIO07 AF3 /* SPI_VSYNC */
259 GPIO15 AF3 /* SPI_RSTB */
260 #elif defined(CONFIG_FB_ASR_MCU)
261 GPIO00 AF5 /* MCU_D0 */
262 GPIO01 AF5 /* MCU_D5 */
263 GPIO02 AF5 /* MCU_CS0 */
264 GPIO03 AF5 /* MCU_RDB */
265 GPIO06 AF5 /* MCU_WRB */
266 GPIO07 AF5 /* MCU_VSYNC */
267 GPIO15 AF5 /* MCU_RSTB */
268 GPIO16 AF5 /* MCU_D6 */
269 GPIO17 AF5 /* MCU_A0 */
270 GPIO18 AF5 /* MCU_D7 */
271 GPIO33 AF3 /* MCU_D3 */
272 GPIO34 AF3 /* MCU_D4 */
273 GPIO35 AF3 /* MCU_D1 */
274 GPIO36 AF3 /* MCU_D2 */
275 #endif
276 >;
277 /* NOTE: need to PULL_UP here */
278 DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
279 };
280
281 pinctrl_pwm2: pmw2grp {
282 pinctrl-single,pins = <
283 VCXO_OUT AF2 /* pwm2 */
284 >;
285 DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
286 };
287
288 tsc_pmx: tsc_pmx {
289 pinctrl-single,pins = <
290 GPIO37 AF1 /* TSC_XL */
291 GPIO38 AF1 /* TSC_XR */
292 GPIO39 AF1 /* TSC_YD */
293 GPIO40 AF1 /* TSC_YU */
294 >;
295 DS_MEDIUM;PULL_DOWN;EDGE_NONE;LPM_NONE;
296 };
297
298 uart1_pmx_func1: uart1_pmx_func1 {
299 pinctrl-single,pins = <
300 GPIO29 AF1
301 >;
302 MFP_DEFAULT;
303 };
304 uart1_pmx_func2: uart1_pmx_func2 {
305 pinctrl-single,pins = <
306 GPIO30 AF1
307 >;
308 MFP_DEFAULT;
309 };
310 uart1_pmx_func1_sleep: uart1_pmx_func1_sleep {
311 pinctrl-single,pins = <
312 GPIO29 AF1
313 >;
314 DS_MEDIUM;PULL_NONE;EDGE_BOTH;SL_NORMAL;
315 };
316 twsi0_pmx_func: twsi0_pmx_func {
317 pinctrl-single,pins = <
318 GPIO49 AF1
319 GPIO50 AF1
320 >;
321 MFP_LPM_FLOAT;
322 };
323 twsi0_pmx_gpio: twsi0_pmx_gpio {
324 pinctrl-single,pins = <
325 GPIO49 AF0
326 GPIO50 AF0
327 >;
328 MFP_LPM_FLOAT;
329 };
330 twsi1_pmx_func: twsi1_pmx_func {
331 pinctrl-single,pins = <
332 GPIO10 AF1
333 GPIO11 AF1
334 >;
335 MFP_LPM_FLOAT;
336 };
337 twsi1_pmx_gpio: twsi1_pmx_gpio {
338 pinctrl-single,pins = <
339 GPIO10 AF0
340 GPIO11 AF0
341 >;
342 MFP_LPM_FLOAT;
343 };
344 /* no pull, no LPM */
345 dvc_pmx_func: dvc_pmx_func {
346 /* hw-dvc */
347 pinctrl-single,pins = <
348 TDS_DIO0 AF0
349 TDS_DIO1 AF0
350 >;
351 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
352 };
353 leds_pmx_func: leds_pmx_func {
354 pinctrl-single,pins = <
355 DF_IO10 AF1
356 DF_IO11 AF1
357 DF_IO12 AF1
358 >;
359 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;SL_NORMAL;
360 };
361
362 gps_pmx_onoff: gps_pmx_onoff {
363 pinctrl-single,pins = <
364 TDS_TXREV AF1
365 >;
366 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
367 };
368 gps_pmx_reset: gps_pmx_reset {
369 pinctrl-single,pins = <
370 TDS_RXON AF1
371 >;
372 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
373 };
374 gps_pmx_uart_rxd: gps_pmx_uart_rxd {
375 /* gps dedicated uart */
376 pinctrl-single,pins = <
377 GPIO51 AF1
378 GPIO32 AF1
379 >;
380 MFP_DEFAULT;
381 };
382 gps_pmx_uart_txd: gps_pmx_uart_txd {
383 /* gps dedicated uart */
384 pinctrl-single,pins = <
385 GPIO52 AF1
386 GPIO31 AF1
387 >;
388 MFP_DEFAULT;
389 };
390
391 sd_ldo_en: sd_ldo_en {
392 pinctrl-single,pins = <
393 GPIO45 AF0
394 >;
395 MFP_PULL_DOWN;
396 };
397 sdh0_pmx_func1: sdh0_pmx_func1 {
398 pinctrl-single,pins = <
399 MMC1_DAT3 AF0
400 MMC1_DAT2 AF0
401 MMC1_DAT1 AF0
402 MMC1_DAT0 AF0
403 MMC1_CMD AF0
404 >;
405 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_NORMAL;
406 };
407 sdh0_pmx_func2: sdh0_pmx_func2 {
408 pinctrl-single,pins = <
409 MMC1_CLK AF0
410 >;
411 DS_MEDIUM;PULL_NONE;EDGE_NONE;
412 };
413 sdh0_pmx_func3: sdh0_pmx_func3 {
414 pinctrl-single,pins = <
415 MMC1_CD AF0
416 >;
417 MFP_PULL_UP;
418 };
419 sdh0_pmx_func1_slow: sdh0_pmx_func1_slow {
420 pinctrl-single,pins = <
421 MMC1_DAT3 AF0
422 MMC1_DAT2 AF0
423 MMC1_DAT1 AF0
424 MMC1_DAT0 AF0
425 MMC1_CMD AF0
426 >;
427 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
428 };
429 sdh0_pmx_func2_slow: sdh0_pmx_func2_slow {
430 pinctrl-single,pins = <
431 MMC1_CLK AF0
432 >;
433 DS_FAST0;PULL_NONE;EDGE_NONE;
434 };
435 sdh0_pmx_func1_fast: sdh0_pmx_func1_fast {
436 pinctrl-single,pins = <
437 MMC1_DAT3 AF0
438 MMC1_DAT2 AF0
439 MMC1_DAT1 AF0
440 MMC1_DAT0 AF0
441 MMC1_CMD AF0
442 >;
443 DS_FAST1;PULL_NONE;EDGE_NONE;SL_NORMAL;
444 };
445 sdh0_pmx_func2_fast: sdh0_pmx_func2_fast {
446 pinctrl-single,pins = <
447 MMC1_CLK AF0
448 >;
449 DS_FAST1;PULL_NONE;EDGE_NONE;
450 };
451 sdh1_pmx_func1_fast: sdh1_pmx_func1_fast {
452 pinctrl-single,pins = <
453 TDS_DIO13 AF0 /* WLAN_DAT3 */
454 TDS_DIO14 AF0 /* WLAN_DAT2 */
455 TDS_DIO15 AF0 /* WLAN_DAT1 */
456 TDS_DIO16 AF0 /* WLAN_DAT0 */
457 TDS_DIO17 AF0 /* WLAN_CMD */
458 >;
459 DS_FAST0;PULL_NONE;EDGE_NONE;SL_NORMAL;
460 };
461 sdh1_pmx_func2_fast: sdh1_pmx_func2_fast {
462 pinctrl-single,pins = <
463 TDS_DIO18 AF0 /* WLAN_CLK */
464 >;
465 DS_FAST0;PULL_DOWN;EDGE_NONE;SL_NORMAL;
466 };
467 sdh1_pmx_func1: sdh1_pmx_func1 {
468 pinctrl-single,pins = <
469 TDS_DIO13 AF0 /* WLAN_DAT3 */
470 TDS_DIO14 AF0 /* WLAN_DAT2 */
471 TDS_DIO15 AF0 /* WLAN_DAT1 */
472 TDS_DIO16 AF0 /* WLAN_DAT0 */
473 TDS_DIO17 AF0 /* WLAN_CMD */
474 >;
475 DS_MEDIUM;PULL_NONE;EDGE_NONE;SL_LOW;
476 };
477 sdh1_pmx_func2: sdh1_pmx_func2 {
478 pinctrl-single,pins = <
479 TDS_DIO18 AF0 /* WLAN_CLK */
480 >;
481 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_LOW;
482 };
483 sdh1_pmx_func3: sdh1_pmx_func3 {
484 pinctrl-single,pins = <
485 PRI_TDI AF1 /* WLAN_WAKE_HOST */
486 >;
487 MFP_PULL_DOWN;
488 };
489 sdh1_pmx_edge_wakeup: sdh1_pmx_edge_wakeup {
490 pinctrl-single,pins = <
491 PRI_TDI AF1 /* WLAN_WAKE_HOST */
492 >;
493 DS_MEDIUM;PULL_DOWN;EDGE_RISE;SL_NORMAL;
494 };
495 sdh1_pmx_pd_rst_off: sdh1_pmx_pd_rst_off {
496 pinctrl-single,pins = <
497 PRI_TDO AF1 /* WLAN_PDn */
498 GPIO41 AF0 /* LDO_EN */
499 >;
500 MFP_PULL_DOWN;
501 };
502 sdh1_pmx_pd_rst_on: sdh1_pmx_pd_rst_on {
503 pinctrl-single,pins = <
504 PRI_TDO AF1 /* WLAN_PDn */
505 GPIO41 AF0 /* LDO_EN */
506 >;
507 MFP_PULL_UP;
508 };
509
510 otg_vbus_func: otg_vbus_func {
511 pinctrl-single,pins = <
512 VBUS_DRV AF1 /* GPIO[122] */
513 >;
514 DS_MEDIUM;PULL_DOWN;EDGE_NONE;
515 };
516
517 usim1_pmx_func: usim1_pmx_func {
518 pinctrl-single,pins = <
519 GPIO19 AF0
520 >;
521 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
522 };
523 usim1_pmx_func_sleep: usim1_pmx_func_sleep {
524 pinctrl-single,pins = <
525 GPIO19 AF0
526 >;
527 DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
528 };
529 usim2_pmx_func: usim2_pmx_func {
530 pinctrl-single,pins = <
531 GPIO44 AF0
532 >;
533 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
534 };
535 usim2_pmx_func_sleep: usim2_pmx_func_sleep {
536 pinctrl-single,pins = <
537 GPIO44 AF0
538 >;
539 DS_MEDIUM;PULL_UP;EDGE_BOTH;SL_NORMAL;
540 };
541 pcie_pmx_pd_rst_off: pcie_pmx_pd_rst_off {
542 pinctrl-single,pins = <
543 GPIO42 AF0 /* PERST_N */
544 GPIO53 AF0 /* DC_EN */
545 >;
546 MFP_PULL_DOWN;
547 };
548 pcie_pmx_pd_rst_on: pcie_pmx_pd_rst_on {
549 pinctrl-single,pins = <
550 GPIO42 AF0 /* PERST_N */
551 GPIO53 AF0 /* DC_EN */
552 >;
553 MFP_PULL_UP;
554 };
555
556 gc032a_pmx_func: gc032a_pmx_func {
557 pinctrl-single,pins = <
558 GPIO21 AF2 /* mclk */
559 >;
560 DS_MEDIUM;PULL_DOWN;EDGE_NONE;SL_NORMAL;
561 };
562 isp_spi_data: isp_spi_data {
563 pinctrl-single,pins = <
564 /* spi_data0 ... spi_data1 */
565 GPIO24 AF2
566 GPIO23 AF2
567 /* camera spi clk */
568 GPIO22 AF2
569 >;
570 DS_MEDIUM;PULL_UP;EDGE_NONE;SL_NORMAL;
571 };
572 usb_id_pinmux: usb_id_pinmux {
573 pinctrl-single,pins = <
574 USB_ID AF1/* usbid-gpio99 */
575 >;
576 DS_MEDIUM;PULL_UP;EDGE_NONE;LPM_NONE;
577 };
578 usb_id_pinmux_slp: usb_id_pinmux_slp {
579 pinctrl-single,pins = <
580 USB_ID AF1 /* usbid-gpio99 */
581 >;
582 DS_MEDIUM;PULL_UP;EDGE_BOTH;LPM_NONE;
583 };
584 usb_host_pinmux: usb_host_pinmux {
585 pinctrl-single,pins = <
586 VBUS_DRV AF1 /* gpio-122 */
587 >;
588 DS_MEDIUM;PULL_FLOAT;EDGE_NONE;LPM_NONE;
589 };
590 };
591
592 twsi0: i2c@d4011000 {
593 status= "okay";
594 /*
595 pmic4: 88pm805@38 {
596 compatible = "marvell,88pm805";
597 reg = <0x38>;
598 };
599 */
600 };
601 twsi1: i2c@d4010800 {
602 pinctrl-names = "default","gpio";
603 pinctrl-0 = <&twsi1_pmx_func>;
604 pinctrl-1 = <&twsi1_pmx_gpio>;
605 i2c-gpio = <&gpio 10 0 &gpio 11 0>;
606 status= "okay";
607 nau8810@1a {
608 compatible = "marvell,nau8810";
609 reg = <0x1a>;
610 };
611 gc032a: gc032a@21{
612 compatible = "galaxycore,gc032a";
613 reg = <0x21>;
614 pinctrl-names = "default";
615 pinctrl-0 = <&gc032a_pmx_func>;
616 pwdn-gpios = <&gpio 37 0>;
617 power-gpios = <&gpio 40 0>;
618 /*avdd-supply = <&pm802ldo6>;//2v8
619 iovdd-supply = <&pm802ldo5>;//1v8*/
620
621 status = "okay";
622 port {
623 gc0312_out: endpoint {
624 remote-endpoint = <&spi_in_cam>;
625 };
626 };
627 };
628 };
629 twsi2: i2c@d4037000 {
630 status = "okay";
631
632 pmic4: 88pm805@38 {
633 compatible = "marvell,88pm805";
634 reg = <0x38>;
635 };
636
637 pmic5: pm802@0 {
638 compatible = "asr,pm802";
639 reg = <0x00>;
640 interrupts = <4>;
641 interrupt-parent = <&intc>;
642 interrupt-controller;
643 #interrupt-cells = <1>;
644 chg_irq_from_exton;
645 scs-int-active-high;
646 battery {
647 compatible = "asr,pm802-bat";
648 status = "disabled";
649
650 online-gpadc = <1>;
651 temperature-gpadc = <1>;
652
653 hi-volt-online = <1150>; /* mV */
654 lo-volt-online = <20>; /* mV */
655 hi-volt-temp = <1150>; /* mV */
656 lo-volt-temp = <200>; /* mV */
657
658 sw-fg-use-ntc;
659 full-capacity = <2050>; /* mAh */
660 r1-resistor = <40>; /* mohm */
661 r2-resistor = <30>; /* mohm */
662 rs-resistor = <120>; /* mohm */
663 roff-resistor = <0>; /* mohm */
664 roff-initial-resistor = <0>; /* mohm */
665
666 times-in-zero-degree = <1>;
667 offset-in-zero-degree = <0>;
668
669 times-in-ten-degree = <2>;
670 offset-in-ten-degree = <100>;
671
672 power-off-threshold = <3350>; /* mV */
673 safe-power-off-threshold = <3200>; /* mV */
674
675 online-gp-bias-curr = <11>; /* uA */
676
677 soc-ramp-up-interval = <150>; /* s */
678 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
679 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
680 ntc-table-size = <88>;
681 stop-chg-for-vbatmeas;
682 /* -24C, -23C, ..., 62C, 63C */
683 ntc-table = <
684 89680 85130 80840 76790 72970 69360 65960 62740
685 59700 56830 54130 51530 49100 46800 44610 42550
686 40590 38730 36970 35300 33710 32210 30780 29420
687 28130 26910 25750 24640 23590 22580 21630 20720
688 19860 19030 18250 17500 16790 16110 15460 14840
689 14250 13690 13150 12640 12150 11680 11230 10800
690 10390 10000 9620 9270 8920 8590 8280 7980
691 7690 7410 7150 6890 6650 6410 6190 5970
692 5770 5570 5380 5190 5020 4850 4680 4530
693 4380 4230 4100 3960 3830 3710 3590 3480
694 3370 3260 3160 3060 2960 2870 2780 2700
695 >;
696 };
697 usb {
698 status = "disabled";
699 vbus_gpio = <0xff>; /* set_vbus */
700 id-gpadc = <0xff>; /* usb-id */
701 vchg-from-exton = <1>;
702 vbus-detect = <1>; /* vbus-irq */
703 get-vbus = <1>; /* get-vbus */
704 };
705 };
706 pmic6: pm803@30 {
707 compatible = "asr,pm803";
708 reg = <0x30>;
709 interrupts = <4>;
710 interrupt-parent = <&intc>;
711 interrupt-controller;
712 #interrupt-cells = <1>;
713 chg_irq_from_exton;
714 scs-int-active-high;
715 battery {
716 compatible = "asr,pm803-bat";
717 status = "disabled";
718
719 online-gpadc = <1>;
720 temperature-gpadc = <1>;
721
722 hi-volt-online = <1150>; /* mV */
723 lo-volt-online = <20>; /* mV */
724 hi-volt-temp = <1150>; /* mV */
725 lo-volt-temp = <200>; /* mV */
726
727 sw-fg-use-ntc;
728 full-capacity = <2050>; /* mAh */
729 r1-resistor = <40>; /* mohm */
730 r2-resistor = <30>; /* mohm */
731 rs-resistor = <120>; /* mohm */
732 roff-resistor = <0>; /* mohm */
733 roff-initial-resistor = <0>; /* mohm */
734
735 times-in-zero-degree = <1>;
736 offset-in-zero-degree = <0>;
737
738 times-in-ten-degree = <2>;
739 offset-in-ten-degree = <100>;
740
741 power-off-threshold = <3350>; /* mV */
742 safe-power-off-threshold = <3200>; /* mV */
743
744 online-gp-bias-curr = <11>; /* uA */
745
746 soc-ramp-up-interval = <150>; /* s */
747 /* choose -20C, 0C, 10C, 40C, 45C, 55C as threshold */
748 tbat-threshold = <20 0 10 40 45 55>; /* ohm */
749 ntc-table-size = <88>;
750 stop-chg-for-vbatmeas;
751 /* -24C, -23C, ..., 62C, 63C */
752 ntc-table = <
753 89680 85130 80840 76790 72970 69360 65960 62740
754 59700 56830 54130 51530 49100 46800 44610 42550
755 40590 38730 36970 35300 33710 32210 30780 29420
756 28130 26910 25750 24640 23590 22580 21630 20720
757 19860 19030 18250 17500 16790 16110 15460 14840
758 14250 13690 13150 12640 12150 11680 11230 10800
759 10390 10000 9620 9270 8920 8590 8280 7980
760 7690 7410 7150 6890 6650 6410 6190 5970
761 5770 5570 5380 5190 5020 4850 4680 4530
762 4380 4230 4100 3960 3830 3710 3590 3480
763 3370 3260 3160 3060 2960 2870 2780 2700
764 >;
765 };
766 usb {
767 status = "disabled";
768 vbus_gpio = <0xff>; /* set_vbus */
769 id-gpadc = <0xff>; /* usb-id */
770 vchg-from-exton = <1>;
771 vbus-detect = <1>; /* vbus-irq */
772 get-vbus = <1>; /* get-vbus */
773 };
774 };
775 };
776 };
777 };
778
779 vcc_sdh1: sd-regulator {
780 compatible = "regulator-fixed";
781 pinctrl-names = "default";
782 pinctrl-0 = <&sd_ldo_en>;
783 regulator-name = "SDH1 VCC";
784 regulator-min-microvolt = <3300000>;
785 regulator-max-microvolt = <3300000>;
786 gpio = <&gpio 45 0>;
787 enable-active-high;
788 status = "okay";
789 };
790
791 asr-rfkill {
792 compatible = "asr,asr-rfkill";
793 pinctrl-names = "off", "on";
794 pinctrl-0 = <&sdh1_pmx_pd_rst_off>;
795 pinctrl-1 = <&sdh1_pmx_pd_rst_on>;
796 sd-host = <&sdh1>;
797 pd-gpio = <&gpio 120 0>;
798 3v3-ldo-gpio = <&gpio 41 0>;
799 edge-wakeup-gpio = <&gpio 117 0>;
800 status = "okay";
801 };
802
803 pcie-rfkill {
804 compatible = "mrvl,pcie-rfkill";
805 pinctrl-names = "off", "on";
806 pinctrl-0 = <&pcie_pmx_pd_rst_off>;
807 pinctrl-1 = <&pcie_pmx_pd_rst_on>;
808 rst-gpio = <&gpio 42 0>;
809 3v3-ldo-gpio = <&gpio 53 0>;
810 status = "okay";
811 };
812
813 usim1: usim1 {
814 compatible = "asr,usim1";
815 pinctrl-names = "default", "sleep";
816 pinctrl-0 = <&usim1_pmx_func>;
817 pinctrl-1 = <&usim1_pmx_func_sleep>;
818 edge_detect_gpio = <19>; /* GPIO19: SIM detect pin */
819 status = "okay";
820 };
821 usim2: usim2 {
822 compatible = "asr,usim2";
823 pinctrl-names = "default", "sleep";
824 pinctrl-0 = <&usim2_pmx_func>;
825 pinctrl-1 = <&usim2_pmx_func_sleep>;
826 edge_detect_gpio = <44>; /* GPIO44: SIM detect pin */
827#ifdef CONFIG_ASR_DSDS
828 status = "okay";
829#else
830 status = "disabled";
831#endif
832 };
833
834 audio_regs {
835 compatible = "ASRMICRO,audio-registers";
836 reg = <0xD4050044 0x4>;
837 status = "okay";
838 };
839};
840#ifdef CONFIG_ASR_DSDS
841#include "asr_pm802_2usim.dtsi"
842#include "88pm805.dtsi"
843#include "asr_pm803_2usim.dtsi"
844#else
845#include "asr_pm802.dtsi"
846#include "88pm805.dtsi"
847#include "asr_pm803.dtsi"
848#endif
849
850#ifdef CONFIG_AB_SYSTEM
851#include "asr1806_ab_flash_layout.dtsi"
852#else
853#include "asr1806_flash_layout.dtsi"
854#endif