| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University |
| 4 | * Author: Christoffer Dall <c.dall@virtualopensystems.com> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __ARM_KVM_ASM_H__ |
| 8 | #define __ARM_KVM_ASM_H__ |
| 9 | |
| 10 | #include <asm/virt.h> |
| 11 | |
| 12 | #define ARM_EXIT_WITH_ABORT_BIT 31 |
| 13 | #define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_ABORT_BIT)) |
| 14 | #define ARM_EXCEPTION_IS_TRAP(x) \ |
| 15 | (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_PREF_ABORT || \ |
| 16 | ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_DATA_ABORT || \ |
| 17 | ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_HVC) |
| 18 | #define ARM_ABORT_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_ABORT_BIT)) |
| 19 | |
| 20 | #define ARM_EXCEPTION_RESET 0 |
| 21 | #define ARM_EXCEPTION_UNDEFINED 1 |
| 22 | #define ARM_EXCEPTION_SOFTWARE 2 |
| 23 | #define ARM_EXCEPTION_PREF_ABORT 3 |
| 24 | #define ARM_EXCEPTION_DATA_ABORT 4 |
| 25 | #define ARM_EXCEPTION_IRQ 5 |
| 26 | #define ARM_EXCEPTION_FIQ 6 |
| 27 | #define ARM_EXCEPTION_HVC 7 |
| 28 | #define ARM_EXCEPTION_HYP_GONE HVC_STUB_ERR |
| 29 | /* |
| 30 | * The rr_lo_hi macro swaps a pair of registers depending on |
| 31 | * current endianness. It is used in conjunction with ldrd and strd |
| 32 | * instructions that load/store a 64-bit value from/to memory to/from |
| 33 | * a pair of registers which are used with the mrrc and mcrr instructions. |
| 34 | * If used with the ldrd/strd instructions, the a1 parameter is the first |
| 35 | * source/destination register and the a2 parameter is the second |
| 36 | * source/destination register. Note that the ldrd/strd instructions |
| 37 | * already swap the bytes within the words correctly according to the |
| 38 | * endianness setting, but the order of the registers need to be effectively |
| 39 | * swapped when used with the mrrc/mcrr instructions. |
| 40 | */ |
| 41 | #ifdef CONFIG_CPU_ENDIAN_BE8 |
| 42 | #define rr_lo_hi(a1, a2) a2, a1 |
| 43 | #else |
| 44 | #define rr_lo_hi(a1, a2) a1, a2 |
| 45 | #endif |
| 46 | |
| 47 | #define kvm_ksym_ref(kva) (kva) |
| 48 | |
| 49 | #ifndef __ASSEMBLY__ |
| 50 | struct kvm; |
| 51 | struct kvm_vcpu; |
| 52 | |
| 53 | extern char __kvm_hyp_init[]; |
| 54 | extern char __kvm_hyp_init_end[]; |
| 55 | |
| 56 | extern void __kvm_flush_vm_context(void); |
| 57 | extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa); |
| 58 | extern void __kvm_tlb_flush_vmid(struct kvm *kvm); |
| 59 | extern void __kvm_flush_cpu_context(struct kvm_vcpu *vcpu); |
| 60 | |
| 61 | extern void __kvm_timer_set_cntvoff(u32 cntvoff_low, u32 cntvoff_high); |
| 62 | |
| 63 | /* no VHE on 32-bit :( */ |
| 64 | static inline int kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu) { BUG(); return 0; } |
| 65 | |
| 66 | extern int __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu); |
| 67 | |
| 68 | extern void __init_stage2_translation(void); |
| 69 | |
| 70 | extern u64 __vgic_v3_get_ich_vtr_el2(void); |
| 71 | extern u64 __vgic_v3_read_vmcr(void); |
| 72 | extern void __vgic_v3_write_vmcr(u32 vmcr); |
| 73 | extern void __vgic_v3_init_lrs(void); |
| 74 | |
| 75 | #endif |
| 76 | |
| 77 | #endif /* __ARM_KVM_ASM_H__ */ |