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192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / arch / arm / kernel / asm-offsets.c
blob: 4ce2e29da14de23fd0380d35989f46a95f85a0dd [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 1995-2003 Russell King
4 * 2001-2002 Keith Owens
5 *
6 * Generate definitions needed by assembly language modules.
7 * This code generates raw asm output which is post-processed to extract
8 * and format the required data.
9 */
10#include <linux/compiler.h>
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/dma-mapping.h>
14#ifdef CONFIG_KVM_ARM_HOST
15#include <linux/kvm_host.h>
16#endif
17#include <asm/cacheflush.h>
18#include <asm/kexec-internal.h>
19#include <asm/glue-df.h>
20#include <asm/glue-pf.h>
21#include <asm/mach/arch.h>
22#include <asm/thread_info.h>
23#include <asm/memory.h>
24#include <asm/mpu.h>
25#include <asm/procinfo.h>
26#include <asm/suspend.h>
27#include <asm/vdso_datapage.h>
28#include <asm/hardware/cache-l2x0.h>
29#include <linux/kbuild.h>
30#include <linux/arm-smccc.h>
31#include "signal.h"
32
33/*
34 * Make sure that the compiler and target are compatible.
35 */
36#if defined(__APCS_26__)
37#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
38#endif
39/*
40 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
41 * miscompiles find_get_entry(), and can result in EXT3 and EXT4
42 * filesystem corruption (possibly other FS too).
43 */
44#if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803
45#error Your compiler is too buggy; it is known to miscompile kernels
46#error and result in filesystem corruption and oopses.
47#endif
48
49int main(void)
50{
51 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
52#ifdef CONFIG_STACKPROTECTOR
53 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
54#endif
55 BLANK();
56 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
57 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
58 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
59 DEFINE(TI_TASK, offsetof(struct thread_info, task));
60 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
61 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
62 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
63 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
64 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
65 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
66#ifdef CONFIG_VFP
67 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
68#ifdef CONFIG_SMP
69 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
70#endif
71#endif
72#ifdef CONFIG_ARM_THUMBEE
73 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
74#endif
75#ifdef CONFIG_IWMMXT
76 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
77#endif
78#ifdef CONFIG_CRUNCH
79 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
80#endif
81#ifdef CONFIG_STACKPROTECTOR_PER_TASK
82 DEFINE(TI_STACK_CANARY, offsetof(struct thread_info, stack_canary));
83#endif
84 DEFINE(THREAD_SZ_ORDER, THREAD_SIZE_ORDER);
85 BLANK();
86 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
87 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
88 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
89 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
90 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
91 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
92 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
93 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
94 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
95 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
96 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
97 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
98 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
99 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
100 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
101 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
102 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
103 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
104 DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
105 DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr));
106 DEFINE(SVC_ADDR_LIMIT, offsetof(struct svc_pt_regs, addr_limit));
107 DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs));
108 BLANK();
109 DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3]));
110 DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
111 BLANK();
112#ifdef CONFIG_CACHE_L2X0
113 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
114 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
115 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
116 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
117 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
118 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
119 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
120 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
121 BLANK();
122#endif
123#ifdef CONFIG_CPU_HAS_ASID
124 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
125 BLANK();
126#endif
127 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
128 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
129 BLANK();
130 DEFINE(VM_EXEC, VM_EXEC);
131 BLANK();
132 DEFINE(PAGE_SZ, PAGE_SIZE);
133 BLANK();
134 DEFINE(SYS_ERROR0, 0x9f0000);
135 BLANK();
136 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
137 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
138 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
139 BLANK();
140 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
141 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
142 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
143 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
144 BLANK();
145#ifdef MULTI_DABORT
146 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
147#endif
148#ifdef MULTI_PABORT
149 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
150#endif
151#ifdef MULTI_CPU
152 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
153 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
154 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
155#endif
156#ifdef MULTI_CACHE
157 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
158#endif
159#ifdef CONFIG_ARM_CPU_SUSPEND
160 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
161 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
162 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
163#endif
164 DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
165 DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
166 BLANK();
167 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
168 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
169 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
170 BLANK();
171 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
172 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
173 BLANK();
174#ifdef CONFIG_KVM_ARM_HOST
175 DEFINE(VCPU_GUEST_CTXT, offsetof(struct kvm_vcpu, arch.ctxt));
176 DEFINE(VCPU_HOST_CTXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
177 DEFINE(CPU_CTXT_VFP, offsetof(struct kvm_cpu_context, vfp));
178 DEFINE(CPU_CTXT_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
179 DEFINE(GP_REGS_USR, offsetof(struct kvm_regs, usr_regs));
180#endif
181 BLANK();
182#ifdef CONFIG_VDSO
183 DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
184#endif
185 BLANK();
186#ifdef CONFIG_ARM_MPU
187 DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns));
188 DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used));
189
190 DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn));
191 DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar));
192 DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr));
193 DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr));
194 DEFINE(MPU_RGN_PRBAR, offsetof(struct mpu_rgn, prbar));
195 DEFINE(MPU_RGN_PRLAR, offsetof(struct mpu_rgn, prlar));
196#endif
197 DEFINE(KEXEC_START_ADDR, offsetof(struct kexec_relocate_data, kexec_start_address));
198 DEFINE(KEXEC_INDIR_PAGE, offsetof(struct kexec_relocate_data, kexec_indirection_page));
199 DEFINE(KEXEC_MACH_TYPE, offsetof(struct kexec_relocate_data, kexec_mach_type));
200 DEFINE(KEXEC_R2, offsetof(struct kexec_relocate_data, kexec_r2));
201 return 0;
202}