b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * arch/arm/mach-ep93xx/include/mach/uncompress.h |
| 4 | * |
| 5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> |
| 6 | */ |
| 7 | |
| 8 | #include <mach/ep93xx-regs.h> |
| 9 | #include <asm/mach-types.h> |
| 10 | |
| 11 | static unsigned char __raw_readb(unsigned int ptr) |
| 12 | { |
| 13 | return *((volatile unsigned char *)ptr); |
| 14 | } |
| 15 | |
| 16 | static unsigned int __raw_readl(unsigned int ptr) |
| 17 | { |
| 18 | return *((volatile unsigned int *)ptr); |
| 19 | } |
| 20 | |
| 21 | static void __raw_writeb(unsigned char value, unsigned int ptr) |
| 22 | { |
| 23 | *((volatile unsigned char *)ptr) = value; |
| 24 | } |
| 25 | |
| 26 | static void __raw_writel(unsigned int value, unsigned int ptr) |
| 27 | { |
| 28 | *((volatile unsigned int *)ptr) = value; |
| 29 | } |
| 30 | |
| 31 | #define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00) |
| 32 | #define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18) |
| 33 | #define UART_FLAG_TXFF 0x20 |
| 34 | |
| 35 | static inline void putc(int c) |
| 36 | { |
| 37 | int i; |
| 38 | |
| 39 | for (i = 0; i < 10000; i++) { |
| 40 | /* Transmit fifo not full? */ |
| 41 | if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)) |
| 42 | break; |
| 43 | } |
| 44 | |
| 45 | __raw_writeb(c, PHYS_UART_DATA); |
| 46 | } |
| 47 | |
| 48 | static inline void flush(void) |
| 49 | { |
| 50 | } |
| 51 | |
| 52 | |
| 53 | /* |
| 54 | * Some bootloaders don't turn off DMA from the ethernet MAC before |
| 55 | * jumping to linux, which means that we might end up with bits of RX |
| 56 | * status and packet data scribbled over the uncompressed kernel image. |
| 57 | * Work around this by resetting the ethernet MAC before we uncompress. |
| 58 | */ |
| 59 | #define PHYS_ETH_SELF_CTL 0x80010020 |
| 60 | #define ETH_SELF_CTL_RESET 0x00000001 |
| 61 | |
| 62 | static void ethernet_reset(void) |
| 63 | { |
| 64 | unsigned int v; |
| 65 | |
| 66 | /* Reset the ethernet MAC. */ |
| 67 | v = __raw_readl(PHYS_ETH_SELF_CTL); |
| 68 | __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL); |
| 69 | |
| 70 | /* Wait for reset to finish. */ |
| 71 | while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET) |
| 72 | ; |
| 73 | } |
| 74 | |
| 75 | #define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000 |
| 76 | #define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000 |
| 77 | #define TS72XX_WDT_FEED_VAL 0x05 |
| 78 | |
| 79 | static void __maybe_unused ts72xx_watchdog_disable(void) |
| 80 | { |
| 81 | __raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE); |
| 82 | __raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE); |
| 83 | } |
| 84 | |
| 85 | static void arch_decomp_setup(void) |
| 86 | { |
| 87 | if (machine_is_ts72xx()) |
| 88 | ts72xx_watchdog_disable(); |
| 89 | ethernet_reset(); |
| 90 | } |