b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * MX35 CPU type detection |
| 4 | * |
| 5 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 6 | */ |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/of_address.h> |
| 9 | #include <linux/io.h> |
| 10 | |
| 11 | #include "hardware.h" |
| 12 | #include "iim.h" |
| 13 | |
| 14 | static int mx35_cpu_rev = -1; |
| 15 | |
| 16 | static int mx35_read_cpu_rev(void) |
| 17 | { |
| 18 | void __iomem *iim_base; |
| 19 | struct device_node *np; |
| 20 | u32 rev; |
| 21 | |
| 22 | np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim"); |
| 23 | iim_base = of_iomap(np, 0); |
| 24 | of_node_put(np); |
| 25 | BUG_ON(!iim_base); |
| 26 | |
| 27 | rev = imx_readl(iim_base + MXC_IIMSREV); |
| 28 | switch (rev) { |
| 29 | case 0x00: |
| 30 | return IMX_CHIP_REVISION_1_0; |
| 31 | case 0x10: |
| 32 | return IMX_CHIP_REVISION_2_0; |
| 33 | case 0x11: |
| 34 | return IMX_CHIP_REVISION_2_1; |
| 35 | default: |
| 36 | return IMX_CHIP_REVISION_UNKNOWN; |
| 37 | } |
| 38 | } |
| 39 | |
| 40 | int mx35_revision(void) |
| 41 | { |
| 42 | if (mx35_cpu_rev == -1) |
| 43 | mx35_cpu_rev = mx35_read_cpu_rev(); |
| 44 | |
| 45 | return mx35_cpu_rev; |
| 46 | } |
| 47 | EXPORT_SYMBOL(mx35_revision); |