marvell/linux/arch/arm/mach-mmp/pm-asr-tos.c

#include <linux/io.h>
#include <soc/asr/regs-addr.h>
#include <linux/cputype.h>
#include <linux/pm_qos.h>
#include <linux/edge_wakeup_mmp.h>
#include <linux/gfp.h>
#include <linux/suspend.h>
#include <linux/asr_tee_sip.h>
#include <soc/asr/wakeup_defines.h>

#ifdef CONFIG_PXA_MIPSRAM
#include <linux/mipsram.h>
#include "mipsram_pm_event.h"
#endif
#include "regs-icu.h"
#include "addr-map.h"
#include "irqs.h"
#include "pm.h"

#ifdef CONFIG_CPU_ASR1901
#include <soc/asr/asr1901_lowpower.h>
#include <linux/irqchip/arm-gic.h>
#else
#include <soc/asr/asr18xx_lowpower.h>
#endif

#ifdef CONFIG_CPU_ASR1903
#define IRQ_ASR1903_AP_TIMER3         	(IRQ_ASR18XX_START + 18)
#define IRQ_ASR1903_AP2_TIMER3         	(IRQ_ASR18XX_START + 19)	
#endif

#define ASR18XX_GPIO_INT_NUM            (49)

static bool rtc_no_wakeup = false;
static struct pm_wakeup_status asr_wkup_sts;

extern struct pm_qos_object *pm_qos_array[];

void asr_clear_wakeup_event_idx(void)
{
	asr_wkup_sts.main_wakeup_idx = asr_wkup_sts.gpio_wakeup_idx = asr_wkup_sts.irq_wakeup_idx = 0;
}
int asr_get_main_wakeup_count(void)
{
	return asr_wkup_sts.main_wakeup_idx;
}
u32 asr_get_main_wakeup_event(int idx)
{
	if (idx < asr_wkup_sts.main_wakeup_idx) {
		return asr_wkup_sts.sys_main_wakeup_id[idx];
	} else {
		pr_err("%s: error main wakeup idx %d\n", __func__, idx);
		return 0;
	}
}

int asr_get_gpio_wakeup_count(void)
{
	return asr_wkup_sts.gpio_wakeup_idx;
}
u32 asr_get_gpio_wakeup_event(int idx)
{
	if (idx < asr_wkup_sts.gpio_wakeup_idx) {
		return asr_wkup_sts.sys_gpio_wakeup_id[idx];
        } else {
		pr_err("%s: error gpio wakeup idx %d\n", __func__, idx);
		return 0;
	}
}

int asr_get_irq_wakeup_count(void)
{
	return asr_wkup_sts.irq_wakeup_idx;
}
u32 asr_get_irq_wakeup_event(int idx)
{
	if (idx < asr_wkup_sts.irq_wakeup_idx) {
		return asr_wkup_sts.sys_irq_wakeup_id[idx];
        } else {
		pr_err("%s: error irq wakeup idx %d\n", __func__, idx);
		return 0;
	}
}

#ifdef CONFIG_CPU_ASR1901
static void asr_set_wake(int irq, unsigned int on)
{
	uint32_t awucrm = 0, apslpw = 0;
	void __iomem *mpmu_va = regs_addr_get_va(REGS_ADDR_MPMU);

	/* setting wakeup sources */
	switch (irq) {
	/* wakeup line 2 */
	case IRQ_ASR1901_GPIO_AP_NONSEC:
	case IRQ_ASR1901_GPIO_AP_SEC:
		awucrm = PMUM_WAKEUP2;
		apslpw |= PMUM_SLPWP2;
		break;
	/* wakeup line 3 */
	case IRQ_ASR1901_KEYPAD:
		awucrm = PMUM_WAKEUP3 | PMUM_KEYPRESS | PMUM_TRACKBALL |
				PMUM_NEWROTARY;
		apslpw |= PMUM_SLPWP3;
		break;
	case IRQ_ASR1901_AP_GMAC:
		awucrm = PMUM_WAKEUP3 | PMUM_NEWROTARY | PMUM_AP_ASYNC_INT;
		apslpw |= PMUM_SLPWP3;
		break;
	/* wakeup line 4 */
	case IRQ_ASR1901_AP0_TIMER1:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_1;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP0_TIMER2:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_2;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP0_TIMER3:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_3;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP1_TIMER1:
		awucrm = PMUM_WAKEUP4 | PMUM_AP1_TIMER_1;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP1_TIMER2:
		awucrm = PMUM_WAKEUP4 | PMUM_AP1_TIMER_2;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP1_TIMER3:
		awucrm = PMUM_WAKEUP4 | PMUM_AP1_TIMER_3;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP2_TIMER1:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_1;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP2_TIMER2:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_2;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_AP2_TIMER3:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_3;
		apslpw |= PMUM_SLPWP4;
		break;
	case IRQ_ASR1901_RTC_ALARM_SEC:
	case IRQ_ASR1901_RTC_ALARM_NSEC:
		awucrm = PMUM_WAKEUP4 | PMUM_RTC_ALARM;
		apslpw |= PMUM_SLPWP4;
		break;
	/* wakeup line 5 */
	case IRQ_ASR1901_USB0:
	case IRQ_ASR1901_USB1:
	case IRQ_ASR1901_PCIE_PORT0:
	case IRQ_ASR1901_PCIE_PORT1:
	case IRQ_ASR1901_USB0_WAKEUP:
	case IRQ_ASR1901_USB1_WAKEUP:
		awucrm = PMUM_WAKEUP5;
		apslpw |= PMUM_SLPWP5;
		break;
	/* wakeup line 6 */
	case IRQ_ASR1901_MMC1:
	case IRQ_ASR1901_MMC2:
	case IRQ_ASR1901_MMC3:
		awucrm = PMUM_WAKEUP6 | PMUM_SDH_23 | PMUM_SQU_SDH1;
		apslpw |= PMUM_SLPWP6;
		break;
	case IRQ_ASR1901_AP_AUDIO:
		awucrm = PMUM_WAKEUP5 | PMUM_SQU_SDH1;
		apslpw |= PMUM_SLPWP5;
		break;
	/* wakeup line 7 */
	case IRQ_ASR1901_PMIC:
		awucrm = PMUM_WAKEUP7;
		apslpw |= PMUM_SLPWP7;
		break;
	default:
		/* do nothing */
		break;
	}
	if (on) {
		if (awucrm) {
			awucrm |= __raw_readl(mpmu_va + AWUCRM);
			__raw_writel(awucrm, mpmu_va + AWUCRM);
		}
		if (apslpw) {
			apslpw = ~apslpw & __raw_readl(mpmu_va + APSLPW);
			__raw_writel(apslpw, mpmu_va + APSLPW);
		}
	} else {
		if (awucrm) {
			awucrm = ~awucrm & __raw_readl(mpmu_va + AWUCRM);
			__raw_writel(awucrm, mpmu_va + AWUCRM);
		}
		if (apslpw) {
			apslpw |= __raw_readl(mpmu_va + APSLPW);
			__raw_writel(apslpw, mpmu_va + APSLPW);
		}
	}
}
#else
static void asr_set_wake(int irq, unsigned int on)
{
	uint32_t awucrm = 0, apcr = 0;
	/* setting wakeup sources */
	switch (irq) {
	/* wakeup line 2 */
	case IRQ_ASR18XX_GPIO_AP:
		awucrm = PMUM_WAKEUP2;
		apcr |= PMUM_SLPWP2;
		break;
	/* wakeup line 3 */
	case IRQ_ASR18XX_KEYPAD:
		awucrm = PMUM_WAKEUP3 | PMUM_KEYPRESS | PMUM_TRACKBALL |
				PMUM_NEWROTARY;
		apcr |= PMUM_SLPWP3;
		break;
	case IRQ_ASR18XX_AP_GMAC:
		awucrm = PMUM_WAKEUP3 | PMUM_NEWROTARY | PMUM_AP_ASYNC_INT;
		apcr |= PMUM_SLPWP3;
		break;
	/* wakeup line 4 */
	case IRQ_ASR18XX_AP_TIMER1:
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_1;
		apcr |= PMUM_SLPWP4;
		break;
	case IRQ_ASR18XX_AP_TIMER2_3:
#ifdef CONFIG_CPU_ASR1903
	case IRQ_ASR1903_AP_TIMER3:
#endif
		awucrm = PMUM_WAKEUP4 | PMUM_AP0_2_TIMER_2 |
				PMUM_AP0_2_TIMER_3;
		apcr |= PMUM_SLPWP4;
		break;
	case IRQ_ASR18XX_AP2_TIMER1:
		awucrm = PMUM_WAKEUP4 | PMUM_AP1_TIMER_1;
		apcr |= PMUM_SLPWP4;
		break;
	case IRQ_ASR18XX_AP2_TIMER2_3:
#ifdef CONFIG_CPU_ASR1903
	case IRQ_ASR1903_AP2_TIMER3:
#endif
		awucrm = PMUM_WAKEUP4 | PMUM_AP1_TIMER_2 |
				PMUM_AP1_TIMER_3;
		apcr |= PMUM_SLPWP4;
		break;
	case IRQ_ASR18XX_RTC_ALARM:
		awucrm = PMUM_WAKEUP4 | PMUM_RTC_ALARM;
		apcr |= PMUM_SLPWP4;
		break;
	/* wakeup line 5 */
	case IRQ_ASR18XX_USB1:
	case IRQ_ASR1826S_USB_WAKEUP:
		awucrm = PMUM_WAKEUP5;
		apcr |= PMUM_SLPWP5;
		break;
	/* wakeup line 6 */
	case IRQ_ASR18XX_MMC:
		awucrm = PMUM_WAKEUP6 | PMUM_SDH_23 | PMUM_SQU_SDH1;
		apcr |= PMUM_SLPWP6;
		break;
	case IRQ_ASR18XX_HIFI_DMA:
		awucrm = PMUM_WAKEUP6 | PMUM_SQU_SDH1;
		apcr |= PMUM_SLPWP6;
		break;
	/* wakeup line 7 */
	case IRQ_ASR18XX_PMIC:
		awucrm = PMUM_WAKEUP7;
		apcr |= PMUM_SLPWP7;
		break;
	default:
		/* do nothing */
		break;
	}
	if (on) {
		/* rtc no wakeup */
		if ((IRQ_ASR18XX_RTC_ALARM == irq) && rtc_no_wakeup) {
			if (awucrm) {
				awucrm = ~awucrm & __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
				__raw_writel(awucrm, regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
			}
			if (apcr) {
				apcr |= __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
				__raw_writel(apcr, regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
			}
		}

		if (awucrm) {
			awucrm |= __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
			__raw_writel(awucrm, regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
		}
		if (apcr) {
			apcr = ~apcr & __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
			__raw_writel(apcr, regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
		}
	} else {
		if (awucrm) {
			awucrm = ~awucrm & __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
			__raw_writel(awucrm, regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRM);
		}
		if (apcr) {
			apcr |= __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
			__raw_writel(apcr, regs_addr_get_va(REGS_ADDR_MPMU) + APCR);
		}
	}
}
#endif

int extern_set_rtc_wkup_disabled(bool flag)
{
	rtc_no_wakeup = flag;
	pr_info("rtc_no_wakeup set to: %d\n", flag);
	return 0;
}

static int asr_pm_check_constraint(void)
{
	int ret = 0;
	struct pm_qos_object *idle_qos;
	struct list_head *list;
	struct plist_node *node;
	struct pm_qos_request *req;

	idle_qos = pm_qos_array[PM_QOS_CPUIDLE_BLOCK];
	list = &idle_qos->constraints->list.node_list;

	/* local irq disabled here, not need any lock */
	list_for_each_entry(node, list, node_list) {
		req = container_of(node, struct pm_qos_request, node);
		/*
		 * If here is alive LPM constraint, this function's
		 * return value will cause System to repeat suspend
		 * entry and exit until other wakeup events wakeup
		 * system to full awake or the held LPM constraint
		 * is released by the user then finally entering
		 * the Suspend + Chip sleep mode.
		 */
		if ((node->prio != PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE)) {
			pr_info("****************************************\n");
			pr_err("%s lpm constraint alive before Suspend", \
				req->name);
			pr_info("*****************************************\n");
			ret = -EBUSY;
		}
	}

	return ret;
}

static int asr_suspend_check(void)
{
	u32 ret, reg;

#ifdef CONFIG_CPU_ASR1901
	reg = __raw_readl(gic_get_dist_base() + GIC_DIST_ENABLE_SET + ((IRQ_ASR1901_PMIC / 32) * 4));
	if ((reg & (0x1 << (IRQ_ASR1901_PMIC % 32))) == 0) {
		pr_pm_debug("!!!PMIC int disabled\n");
		if (!cpu_is_asr1901_z1())
			return -EAGAIN;
	}
#else
	reg = __raw_readl(ICU_INT_CONF(IRQ_ASR18XX_PMIC - IRQ_ASR18XX_START));
	if ((reg & 0x3) == 0)
		return -EAGAIN;
#endif

	ret = asr_pm_check_constraint();

	/* Printed after suspend exit with old timestamps */
	pr_pm_debug("========wake up events status =========\n");
	pr_pm_debug("BEFORE SUSPEND AWUCRS:0x%x\n", __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + AWUCRS));

	return ret;
}

static u32 asr_post_chk_wakeup(void)
{
	u32 pm_status = __raw_readl(regs_addr_get_va(REGS_ADDR_MPMU) + PM_STATUS) >> 16;
	pr_pm_debug("Power Mode Status :0x%x\n", pm_status);

	/* Clear Power Mode Status*/
	__raw_writel(pm_status, regs_addr_get_va(REGS_ADDR_MPMU) + PM_STATUS);

	pr_pm_debug("=======================================\n");
	return 0;
}

static struct suspend_ops asr_suspend_ops = {
	.pre_suspend_check = asr_suspend_check,
	.post_chk_wakeup = asr_post_chk_wakeup,
	.post_clr_wakeup = NULL,
	.set_wake = asr_set_wake,
	.plt_suspend_init = NULL,
};

static struct platform_suspend asr_suspend = {
	.suspend_state	= POWER_MODE_UDR,
	.ops		= &asr_suspend_ops,
};

static int __init asr_suspend_init(void)
{
	int ret;

	asr_wake_status_init((u64)virt_to_phys(&asr_wkup_sts));

	ret = mmp_platform_suspend_register(&asr_suspend);

	if (ret)
		WARN_ON("ASR Suspend Register fails!!");

	return 0;
}
late_initcall(asr_suspend_init);