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192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / arch / arm / mach-omap2 / powerdomains43xx_data.c
blob: 5255f7e920726f460d8a57942c28426e06bac955 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AM43xx Power domains framework
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 */
7
8#include <linux/kernel.h>
9#include <linux/init.h>
10
11#include "powerdomain.h"
12
13#include "prcm-common.h"
14#include "prcm44xx.h"
15#include "prcm43xx.h"
16
17static struct powerdomain gfx_43xx_pwrdm = {
18 .name = "gfx_pwrdm",
19 .voltdm = { .name = "core" },
20 .prcm_offs = AM43XX_PRM_GFX_INST,
21 .prcm_partition = AM43XX_PRM_PARTITION,
22 .pwrsts = PWRSTS_OFF_ON,
23 .banks = 1,
24 .pwrsts_mem_on = {
25 [0] = PWRSTS_ON, /* gfx_mem */
26 },
27 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
28};
29
30static struct powerdomain mpu_43xx_pwrdm = {
31 .name = "mpu_pwrdm",
32 .voltdm = { .name = "mpu" },
33 .prcm_offs = AM43XX_PRM_MPU_INST,
34 .prcm_partition = AM43XX_PRM_PARTITION,
35 .pwrsts = PWRSTS_OFF_RET_ON,
36 .pwrsts_logic_ret = PWRSTS_OFF_RET,
37 .banks = 3,
38 .pwrsts_mem_ret = {
39 [0] = PWRSTS_OFF_RET, /* mpu_l1 */
40 [1] = PWRSTS_OFF_RET, /* mpu_l2 */
41 [2] = PWRSTS_OFF_RET, /* mpu_ram */
42 },
43 .pwrsts_mem_on = {
44 [0] = PWRSTS_ON, /* mpu_l1 */
45 [1] = PWRSTS_ON, /* mpu_l2 */
46 [2] = PWRSTS_ON, /* mpu_ram */
47 },
48 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
49};
50
51static struct powerdomain rtc_43xx_pwrdm = {
52 .name = "rtc_pwrdm",
53 .voltdm = { .name = "rtc" },
54 .prcm_offs = AM43XX_PRM_RTC_INST,
55 .prcm_partition = AM43XX_PRM_PARTITION,
56 .pwrsts = PWRSTS_ON,
57};
58
59static struct powerdomain wkup_43xx_pwrdm = {
60 .name = "wkup_pwrdm",
61 .voltdm = { .name = "core" },
62 .prcm_offs = AM43XX_PRM_WKUP_INST,
63 .prcm_partition = AM43XX_PRM_PARTITION,
64 .pwrsts = PWRSTS_ON,
65 .banks = 1,
66 .pwrsts_mem_on = {
67 [0] = PWRSTS_ON, /* debugss_mem */
68 },
69};
70
71static struct powerdomain tamper_43xx_pwrdm = {
72 .name = "tamper_pwrdm",
73 .voltdm = { .name = "tamper" },
74 .prcm_offs = AM43XX_PRM_TAMPER_INST,
75 .prcm_partition = AM43XX_PRM_PARTITION,
76 .pwrsts = PWRSTS_ON,
77};
78
79static struct powerdomain cefuse_43xx_pwrdm = {
80 .name = "cefuse_pwrdm",
81 .voltdm = { .name = "core" },
82 .prcm_offs = AM43XX_PRM_CEFUSE_INST,
83 .prcm_partition = AM43XX_PRM_PARTITION,
84 .pwrsts = PWRSTS_OFF_ON,
85 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
86};
87
88static struct powerdomain per_43xx_pwrdm = {
89 .name = "per_pwrdm",
90 .voltdm = { .name = "core" },
91 .prcm_offs = AM43XX_PRM_PER_INST,
92 .prcm_partition = AM43XX_PRM_PARTITION,
93 .pwrsts = PWRSTS_OFF_RET_ON,
94 .pwrsts_logic_ret = PWRSTS_OFF_RET,
95 .banks = 4,
96 .pwrsts_mem_ret = {
97 [0] = PWRSTS_OFF_RET, /* icss_mem */
98 [1] = PWRSTS_OFF_RET, /* per_mem */
99 [2] = PWRSTS_OFF_RET, /* ram1_mem */
100 [3] = PWRSTS_OFF_RET, /* ram2_mem */
101 },
102 .pwrsts_mem_on = {
103 [0] = PWRSTS_ON, /* icss_mem */
104 [1] = PWRSTS_ON, /* per_mem */
105 [2] = PWRSTS_ON, /* ram1_mem */
106 [3] = PWRSTS_ON, /* ram2_mem */
107 },
108 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
109};
110
111static struct powerdomain *powerdomains_am43xx[] __initdata = {
112 &gfx_43xx_pwrdm,
113 &mpu_43xx_pwrdm,
114 &rtc_43xx_pwrdm,
115 &wkup_43xx_pwrdm,
116 &tamper_43xx_pwrdm,
117 &cefuse_43xx_pwrdm,
118 &per_43xx_pwrdm,
119 NULL
120};
121
122static int am43xx_check_vcvp(void)
123{
124 return 0;
125}
126
127void __init am43xx_powerdomains_init(void)
128{
129 omap4_pwrdm_operations.pwrdm_has_voltdm = am43xx_check_vcvp;
130 pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
131 pwrdm_register_pwrdms(powerdomains_am43xx);
132 pwrdm_complete_init();
133}