b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | */ |
| 5 | #ifndef __ASM_DEBUG_MONITORS_H |
| 6 | #define __ASM_DEBUG_MONITORS_H |
| 7 | |
| 8 | #include <linux/errno.h> |
| 9 | #include <linux/types.h> |
| 10 | #include <asm/brk-imm.h> |
| 11 | #include <asm/esr.h> |
| 12 | #include <asm/insn.h> |
| 13 | #include <asm/ptrace.h> |
| 14 | |
| 15 | /* Low-level stepping controls. */ |
| 16 | #define DBG_MDSCR_SS (1 << 0) |
| 17 | #define DBG_SPSR_SS (1 << 21) |
| 18 | |
| 19 | /* MDSCR_EL1 enabling bits */ |
| 20 | #define DBG_MDSCR_KDE (1 << 13) |
| 21 | #define DBG_MDSCR_MDE (1 << 15) |
| 22 | #define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE) |
| 23 | |
| 24 | #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7) |
| 25 | |
| 26 | /* AArch64 */ |
| 27 | #define DBG_ESR_EVT_HWBP 0x0 |
| 28 | #define DBG_ESR_EVT_HWSS 0x1 |
| 29 | #define DBG_ESR_EVT_HWWP 0x2 |
| 30 | #define DBG_ESR_EVT_BRK 0x6 |
| 31 | |
| 32 | /* |
| 33 | * Break point instruction encoding |
| 34 | */ |
| 35 | #define BREAK_INSTR_SIZE AARCH64_INSN_SIZE |
| 36 | |
| 37 | /* |
| 38 | * BRK instruction encoding |
| 39 | * The #imm16 value should be placed at bits[20:5] within BRK ins |
| 40 | */ |
| 41 | #define AARCH64_BREAK_MON 0xd4200000 |
| 42 | |
| 43 | /* |
| 44 | * BRK instruction for provoking a fault on purpose |
| 45 | * Unlike kgdb, #imm16 value with unallocated handler is used for faulting. |
| 46 | */ |
| 47 | #define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5)) |
| 48 | |
| 49 | #define AARCH64_BREAK_KGDB_DYN_DBG \ |
| 50 | (AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5)) |
| 51 | |
| 52 | #define CACHE_FLUSH_IS_SAFE 1 |
| 53 | |
| 54 | /* kprobes BRK opcodes with ESR encoding */ |
| 55 | #define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (KPROBES_BRK_IMM << 5)) |
| 56 | #define BRK64_OPCODE_KPROBES_SS (AARCH64_BREAK_MON | (KPROBES_BRK_SS_IMM << 5)) |
| 57 | /* uprobes BRK opcodes with ESR encoding */ |
| 58 | #define BRK64_OPCODE_UPROBES (AARCH64_BREAK_MON | (UPROBES_BRK_IMM << 5)) |
| 59 | |
| 60 | /* AArch32 */ |
| 61 | #define DBG_ESR_EVT_BKPT 0x4 |
| 62 | #define DBG_ESR_EVT_VECC 0x5 |
| 63 | |
| 64 | #define AARCH32_BREAK_ARM 0x07f001f0 |
| 65 | #define AARCH32_BREAK_THUMB 0xde01 |
| 66 | #define AARCH32_BREAK_THUMB2_LO 0xf7f0 |
| 67 | #define AARCH32_BREAK_THUMB2_HI 0xa000 |
| 68 | |
| 69 | #ifndef __ASSEMBLY__ |
| 70 | struct task_struct; |
| 71 | |
| 72 | #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */ |
| 73 | |
| 74 | #define DBG_HOOK_HANDLED 0 |
| 75 | #define DBG_HOOK_ERROR 1 |
| 76 | |
| 77 | struct step_hook { |
| 78 | struct list_head node; |
| 79 | int (*fn)(struct pt_regs *regs, unsigned int esr); |
| 80 | }; |
| 81 | |
| 82 | void register_user_step_hook(struct step_hook *hook); |
| 83 | void unregister_user_step_hook(struct step_hook *hook); |
| 84 | |
| 85 | void register_kernel_step_hook(struct step_hook *hook); |
| 86 | void unregister_kernel_step_hook(struct step_hook *hook); |
| 87 | |
| 88 | struct break_hook { |
| 89 | struct list_head node; |
| 90 | int (*fn)(struct pt_regs *regs, unsigned int esr); |
| 91 | u16 imm; |
| 92 | u16 mask; /* These bits are ignored when comparing with imm */ |
| 93 | }; |
| 94 | |
| 95 | void register_user_break_hook(struct break_hook *hook); |
| 96 | void unregister_user_break_hook(struct break_hook *hook); |
| 97 | |
| 98 | void register_kernel_break_hook(struct break_hook *hook); |
| 99 | void unregister_kernel_break_hook(struct break_hook *hook); |
| 100 | |
| 101 | u8 debug_monitors_arch(void); |
| 102 | |
| 103 | enum dbg_active_el { |
| 104 | DBG_ACTIVE_EL0 = 0, |
| 105 | DBG_ACTIVE_EL1, |
| 106 | }; |
| 107 | |
| 108 | void enable_debug_monitors(enum dbg_active_el el); |
| 109 | void disable_debug_monitors(enum dbg_active_el el); |
| 110 | |
| 111 | void user_rewind_single_step(struct task_struct *task); |
| 112 | void user_fastforward_single_step(struct task_struct *task); |
| 113 | void user_regs_reset_single_step(struct user_pt_regs *regs, |
| 114 | struct task_struct *task); |
| 115 | |
| 116 | void kernel_enable_single_step(struct pt_regs *regs); |
| 117 | void kernel_disable_single_step(void); |
| 118 | int kernel_active_single_step(void); |
| 119 | void kernel_rewind_single_step(struct pt_regs *regs); |
| 120 | |
| 121 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
| 122 | int reinstall_suspended_bps(struct pt_regs *regs); |
| 123 | #else |
| 124 | static inline int reinstall_suspended_bps(struct pt_regs *regs) |
| 125 | { |
| 126 | return -ENODEV; |
| 127 | } |
| 128 | #endif |
| 129 | |
| 130 | int aarch32_break_handler(struct pt_regs *regs); |
| 131 | |
| 132 | #endif /* __ASSEMBLY */ |
| 133 | #endif /* __ASM_DEBUG_MONITORS_H */ |