| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2005 Ilya A. Volynets-Evenbakh |
| 7 | * Copyright (C) 2005, 07 Ralf Baechle (ralf@linux-mips.org) |
| 8 | */ |
| 9 | #ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H |
| 10 | #define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H |
| 11 | |
| 12 | |
| 13 | /* |
| 14 | * R5000 has an interesting "restriction": ll(d)/sc(d) |
| 15 | * instructions to XKPHYS region simply do uncached bus |
| 16 | * requests. This breaks all the atomic bitops functions. |
| 17 | * so, for 64bit IP32 kernel we just don't use ll/sc. |
| 18 | * This does not affect luserland. |
| 19 | */ |
| 20 | #if (defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)) && defined(CONFIG_64BIT) |
| 21 | #define cpu_has_llsc 0 |
| 22 | #else |
| 23 | #define cpu_has_llsc 1 |
| 24 | #endif |
| 25 | |
| 26 | /* Settings which are common for all ip32 CPUs */ |
| 27 | #define cpu_has_tlb 1 |
| 28 | #define cpu_has_4kex 1 |
| 29 | #define cpu_has_32fpr 1 |
| 30 | #define cpu_has_counter 1 |
| 31 | #define cpu_has_mips16 0 |
| 32 | #define cpu_has_mips16e2 0 |
| 33 | #define cpu_has_vce 0 |
| 34 | #define cpu_has_cache_cdex_s 0 |
| 35 | #define cpu_has_mcheck 0 |
| 36 | #define cpu_has_ejtag 0 |
| 37 | #define cpu_has_vtag_icache 0 |
| 38 | #define cpu_has_ic_fills_f_dc 0 |
| 39 | #define cpu_has_dsp 0 |
| 40 | #define cpu_has_dsp2 0 |
| 41 | #define cpu_has_4k_cache 1 |
| 42 | #define cpu_has_mipsmt 0 |
| 43 | #define cpu_has_userlocal 0 |
| 44 | |
| 45 | |
| 46 | #define cpu_has_mips32r1 0 |
| 47 | #define cpu_has_mips32r2 0 |
| 48 | #define cpu_has_mips64r1 0 |
| 49 | #define cpu_has_mips64r2 0 |
| 50 | |
| 51 | #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ |