b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation |
| 4 | */ |
| 5 | #ifndef __ASM_SIBYTE_SWARM_H |
| 6 | #define __ASM_SIBYTE_SWARM_H |
| 7 | |
| 8 | #include <asm/sibyte/sb1250.h> |
| 9 | #include <asm/sibyte/sb1250_int.h> |
| 10 | |
| 11 | #ifdef CONFIG_SIBYTE_SWARM |
| 12 | #define SIBYTE_BOARD_NAME "BCM91250A (SWARM)" |
| 13 | #define SIBYTE_HAVE_PCMCIA 1 |
| 14 | #define SIBYTE_HAVE_IDE 1 |
| 15 | #endif |
| 16 | #ifdef CONFIG_SIBYTE_LITTLESUR |
| 17 | #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" |
| 18 | #define SIBYTE_HAVE_PCMCIA 0 |
| 19 | #define SIBYTE_HAVE_IDE 1 |
| 20 | #define SIBYTE_DEFAULT_CONSOLE "cfe0" |
| 21 | #endif |
| 22 | #ifdef CONFIG_SIBYTE_CRHONE |
| 23 | #define SIBYTE_BOARD_NAME "BCM91125C (CRhone)" |
| 24 | #define SIBYTE_HAVE_PCMCIA 0 |
| 25 | #define SIBYTE_HAVE_IDE 0 |
| 26 | #endif |
| 27 | #ifdef CONFIG_SIBYTE_CRHINE |
| 28 | #define SIBYTE_BOARD_NAME "BCM91120C (CRhine)" |
| 29 | #define SIBYTE_HAVE_PCMCIA 0 |
| 30 | #define SIBYTE_HAVE_IDE 0 |
| 31 | #endif |
| 32 | |
| 33 | /* Generic bus chip selects */ |
| 34 | #define LEDS_CS 3 |
| 35 | #define LEDS_PHYS 0x100a0000 |
| 36 | |
| 37 | #ifdef SIBYTE_HAVE_IDE |
| 38 | #define IDE_CS 4 |
| 39 | #define IDE_PHYS 0x100b0000 |
| 40 | #define K_GPIO_GB_IDE 4 |
| 41 | #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) |
| 42 | #endif |
| 43 | |
| 44 | #ifdef SIBYTE_HAVE_PCMCIA |
| 45 | #define PCMCIA_CS 6 |
| 46 | #define PCMCIA_PHYS 0x11000000 |
| 47 | #define K_GPIO_PC_READY 9 |
| 48 | #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) |
| 49 | #endif |
| 50 | |
| 51 | #endif /* __ASM_SIBYTE_SWARM_H */ |