| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Arch specific extensions to struct device |
| 4 | */ |
| 5 | #ifndef _ASM_POWERPC_DEVICE_H |
| 6 | #define _ASM_POWERPC_DEVICE_H |
| 7 | |
| 8 | struct device_node; |
| 9 | #ifdef CONFIG_PPC64 |
| 10 | struct pci_dn; |
| 11 | struct iommu_table; |
| 12 | #endif |
| 13 | |
| 14 | /* |
| 15 | * Arch extensions to struct device. |
| 16 | * |
| 17 | * When adding fields, consider macio_add_one_device in |
| 18 | * drivers/macintosh/macio_asic.c |
| 19 | */ |
| 20 | struct dev_archdata { |
| 21 | /* |
| 22 | * Set to %true if the dma_iommu_ops are requested to use a direct |
| 23 | * window instead of dynamically mapping memory. |
| 24 | */ |
| 25 | bool iommu_bypass : 1; |
| 26 | /* |
| 27 | * These two used to be a union. However, with the hybrid ops we need |
| 28 | * both so here we store both a DMA offset for direct mappings and |
| 29 | * an iommu_table for remapped DMA. |
| 30 | */ |
| 31 | dma_addr_t dma_offset; |
| 32 | |
| 33 | #ifdef CONFIG_PPC64 |
| 34 | struct iommu_table *iommu_table_base; |
| 35 | #endif |
| 36 | |
| 37 | #ifdef CONFIG_IOMMU_API |
| 38 | void *iommu_domain; |
| 39 | #endif |
| 40 | #ifdef CONFIG_PPC64 |
| 41 | struct pci_dn *pci_data; |
| 42 | #endif |
| 43 | #ifdef CONFIG_EEH |
| 44 | struct eeh_dev *edev; |
| 45 | #endif |
| 46 | #ifdef CONFIG_FAIL_IOMMU |
| 47 | int fail_iommu; |
| 48 | #endif |
| 49 | #ifdef CONFIG_CXL_BASE |
| 50 | struct cxl_context *cxl_ctx; |
| 51 | #endif |
| 52 | }; |
| 53 | |
| 54 | struct pdev_archdata { |
| 55 | u64 dma_mask; |
| 56 | }; |
| 57 | |
| 58 | #endif /* _ASM_POWERPC_DEVICE_H */ |