blob: b1d8fec29169e237dee6d8961c23f35b44645f6c [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_NOHASH_TLBFLUSH_H
3#define _ASM_POWERPC_NOHASH_TLBFLUSH_H
4
5/*
6 * TLB flushing:
7 *
8 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
9 * - flush_tlb_page(vma, vmaddr) flushes one page
10 * - local_flush_tlb_mm(mm, full) flushes the specified mm context on
11 * the local processor
12 * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
13 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
14 * - flush_tlb_range(vma, start, end) flushes a range of pages
15 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
16 *
17 */
18
19/*
20 * TLB flushing for software loaded TLB chips
21 *
22 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
23 * flush_tlb_kernel_range are best implemented as tlbia vs
24 * specific tlbie's
25 */
26
27struct vm_area_struct;
28struct mm_struct;
29
30#define MMU_NO_CONTEXT ((unsigned int)-1)
31
32extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
33 unsigned long end);
34extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
35
36extern void local_flush_tlb_mm(struct mm_struct *mm);
37extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
38
39extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
40 int tsize, int ind);
41
42#ifdef CONFIG_SMP
43extern void flush_tlb_mm(struct mm_struct *mm);
44extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
45extern void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
46 int tsize, int ind);
47#else
48#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
49#define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
50#define __flush_tlb_page(mm,addr,p,i) __local_flush_tlb_page(mm,addr,p,i)
51#endif
52
53#endif /* _ASM_POWERPC_NOHASH_TLBFLUSH_H */