| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef __ASM_SH_HW_IRQ_H |
| 3 | #define __ASM_SH_HW_IRQ_H |
| 4 | |
| 5 | #include <linux/init.h> |
| 6 | #include <linux/sh_intc.h> |
| 7 | #include <linux/atomic.h> |
| 8 | |
| 9 | extern atomic_t irq_err_count; |
| 10 | |
| 11 | struct ipr_data { |
| 12 | unsigned char irq; |
| 13 | unsigned char ipr_idx; /* Index for the IPR registered */ |
| 14 | unsigned char shift; /* Number of bits to shift the data */ |
| 15 | unsigned char priority; /* The priority */ |
| 16 | }; |
| 17 | |
| 18 | struct ipr_desc { |
| 19 | unsigned long *ipr_offsets; |
| 20 | unsigned int nr_offsets; |
| 21 | struct ipr_data *ipr_data; |
| 22 | unsigned int nr_irqs; |
| 23 | struct irq_chip chip; |
| 24 | }; |
| 25 | |
| 26 | void register_ipr_controller(struct ipr_desc *); |
| 27 | |
| 28 | void __init plat_irq_setup(void); |
| 29 | void __init plat_irq_setup_sh3(void); |
| 30 | void __init plat_irq_setup_pins(int mode); |
| 31 | |
| 32 | enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, |
| 33 | IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, |
| 34 | IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; |
| 35 | |
| 36 | #endif /* __ASM_SH_HW_IRQ_H */ |