| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _ASM_X86_MSIDEF_H |
| 3 | #define _ASM_X86_MSIDEF_H |
| 4 | |
| 5 | /* |
| 6 | * Constants for Intel APIC based MSI messages. |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * Shifts for MSI data |
| 11 | */ |
| 12 | |
| 13 | #define MSI_DATA_VECTOR_SHIFT 0 |
| 14 | #define MSI_DATA_VECTOR_MASK 0x000000ff |
| 15 | #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ |
| 16 | MSI_DATA_VECTOR_MASK) |
| 17 | |
| 18 | #define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
| 19 | #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 20 | #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) |
| 21 | |
| 22 | #define MSI_DATA_LEVEL_SHIFT 14 |
| 23 | #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) |
| 24 | #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) |
| 25 | |
| 26 | #define MSI_DATA_TRIGGER_SHIFT 15 |
| 27 | #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) |
| 28 | #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) |
| 29 | |
| 30 | /* |
| 31 | * Shift/mask fields for msi address |
| 32 | */ |
| 33 | |
| 34 | #define MSI_ADDR_BASE_HI 0 |
| 35 | #define MSI_ADDR_BASE_LO 0xfee00000 |
| 36 | |
| 37 | #define MSI_ADDR_DEST_MODE_SHIFT 2 |
| 38 | #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) |
| 39 | #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) |
| 40 | |
| 41 | #define MSI_ADDR_REDIRECTION_SHIFT 3 |
| 42 | #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) |
| 43 | /* dedicated cpu */ |
| 44 | #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) |
| 45 | /* lowest priority */ |
| 46 | |
| 47 | #define MSI_ADDR_DEST_ID_SHIFT 12 |
| 48 | #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
| 49 | #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \ |
| 50 | MSI_ADDR_DEST_ID_MASK) |
| 51 | #define MSI_ADDR_EXT_DEST_ID(dest) ((dest) & 0xffffff00) |
| 52 | |
| 53 | #define MSI_ADDR_IR_EXT_INT (1 << 4) |
| 54 | #define MSI_ADDR_IR_SHV (1 << 3) |
| 55 | #define MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13) |
| 56 | #define MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5) |
| 57 | #endif /* _ASM_X86_MSIDEF_H */ |